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Force ARMv7 builds to use only 16 FP registers.

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This is needed because upcoming Cortex-A9 devices implement
VFPv3-D16 instead of the assumed VFPv3-D32 and have thus half
the floating-point registers.
This commit is contained in:
David 'Digit' Turner
2010-01-28 17:58:56 -08:00
parent d98ba32eef
commit 14665046f8
2 changed files with 6 additions and 6 deletions
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8
ndk/docs/CPU-ARCH-ABIS.TXT
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@@ -93,12 +93,12 @@ Each supported ABI is identified by a unique name.
- The Thumb-2 instruction set extension.
- The VFP hardware FPU instructions.
More specifically, VFPv3-D32 is being used, which corresponds to 32
More specifically, VFPv3-D16 is being used, which corresponds to 16
dedicated 64-bit floating point registers provided by the CPU.
Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON)
or ThumbEE are optional to this ABI, which means that developers should
check *at* *runtime* whether the extensions are available and provide
Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON),
VFPv3-D32 or ThumbEE are optional to this ABI, which means that developers
should check *at* *runtime* whether the extensions are available and provide
alternative code paths if this is not the case.
(Just like one typically does on x86 systems to check/use MMX/SSE2/etc...