am 50c5ce01: Merge "Force ARMv7 builds to use only 16 FP registers." into eclair
Merge commit '50c5ce01ca7985b6a76ef67cf171a6eb29c69b80' into eclair-plus-aosp * commit '50c5ce01ca7985b6a76ef67cf171a6eb29c69b80': Force ARMv7 builds to use only 16 FP registers.
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@@ -39,8 +39,8 @@ TARGET_CFLAGS.common := \
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ifeq ($(TARGET_ARCH_ABI),armeabi-v7a)
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ifeq ($(TARGET_ARCH_ABI),armeabi-v7a)
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TARGET_ARCH_CFLAGS := -march=armv7-a \
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TARGET_ARCH_CFLAGS := -march=armv7-a \
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-mfloat-abi=softfp \
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-mfloat-abi=softfp \
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-mfpu=neon
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-mfpu=vfp
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TARGET_ARCH_LDFLAGS := -Wl,--fix-cortex-a8
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TARGET_ARCH_LDFLAGS := -Wl,--fix-cortex-a8
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else
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else
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TARGET_ARCH_CFLAGS := -march=armv5te \
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TARGET_ARCH_CFLAGS := -march=armv5te \
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@@ -93,12 +93,12 @@ Each supported ABI is identified by a unique name.
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- The Thumb-2 instruction set extension.
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- The Thumb-2 instruction set extension.
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- The VFP hardware FPU instructions.
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- The VFP hardware FPU instructions.
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More specifically, VFPv3-D32 is being used, which corresponds to 32
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More specifically, VFPv3-D16 is being used, which corresponds to 16
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dedicated 64-bit floating point registers provided by the CPU.
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dedicated 64-bit floating point registers provided by the CPU.
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Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON)
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Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON),
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or ThumbEE are optional to this ABI, which means that developers should
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VFPv3-D32 or ThumbEE are optional to this ABI, which means that developers
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check *at* *runtime* whether the extensions are available and provide
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should check *at* *runtime* whether the extensions are available and provide
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alternative code paths if this is not the case.
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alternative code paths if this is not the case.
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(Just like one typically does on x86 systems to check/use MMX/SSE2/etc...
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(Just like one typically does on x86 systems to check/use MMX/SSE2/etc...
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