From 14665046f822e0f97df6987784622823af73f90c Mon Sep 17 00:00:00 2001 From: David 'Digit' Turner Date: Thu, 28 Jan 2010 17:58:56 -0800 Subject: [PATCH] Force ARMv7 builds to use only 16 FP registers. This is needed because upcoming Cortex-A9 devices implement VFPv3-D16 instead of the assumed VFPv3-D32 and have thus half the floating-point registers. --- ndk/build/toolchains/arm-eabi-4.4.0/setup.mk | 4 ++-- ndk/docs/CPU-ARCH-ABIS.TXT | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ndk/build/toolchains/arm-eabi-4.4.0/setup.mk b/ndk/build/toolchains/arm-eabi-4.4.0/setup.mk index cbdeed55d..41d85dbc5 100644 --- a/ndk/build/toolchains/arm-eabi-4.4.0/setup.mk +++ b/ndk/build/toolchains/arm-eabi-4.4.0/setup.mk @@ -39,8 +39,8 @@ TARGET_CFLAGS.common := \ ifeq ($(TARGET_ARCH_ABI),armeabi-v7a) TARGET_ARCH_CFLAGS := -march=armv7-a \ - -mfloat-abi=softfp \ - -mfpu=neon + -mfloat-abi=softfp \ + -mfpu=vfp TARGET_ARCH_LDFLAGS := -Wl,--fix-cortex-a8 else TARGET_ARCH_CFLAGS := -march=armv5te \ diff --git a/ndk/docs/CPU-ARCH-ABIS.TXT b/ndk/docs/CPU-ARCH-ABIS.TXT index d142db49f..b9b88e7df 100644 --- a/ndk/docs/CPU-ARCH-ABIS.TXT +++ b/ndk/docs/CPU-ARCH-ABIS.TXT @@ -93,12 +93,12 @@ Each supported ABI is identified by a unique name. - The Thumb-2 instruction set extension. - The VFP hardware FPU instructions. - More specifically, VFPv3-D32 is being used, which corresponds to 32 + More specifically, VFPv3-D16 is being used, which corresponds to 16 dedicated 64-bit floating point registers provided by the CPU. - Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON) - or ThumbEE are optional to this ABI, which means that developers should - check *at* *runtime* whether the extensions are available and provide + Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON), + VFPv3-D32 or ThumbEE are optional to this ABI, which means that developers + should check *at* *runtime* whether the extensions are available and provide alternative code paths if this is not the case. (Just like one typically does on x86 systems to check/use MMX/SSE2/etc...