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hwc: Add support for Macro Tile feature

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Macro tile is enabled only if all the conditions are met:
  1. GPU hardware should support Macro Tiling.
  2. MDSS hardware should support Macro Tiling.
  3. USAGE flags shouldnt contain GRALLOC_USAGE_SW_READ_OFTEN and
     GRALLOC_USAGE_SW_WRITE_OFTEN.
  4. RGB 16bit and 32bit formats.
  5. persist.hwc.macro_tile_enable flag should be enabled.

PRIV_FLAGS_TILE_RENDERED flag is added to indicate whether the layer
is rendered/composited in Macro Tiling or Linear format.

Change-Id: Ie3139839c84d76c5d1a2300f33910a09eb7336f4
This commit is contained in:
Manoj Kumar AVM
2013-10-10 11:46:06 -07:00
parent 8dad692bcb
commit 8a22081e49
13 changed files with 245 additions and 31 deletions
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126
libgralloc/alloc_controller.cpp
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@@ -36,6 +36,7 @@
#include "ionalloc.h"
#include "gr.h"
#include "comptype.h"
#include "mdp_version.h"
#ifdef VENUS_COLOR_FORMAT
#include <media/msm_media_info.h>
@@ -88,13 +89,16 @@ AdrenoMemInfo::AdrenoMemInfo()
{
LINK_adreno_compute_aligned_width_and_height = NULL;
LINK_adreno_compute_padding = NULL;
LINK_adreno_isMacroTilingSupportedByGpu = NULL;
libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
if (libadreno_utils) {
*(void **)&LINK_adreno_compute_aligned_width_and_height =
::dlsym(libadreno_utils, "compute_aligned_width_and_height");
*(void **)&LINK_adreno_compute_padding = ::dlsym(libadreno_utils,
"compute_surface_padding");
::dlsym(libadreno_utils, "compute_aligned_width_and_height");
*(void **)&LINK_adreno_compute_padding =
::dlsym(libadreno_utils, "compute_surface_padding");
*(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
}
}
@@ -105,8 +109,19 @@ AdrenoMemInfo::~AdrenoMemInfo()
}
}
int AdrenoMemInfo::isMacroTilingSupportedByGPU()
{
if ((libadreno_utils)) {
if(LINK_adreno_isMacroTilingSupportedByGpu) {
return LINK_adreno_isMacroTilingSupportedByGpu();
}
}
return 0;
}
void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
int& aligned_w, int& aligned_h)
int tile_enabled, int& aligned_w, int& aligned_h)
{
aligned_w = ALIGN(width, 32);
aligned_h = ALIGN(height, 32);
@@ -138,9 +153,8 @@ void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
// the function below computes aligned width and aligned height
// based on linear or macro tile mode selected.
if(LINK_adreno_compute_aligned_width_and_height) {
int tile_mode = 0; // Linear surface
LINK_adreno_compute_aligned_width_and_height(width,
height, bpp, tile_mode,
LINK_adreno_compute_aligned_width_and_height(width,
height, bpp, tile_enabled,
raster_mode, padding_threshold,
&aligned_w, &aligned_h);
@@ -289,16 +303,42 @@ IMemAlloc* IonController::getAllocator(int flags)
return memalloc;
}
size_t getBufferSizeAndDimensions(int width, int height, int format,
int& alignedw, int &alignedh)
bool isMacroTileEnabled(int format, int usage)
{
bool tileEnabled = false;
// Check whether GPU & MDSS supports MacroTiling feature
if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
qdutils::MDPVersion::getInstance().supportsMacroTile())
{
// check the format
switch(format)
{
case HAL_PIXEL_FORMAT_RGBA_8888:
case HAL_PIXEL_FORMAT_RGBX_8888:
case HAL_PIXEL_FORMAT_BGRA_8888:
{
tileEnabled = true;
// check the usage flags
if (usage & (GRALLOC_USAGE_SW_READ_MASK |
GRALLOC_USAGE_SW_WRITE_MASK)) {
// Application intends to use CPU for rendering
tileEnabled = false;
}
break;
}
default:
break;
}
}
return tileEnabled;
}
// helper function
size_t getSize(int format, int width, int height, int alignedw, int alignedh)
{
size_t size;
AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
height,
format,
alignedw,
alignedh);
switch (format) {
case HAL_PIXEL_FORMAT_RGBA_8888:
case HAL_PIXEL_FORMAT_RGBX_8888:
@@ -376,10 +416,64 @@ size_t getBufferSizeAndDimensions(int width, int height, int format,
ALOGE("unrecognized pixel format: 0x%x", format);
return -EINVAL;
}
return size;
}
size_t getBufferSizeAndDimensions(int width, int height, int format,
int& alignedw, int &alignedh)
{
size_t size;
AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
height,
format,
false,
alignedw,
alignedh);
size = getSize(format, width, height, alignedw, alignedh);
return size;
}
size_t getBufferSizeAndDimensions(int width, int height, int format, int usage,
int& alignedw, int &alignedh)
{
size_t size;
int tileEnabled = isMacroTileEnabled(format, usage);
AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
height,
format,
tileEnabled,
alignedw,
alignedh);
size = getSize(format, width, height, alignedw, alignedh);
return size;
}
void getBufferAttributes(int width, int height, int format, int usage,
int& alignedw, int &alignedh, int& tileEnabled, size_t& size)
{
tileEnabled = isMacroTileEnabled(format, usage);
AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
height,
format,
tileEnabled,
alignedw,
alignedh);
if(size)
size = getSize(format, width, height, alignedw, alignedh);
}
// Allocate buffer from width, height and format into a
// private_handle_t. It is the responsibility of the caller
// to free the buffer using the free_buffer function
@@ -392,7 +486,9 @@ int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
data.base = 0;
data.fd = -1;
data.offset = 0;
data.size = getBufferSizeAndDimensions(w, h, format, alignedw, alignedh);
data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
alignedh);
data.align = getpagesize();
data.uncached = useUncached(usage);
int allocFlags = usage;