Add API to set the secure flag on the WB interface, making the WB session
seccure. This is required for use cases such as secure playback when
AD is enabled.
Change-Id: Ifd6cb16f257e8eb27541e524905456c04cf06c3b
Set DMA mode to LINE only after we UNSET and commit the sessions
in BLOCK mode from previous rounds.
Currently, it is incorrectly set to LINE always at the beginning
of a draw cycle.
Now we set it to LINE only at the end of a draw cycle if no rotator
sessions are active.
Change-Id: I6e2351d214d01764eced0673b639f709fbd193c3
When a client makes a request for memory to overlay we need to
keep track of the size distinctly. This is required for secure
playback use cases in which we internally calculate the aligned
buffer size. The decision to reallocate memory should always be
based on the original size requested by the client and not our
internally calculated aligned buffer size.
Change-Id: I731560be7dba27264d00fdcb1a12622d604ce0fb
Do not create a writeback instance during dumpsys.
Instead use the dumpsys to return empty if no instance exists.
This fixes the issue where
a) Unnecessary instance is created.
b) Dumpsys has garbage, if a valid instance didn't exist
Change-Id: Ic8ea5ddd8d05203234da7c7dfccd2c2b497e62f7
Add dumpsys information from writeback data structure.
Remove some unused fields, formatting to save space.
Change-Id: I808ce67aae16e27c3aa6d6db45983929b1386b69
On systems that do not have a Contiguous Memory Allocator (CMA) it is
the responsibily of the client to specify the required address alignment.
Additionally, we centralize size alignment to so that overlay clients
do not need to take of this.
Change-Id: Id6cec19bf59826fca2617c856bb62968790bf71c
1.Framework notifies HAL with "HWC_FORMAT_RB_SWAP" layer flag to handle
a limitation where R and B components were swapped in Rendering phase.
2.Add "R/B swap" in hwc query to enable framework to query for support
in display HAL, at run-time.
Change-Id: I3b44d15b51b4f24939048fee9d1bac2b9009c97c
- Identify secure display layer in the hwc_list
- Need to set both SECURE_OVERLAY and SECURE_DISPLAY flags for the secure
display layer
- Disable idle timeout for secure display usecase, as GPU should not be
accessing secure display layer
Change-Id: I555910db77c466b5e103b24b4f0ec7f47bb210a5
This change adds support in HWC for MDP partial update applicable
only for command mode panels. Presence of MDP FB (GRAM) in
command mode panels allows MDP clients to update only the updating region
of the frame as rest of the frame will be cached in the GRAM.
HWC calculates the updating region of a frame (ROI) by deducing
outer bounds of its updating layer destinations. Layers not lying
within the calculated ROI will be dropped from the composition
since its illegal to program MDP pipes for non participating layers.
Change-Id: I890d98ff7960fe888787981803cac62f68471201
Adding support for interleaved HAL_PIXEL_FORMAT_YCbCr_422_I and
HAL_PIXEL_FORMAT_YCrCb_422_I format in display HAL.
Change-Id: Ib87d9bf481c20bf6a92293dd04746719b1d928c1
In video handling this patch makes sure:
1) Sufficient VG pipes are available, not just any pipes
2) If VG pipes are insufficient in multi-video scenarios
preference is given to secure videos
Change-Id: I170592463a1c28348108a1b12d60908cf3063d7d
When checking for pipes needed for each mixer, the pipes completely
unused are counted twice.
Add a per display check on top of per mixer check to make sure this
is taken care of.
For example: Each mixer needs 4 pipes, and total completely unused
pipes are 6. Each mixer will get 6 as available pipes, which is ok
at a mixer level, but at a display level 8 pipes are needed and 6
available. Need to account for that
Change-Id: I9811255aab96c7fe47331f8aa125fef2a4a2f704
Add support for setting writeback output format.
Modify the getter to query the driver for output format
if not already done.
Add API to retrieve writeback fb node's fd.
Change-Id: I4a3681b6501c41a094e4cd840591b707b4d7ed66
In the writeback path, when memory is allocated and managed by
writeback, make sure the input size is aligned to 1M if the
request is for a secure allocation
Change-Id: Ia10f1b6811b81f075b221e0fa025447a77a1e02c
For split source crop of YUV ensure that Left and Width
(thus Right) of each crop is even.
For split source crop of RGB and YUV ensure that Crops have
no gaps (i.e right of left-crop = left of right-crop)
Enable overfetch of pixels in the center, for split layers,
to get a smooth upscale
Change-Id: I8e4a91b637c840f75742580645c6468b5769432d
Enable sync-pt for rotator on B-family. The already existing
MSMFB_BUF_SYNC ioctl is used, with an extra member for session_id
from rotator.
Change-Id: Ib0ef6b1bc5cf1e6437090a217d7f731a3440f84b
There is an optimization to not do garbage collection (and thus UNSET)
if pipe usage hasn't change, added during older chip time frames.
It worked then because, continuous overlay failures were not normal,
and on failure userspace didn't UNSET remaining pipes.
On newer chips, owing to bandwidth limitations, continuous overlay
failures could happen, plus now we UNSET all other pipes. Thus each
round if GPU gets used, the optimization infers that pipe usage hasn't
changed and does not UNSET pipes.
Also the optimization doesn't do anything useful than saving a few
loops, but is suicidal in current situations, so can safely be done
away with.
Change-Id: I33bd64a599d8ade337707301188c94cf8e6aac81
The NV12 encodeable format is set for wifi displays but isn't
mapped to any MDP format. On B-Family targets the format is
equivalent to the venus yuv format.
Change-Id: I75e20c079e4b2e21decc39c29d9ed25953276df9
Force pipes of a display, whose geometry has changed, to pass
configuration arguments using MSMFB_SET_IOCTL. This helps the driver
make additive bandwidth calculations and reject the frame if the
requirements go beyond what the hardware can support.
This change still preserves the optmization to avoid ioctl calls, in
cases where pipe params are the same but makes an exception when
list geometry changes.
Change-Id: I909d35b2a8c33059b34b65943ccbbc08650461db
HWC 1.2 API passes down the plane alpha and the blending
operation to apply. Pass this information to the MDP.
Change-Id: I7fbd17345d9157aa654e4b1031ac3e26adf87f37
- cleans up external library
- add separate library for virtual display
- process virtual updates in its separate path
in hwc.
- Acquire blank mutex lock for one complete drawing
cycle
Change-Id: Ib984c578464a131ecdb27ee48960f58d68b7a5a7
Add assertive display support to hwc. This feature takes effect when
node /sys/class/graphics/fb*/ad is present. This signifies that that LM0
is being used with fb* for writeback.
When a video playback begins we write "1" to this node to indicate to
post processing that a writeback will happen. Likewise a "0" is written
to this node when playback stops.
The original contents are worked upon and the modified output is fed
via writeback to either rotator or mdp as appropriate.
The feature doesnt trigger when either:
1) Buffer size exceeds 2048
2) External display is connected
3) Multiple yuv streams are present
When this mode is active, MDP comp is applied only to yuv layer.
Change-Id: If5520f9dc849de3189c9f9ed4e9072c8f8f760e1
For split displays, earlier we allowed pipes to switch mixers in
subsequent rounds. This change prevents that and makes sure there
is one composition round where a pipe being transferred to another
mixer of the same display is UNSET
Change-Id: I3c679cc4256363eeb70c5cf8bcaf5047b8a064c2
Compressed output buffer size calculation for MDSS Rotator needs to
be performed according to destination rectangle (rotated src rect)
due to alignment requirements (like non-BWC calculation).
Change-Id: I6a232d77ca5fce42a1cc3e7f406c9cc4d46553ed
The debug buffer size is insufficient for newer targets with multiple
pipes. The code causing crash is enabled only if the PIPE_DEBUG macro
is enabled during local debugging.
We now increase the buffer size and also put some string operations under
the macro check for efficiency.
Change-Id: I4ad418d314fd8c7d374ccfdb0943dde44d968922
For BWC, update the rotator buffer size calculation in display HAL
as MDSS driver needs to allocate for both chroma (U & V) planes.
Change-Id: I140be2b0a38d6cd66e2ee1b3c9a8bb06efd96bfe
Implement sync for rotator.
If a buffer is rotated, it can be used by producer soon after
rotation (and it wont have to wait until vsync).
Mdp waits for the rotator buffer's release fence to signal
to start display.
Hwc waits for previous access to rotator buffer by MDP to finish
before using it
Change-Id: I5664806a17c44d58af62a2825ce454089fcd31cf
The rotator object in the generic pipe is never used.
Remove this unused object along with other rotator
related member variables.
Change-Id: I66d60e14565cab730228c3116e67e5c619296284
- gralloc does not invalidate and clean the cached buffers.
- Using cached buffers for rotator does not add any benefit as
rotator doesn't touch the L2 cache. Since no one accesses the
memory but the rotator and mdp, so make rotator buffers uncached
Change-Id: I3dc3c91afb2fc07b7473662323339aac1cea3d73
As MDSS cannot handle 1-pixel downscaling for UI layer, decrease
src crop by 1 pixel in such cases.
Change-Id: Ifc1f3a8e416c48db4b09d2ab0838927952e263ed
Add a BWC policy manager that decides if BWC needs to be disabled on
certain conditions.
These conditions are statically determined. BWC might get used and
still fail (or cause failure of subsequent pipe requests) if SMP
blocks are not sufficient.
Change-Id: I805738911a8da7dfc6232c133c74ef844c3af5b1
MDSS driver requires the crop height to be multiple of 4 to
de-interlace the interlaced Yuv content.
CRs-Fixed: 491488
Change-Id: I9a95392a71cca217e2890c9736f1450fd8aa4a59
There can be frequent failures in pipe config on certain targets
owing to scare SMP blocks. In such cases, reset usage of all pipes;
forcibly configure them next time, even if params haven't changed;
Change-Id: I769513fc3513e292d9d9b7f126735841a7a8f493
