Allocate gralloc buffers cached by default unless clients specify
uncached using PRIVATE_UNCACHED or READ_RARELY or WRITE_RARELY at
allocation time. Some clients could use gralloc for allocation but
later won't use lock()/unlock() for CPU operations and likely use
their own caching methods. Cached by default helps such clients.
SW usage flags are not defined as bit values, so do not use bitops
on those flags.
Change-Id: Id371de2ec6efbfa0ed84172b3540f3ebc8f5d459
1. Modify gralloc library to allocate buffers for RGBA_4444 and
RGBA_5551 formats
2. Modify copybit library to add composition support for RGBA_4444
and RGBA_5551 layers
3. Modify hwc library to add MDP composition and rotator support for
RGBA_4444 and RGBA_5551 layers.
Change-Id: I30dbc4e5e2c010835fa7e7663f996f67779a1803
* Define VENUS_COLOR_FORMAT to get aligned dimensions for venus format
* Compile copybit lib for ferrum
Change-Id: I905b84fc066075af50b8197dd53157a3a57db59b
NEON instructions in software converter are specifically written
for 32 bit ARM architecture. Do not compile them on 64 bit arch.
Change-Id: I1dbac24df519e00a2cc125b35cbd3bc520188457
Enable swapping of R & B color components
for RGB_888 format, otherwise C2D renders
wrong output.
Change-Id: Ib1670418a588e09e8168a04c9f8b8022a84e65e8
CRs-fixed: 672033
To comply with multi-arch build system changes for 64-bit support,
LOCAL_MODULE_RELATIVE_PATH needs to be used.
Drop explicit use of LOCAL_MODULE_PATH as its not needed, and
causes build system to overwrite one of multi-arch library
variants with the other arch variant.
Change-Id: I882de72ad2003f1e2bcc93fb63bad7377a84d31d
On open source builds, adreno libs don't get built, due to which
c2d headers aren't exported. Export it from the display HAL.
Change-Id: I6ed1d1fcf3f99ba83d5f194e40d0b42bd7b4d566
Tearing was seen when mdp was performing clear on fb because
acquire fence was not being passed in.
Change-Id: Iea5bcc50efc783497c770779faae59f933252551
1. For Color layer, set zero transform value on COPYBIT_TRANSFORM
otherwise it causes MDP IOMMU page fault at 90/270 degree rotation.
2. Color layer is part of Copybit context list, so no need to call
msm_copybit() explicitly for it, that will be called during flush.
Change-Id: I4421b4bddfeca56b0ad8534d921c3d743a7d92bb
Initialize release and acquire fence fds of Copybit context to -1.
Otherwise fd 0 gets closed in first call to msm_copybit, which is
valid fd and it leads to bad state if fd 0 is being used as stdin.
Change-Id: I01278bbb580d61e2d4b4c7b3f7b346274af6d914
We are using the solid fill feature for
clearing the wormhole region using black
color.
Using the src buffer same as dst buffer to
avoid kernel checks for this use case.
Change-Id: Ia46aded9b067ece83c9df1f2c2cdd6b017fa64ea
1. Color layer has a destination rectangle, RGBA color and plane
alpha. There is no gralloc buffer. Layer flag HWC_COLOR_FILL
denotes color layer. MDP BLIT happens via MDP_SOLID_FILL mode.
2. There is no color member in HWC layer, so RGBA color value is
passed via "tranform" member from framework to HAL.
3. Update HWC query to enable framework to query for Color layer
support in HAL, at run-time.
Change-Id: I2c698007c1689779fe86d549093bb5285432dc5f
This changes removes the use of 5551 and 4444 pixel formats
as its not supported anymore
Change-Id: I817510c3c7c0c3d95924c2ffc79e5727a6d6c48f
(cherry picked from commit 1fbd4a9662b07d53a3f220c91b3e85ca571a4938)
1.Framework notifies HAL with "HWC_FORMAT_RB_SWAP" layer flag to handle
a limitation where R and B components were swapped in Rendering phase.
2.Add "R/B swap" in hwc query to enable framework to query for support
in display HAL, at run-time.
Change-Id: I3b44d15b51b4f24939048fee9d1bac2b9009c97c
Adding support for interleaved HAL_PIXEL_FORMAT_YCbCr_422_I and
HAL_PIXEL_FORMAT_YCrCb_422_I format in display HAL.
Change-Id: Ib87d9bf481c20bf6a92293dd04746719b1d928c1
In certain corner cases copybit would make an intermediate BLIT
call. In these cases the intermediate release fd would be not
be closed.
Change-Id: I031fd5b375a5e9dd8bdcc46c67fc5ccbdfa4dfb7
Some applications send RGBA layer with constant alpha 0xFF and
isOpaque=1. For these types of layer we don't get any wormHole
regions. Hence we see the previous content (framebuffer) due to
wrong selection of blending logic at kernel side.
To fix these kind of issues on MDP3 we make layer with Z order
zero as FG layer. This makes sure that proper blending logic
is chosen in kernel.
CRs-fixed: 521638
CRs-fixed: 517944
Change-Id: I172a46c3284916264a1413a6a16875afea2b1aad
The counter that was incremented when an acquire fence was provided
was not the counter that was passed into the blit call. Due to
blit requests being processed in order that it is submitted, it is
not need to pass in previous release fence as acquire fence for
next blit request.
Change-Id: Ic259af24b33e5e69440d481c92788107ff639bed
Currently framework is not returning the correct MDP format
corresponding to HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS format.
Modifying the right format to be returned.
Change-Id: I1862dea6daf6cc90e25492af7bf2e7f3bf6328ec
Display headers used by other components should be at a common
location to avoid issues with future changes in paths.
Change-Id: Iaec21206b82dd7dae03e598b9ec46b3e6f1bbf71
Pass in buffer handle before it is freed to prevent blit operation
from failing while importing buffer.
Change-Id: I4a944e7b2c0f6e19b55ed5602eda49d14d5e78f0
Fix the format mismatch between HAL and MDP formats
in copybit. This is to handle chroma issues on 8x10
for SW decoded videos.
Change-Id: I0b1ddc10cfca0c8b219838b33253a0c87b7c8f97
On HDMI connect or other use cases where finish_copybit
is called, reset dst_surface_mapped and dst_surface_base
as destination surface is already unmapped.
Change-Id: I0073a46178e6b1ecfdbf0a08d8790af4271bc37b
CRs-fixed: 481685
CRs-fixed: 502555
Since mdp composition is now an async call, the waiting for fences
is now no longer needed inside copybit. In addition, how
composition ioctl is called is slightly different as a result
needing to pass in aquire fences device performing compsition
Change-Id: Ia12dfb2960ba2fc78b14e776984ffe0c3fe45fdb
This change is the hwc and copybit changes need to enable
composition to go through mdp on msm8610.
Change-Id: If0df3a247c5f4f4310966d14fe8fd839bf84b9d5
Add check in copybit for Max. layers supported by HWC. Increase
max. RGB surfaces to MAX_NUM_LAYERS to support known use cases.
CRs-Fixed: 481226
Change-Id: Ie30ab0ef3047a304133cb547902ae11fecc5db22
