1. It helps in checking gralloc private usage flags at compile time.
2. Define GRALLOC_MODULE_PERFORM_GET_UBWC_FLAG to enable client to
query the value of "PRIV_FLAGS_UBWC_ALIGNED" flag at run time.
3. Add ADRENO_PIXELFORMAT_NV12_EXT in defined Adreno Pixel formats
to fix NV12_UBWC HAL pixel format conversion to Adreno format.
Change-Id: I78ccac98f1bd1bfbd2aa596ceb7a293f3d2e5f6e
API to allow the video decoder to set the S3D format.
The supported format definitions have moved to qdMetadata.h
for uniformity.
Change-Id: I2b313bf72df97ae948e7efc7faf4a4441c0ef5ce
Camera sends IMPLEMENTATION_DEFINED format, so if UBWC gralloc usage
flag is set, it expects gralloc to set the pixel format as NV12_UBWC
instead of use-case specific pixel formats.
Change-Id: Id0a11893401d1338f4f123ca8df029ed96b18ab9
1. Allow UBWC allocation, if client is using an explicitly defined
UBWC HAL pixel format OR if client sets UBWC gralloc usage flag and
GPU supports the format.
2. EGL wants gralloc to set PRIV_FLAGS_UBWC_ALIGNED bit in private
handle flags, only if GPU supports UBWC for that format.
Change-Id: I4194a046217cbc4c0a8ac2b2fb4b73ebd5076fc2
Modify getYUVPlaneInfo to return data from metadata
as well, if the geometry has changed, and align it
according to the format.
Change-Id: I119a1719c214c87e542b471c9cd9a20b01e2bf5e
Add adreno_utils header to define Adreno pixel formats, which are
needed by gralloc to map HAL format to corresponding Adreno format.
Change-Id: I6d38f34583955e3990393801f1dca0dd9aa2013b
1. Add support for UBWC allocation in the Gralloc APIs for aligned
width, aligned height and buffer size. A client can request for UBWC
allocation by sending UBWC specific HAL pixel format or by setting
GRALLOC_USAGE_PRIVATE_ALLOC_UBWC flag in the usage flags.
2. Gralloc allocates UBWC aligned buffer, only if format is supported
by GPU and MDP and no CPU usage flags are set. Otherwise it allocates
linear buffer.
3. If UBWC conditions are met, gralloc sets PRIV_FLAGS_UBWC_ALIGNED
in private handle flags to tell client that allocated buffer has UBWC
alignment. This flag remains unset by default.
4. Add helper functions in gralloc to calculate UBWC meta buffer size
for RGB* formats.
5. Add UBWC HAL pixel format HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC
which has been defined by Video module.
6. Add AdrenoMemInfo api to query, if GPU supports UBWC for a format.
7.MDP driver expects UBWC specific pixel format defined by MDP header.
Change-Id: I5b4344bc90aa498dbdb7bb8100e70ed7728e6ea5
This helps in checking the formats using the defines at
compile time.
Helps in removing dependency of other modules on display
HAL
Change-Id: I8bd9bf471b2bcf26ccdfeb0cf3cb4ef31faf5702
Remove the unused gralloc flag: GRALLOC_USAGE_PRIVATE_UI_CONTIG_HEAP.
It was only used when we had ION carveout allocations for UI. It is
not needed anymore and no module is using it.
Change-Id: I46ec5758ec3c753ee20426c258aa2a0a46f6a4ac
Allocate gralloc buffers cached by default unless clients specify
uncached using PRIVATE_UNCACHED or READ_RARELY or WRITE_RARELY at
allocation time. Some clients could use gralloc for allocation but
later won't use lock()/unlock() for CPU operations and likely use
their own caching methods. Cached by default helps such clients.
SW usage flags are not defined as bit values, so do not use bitops
on those flags.
Change-Id: Id371de2ec6efbfa0ed84172b3540f3ebc8f5d459
Change gralloc perform enums to #defines, so that gfx libraries
can use this to determine if the feature is supported on the
current version of display HAL.
Change-Id: I22f5502e5801b5ab586f9b054afc4275844318c6
Pass a flag to ion to allow non-contiguous allocations with a sg
(scatter gather) list of 1MB chunks for all secure buffers except
secure display.
Change-Id: Ife2709e94571ab7603b29da17805a857ba73fd72
lock() can be called from a CpuConsumer with only the READ_OFTEN flag
so relying only on that makes gralloc assume there are no non cpu
writers.
Store the writer information during allocation in private flags of
handle and refer to those during lock()
Change-Id: Ifbf25ebc74dbf4e422a2fdec52ec000cd75e549b
For PROTECTED but NON SECURE layers set MDP_SMP_FORCE_ALLOC flag
to allow SMP allocation and prevent GPU fallback
In Such cases if video resolution changes dynamically
it fails to display layer due to GPU fallback.
Use this flag for FB layer composition and depricate
MDP_BACKEND_COMPOSITION flag.
Change-Id: I9ab7cbdd2e12b56dfa67d5b4b3ff6b2dcd0096be
- The client sets this metadata to inform GPU to map the CP buffer
- GPU will check the PRIV_FLAG_SECURE and this metadata to map the CP buffer
- If this field is not set on the buffer handle, then GPU will not map
the CP buffer
- Allow mapping of metadata for SECURE_BUFFERS also
Change-Id: I86300a1b4e3008f9d0884940420e9036c47a016f
-Clients not having WRITE_OFTEN or READ_OFTEN are uncached.
-Invalidate cache on lock only if CPU needs to read and there
are non-CPU writers in system (camera,gpu etc)
-Flush cache on unlock only if CPU writes. Since all buffers will be
read in HWC(MDP) there is no need to check if readers exist.
Change-Id: Icd114e60b7456bd71592b81016892e806c37cb22
- Use proper alignment for cstride while calculating the
ycbcr info for YV12 format
- This fixes the corruption issue when the video is composed
using GPU
CRs-fixed: 711696
Change-Id: I776cc6c5ce781ea3de25b5d8427345b512a8305a
- After mmap, use the meta data ioctl to get the ION fd
for the framebuffer memory as GPU expects buffers to
from ION
- Set appropriate flags for the framebuffer private handle
- Remove unused members
Change-Id: I45c4917d9811cd3b3800adf222b92f41f97430c0
Update buffer geometry is supported through metadata, hence remove
GRALLOC_MODULE_PERFORM_UPDATE_BUFFER_GEOMETRY support
Change-Id: I349a966c383e16600126634723da15f4137a30d8
1. Use MDP rotator to rotate RGB layers which are rendered by software
2. Restrict total number of rotator sessions to 4 for all displays
3. Disable RGB layer rotation for all MDP versions < MDP5
Change-Id: Ie93111082dff9a16b614e9768df5d8ce83ff9e25
Set Data alignment to 1M only for secureed buffers which
are allocated via MM heap. IOMMU heap allocated buffers
should have buffer alignment of 4k.
Change-Id: I501b35ab103b687f1081338e0c100c29e0b9c4bf
Graphics requires 32 pixel alignment and camera driver is being
updated to this.
Change-Id: I00fe659f7a16abeb8f65d9bbf41a24a7c8113bfb
CRs-fixed: 476475
NV12 spec says that the chroma stride is the same as the luma
stride. The camera hardware produces YUV data per this spec.
NV21 has the same behaviour with the chroma samples reversed.
Venus also conforms to this.
Change-Id: I6e107b2a3ba6f51e135348bd147a9c26be003bb2
The Ion API is changing yet again. heap_mask has been renamed in Ion to
heap_id_mask. Rename ours.
Change-Id: I70154b7166ce66b27ae37e31345f32480d2b9b2d
Remove opaque types like size_t, uintptr_t, intptr_t to support
32bit and 64bit processes together.
When a 64bit process creates a handle and a 32bit process validates
the incoming ints against expected ints, opaque types lead to
different and mismatching values.
Always use unit64_t for base address for 32bit and 64bit SF.
Use unsigned int for offset and size, since ION uses that.
Change-Id: I7db5544556a8924f98010b965f837592e9f0b4ca
To comply with multi-arch build system changes for 64-bit support,
LOCAL_MODULE_RELATIVE_PATH needs to be used.
Drop explicit use of LOCAL_MODULE_PATH as its not needed, and
causes build system to overwrite one of multi-arch library
variants with the other arch variant.
Change-Id: I882de72ad2003f1e2bcc93fb63bad7377a84d31d
The android_ycbcr structure in graphics.h is populated to give
the luma and chroma addresses. Use the same structure to give
this information to graphics via a gralloc perform call.
Change-Id: Ib42866a9ea90873886dcb60a1aac6cb375292642
* Provide a binder interface call for wfd module
to inform display about the start/stop/pause/resume
of wfd session.
* This is needed for wfd-hdmi synchronization in
case of v4l2 wfd solution. If hdmi is plugged
in during v4l2 wfd session, display-hal waits in
uevent thread for wfd teardown notification from
wfd module, before going ahead with configuring
external display.
* For VDS WFD solution, display-hal waits in uevent
thread for wfd-teardown to be signalled from
the composition thread.
Change-Id: I9514cb5bc7ff81de0b5dd4cdf66d8286a64ba094
