1. It helps in checking gralloc private usage flags at compile time.
2. Define GRALLOC_MODULE_PERFORM_GET_UBWC_FLAG to enable client to
query the value of "PRIV_FLAGS_UBWC_ALIGNED" flag at run time.
3. Add ADRENO_PIXELFORMAT_NV12_EXT in defined Adreno Pixel formats
to fix NV12_UBWC HAL pixel format conversion to Adreno format.
Change-Id: I78ccac98f1bd1bfbd2aa596ceb7a293f3d2e5f6e
API to allow the video decoder to set the S3D format.
The supported format definitions have moved to qdMetadata.h
for uniformity.
Change-Id: I2b313bf72df97ae948e7efc7faf4a4441c0ef5ce
1. Add support for UBWC allocation in the Gralloc APIs for aligned
width, aligned height and buffer size. A client can request for UBWC
allocation by sending UBWC specific HAL pixel format or by setting
GRALLOC_USAGE_PRIVATE_ALLOC_UBWC flag in the usage flags.
2. Gralloc allocates UBWC aligned buffer, only if format is supported
by GPU and MDP and no CPU usage flags are set. Otherwise it allocates
linear buffer.
3. If UBWC conditions are met, gralloc sets PRIV_FLAGS_UBWC_ALIGNED
in private handle flags to tell client that allocated buffer has UBWC
alignment. This flag remains unset by default.
4. Add helper functions in gralloc to calculate UBWC meta buffer size
for RGB* formats.
5. Add UBWC HAL pixel format HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC
which has been defined by Video module.
6. Add AdrenoMemInfo api to query, if GPU supports UBWC for a format.
7.MDP driver expects UBWC specific pixel format defined by MDP header.
Change-Id: I5b4344bc90aa498dbdb7bb8100e70ed7728e6ea5
This helps in checking the formats using the defines at
compile time.
Helps in removing dependency of other modules on display
HAL
Change-Id: I8bd9bf471b2bcf26ccdfeb0cf3cb4ef31faf5702
Remove the unused gralloc flag: GRALLOC_USAGE_PRIVATE_UI_CONTIG_HEAP.
It was only used when we had ION carveout allocations for UI. It is
not needed anymore and no module is using it.
Change-Id: I46ec5758ec3c753ee20426c258aa2a0a46f6a4ac
Allocate gralloc buffers cached by default unless clients specify
uncached using PRIVATE_UNCACHED or READ_RARELY or WRITE_RARELY at
allocation time. Some clients could use gralloc for allocation but
later won't use lock()/unlock() for CPU operations and likely use
their own caching methods. Cached by default helps such clients.
SW usage flags are not defined as bit values, so do not use bitops
on those flags.
Change-Id: Id371de2ec6efbfa0ed84172b3540f3ebc8f5d459
Change gralloc perform enums to #defines, so that gfx libraries
can use this to determine if the feature is supported on the
current version of display HAL.
Change-Id: I22f5502e5801b5ab586f9b054afc4275844318c6
lock() can be called from a CpuConsumer with only the READ_OFTEN flag
so relying only on that makes gralloc assume there are no non cpu
writers.
Store the writer information during allocation in private flags of
handle and refer to those during lock()
Change-Id: Ifbf25ebc74dbf4e422a2fdec52ec000cd75e549b
For PROTECTED but NON SECURE layers set MDP_SMP_FORCE_ALLOC flag
to allow SMP allocation and prevent GPU fallback
In Such cases if video resolution changes dynamically
it fails to display layer due to GPU fallback.
Use this flag for FB layer composition and depricate
MDP_BACKEND_COMPOSITION flag.
Change-Id: I9ab7cbdd2e12b56dfa67d5b4b3ff6b2dcd0096be
-Clients not having WRITE_OFTEN or READ_OFTEN are uncached.
-Invalidate cache on lock only if CPU needs to read and there
are non-CPU writers in system (camera,gpu etc)
-Flush cache on unlock only if CPU writes. Since all buffers will be
read in HWC(MDP) there is no need to check if readers exist.
Change-Id: Icd114e60b7456bd71592b81016892e806c37cb22
1. Use MDP rotator to rotate RGB layers which are rendered by software
2. Restrict total number of rotator sessions to 4 for all displays
3. Disable RGB layer rotation for all MDP versions < MDP5
Change-Id: Ie93111082dff9a16b614e9768df5d8ce83ff9e25
Remove opaque types like size_t, uintptr_t, intptr_t to support
32bit and 64bit processes together.
When a 64bit process creates a handle and a 32bit process validates
the incoming ints against expected ints, opaque types lead to
different and mismatching values.
Always use unit64_t for base address for 32bit and 64bit SF.
Use unsigned int for offset and size, since ION uses that.
Change-Id: I7db5544556a8924f98010b965f837592e9f0b4ca
The android_ycbcr structure in graphics.h is populated to give
the luma and chroma addresses. Use the same structure to give
this information to graphics via a gralloc perform call.
Change-Id: Ib42866a9ea90873886dcb60a1aac6cb375292642
The custom stride and height can be set by video
decoder for smooth streaming. Return this in
perform so that graphics can use it
Change-Id: I44c814b2bae1f61d3ec5c36a22d1c6119542b10a
1. Screenrecord and WFD use virtual display and encoder.
Since HAL supports only one virtual display, we need a
definite way to distinguish both use-cases.
Failure to differentiate will break Screen record + WFD
concurrent usecase.
WFD stack will set this usage flag and SF will query the usage
flags to differentiate WFD and screenrecord usecase.
2. Deprecate GRALLOC_USAGE_PRIVATE_EXTERNAL_CC and
GRALLOC_USAGE_PRIVATE_EXTERNAL_BLOCK flags as these are no
longer used.
Change-Id: Ifa260c5af2371eea830744ce62a5a83b8cfd0de7
Macro tile is enabled only if all the conditions are met:
1. GPU hardware should support Macro Tiling.
2. MDSS hardware should support Macro Tiling.
3. USAGE flags shouldnt contain GRALLOC_USAGE_SW_READ_OFTEN and
GRALLOC_USAGE_SW_WRITE_OFTEN.
4. RGB 16bit and 32bit formats.
5. persist.hwc.macro_tile_enable flag should be enabled.
PRIV_FLAGS_TILE_RENDERED flag is added to indicate whether the layer
is rendered/composited in Macro Tiling or Linear format.
Change-Id: Ie3139839c84d76c5d1a2300f33910a09eb7336f4
VPU and MDSS on MPQ8092 supports the 10 bit compressed pixel format
to reduce the memory access bandwidth
Change-Id: I903c52640120c4bf4252405831b98d1ef92c1572
Vcap on MPQ8092 can capture the content in 10 bit pixel formats.
VPU on MPQ8092 also can output the video in 10 bit pixel format
Change-Id: I3f3e938a3e4b2225d870c1d301d4d7bee6cd65f5
The custom stride can be set by video for smooth streaming.
Return this in perform so that graphics can use it.
Change-Id: I798fc0894b8d9662e93769a53a540cb61b527a44
Add Support to HAL_PIXEL_FORMAT_NV21_ZSL format in gralloc for
camera capture usecase.
This support is required because, CPP module requires 64 byte
aligned width and height to resolve corruption in bottom/left edge
of the landscape/portrait buffer.
Change-Id: Id3e0e5f3d695d5111f3469f78a1d52aad9bea4f4
(cherry picked from commit 512ee1dcef6fa47dfdcf3990fea29bd85f967f02)
1.Framework notifies HAL with "HWC_FORMAT_RB_SWAP" layer flag to handle
a limitation where R and B components were swapped in Rendering phase.
2.Add "R/B swap" in hwc query to enable framework to query for support
in display HAL, at run-time.
Change-Id: I3b44d15b51b4f24939048fee9d1bac2b9009c97c
- Identify secure display layer in the hwc_list
- Need to set both SECURE_OVERLAY and SECURE_DISPLAY flags for the secure
display layer
- Disable idle timeout for secure display usecase, as GPU should not be
accessing secure display layer
Change-Id: I555910db77c466b5e103b24b4f0ec7f47bb210a5
Adding support for interleaved HAL_PIXEL_FORMAT_YCbCr_422_I and
HAL_PIXEL_FORMAT_YCrCb_422_I format in display HAL.
Change-Id: Ib87d9bf481c20bf6a92293dd04746719b1d928c1
- Adds flag GRALLOC_USAGE_PRIVATE_CAMERA_HEAP to use the dedicated
CAMERA_HEAP
- Remove GRALLOC_USAGE_PRIVATE_CP_BUFFER which is not used anymore
Change-Id: Iefea88d9a67d2fa0ca74492f508e1d5508d08983
If there are any EXTERNAL_ONLY layers present in the list, mark
them as HWC_OVERLAY such that SF does not compose and in hwc_set
post that layer to Ext display, ignore other layers
Change-Id: Ic5db3bfa88295167d23d1fb2be7640c9fc772054
These format qualifiers will help graphics decide which
standard to use when working with a YUV texture.
Change-Id: I6ad464e6b070d3b375c5e07f03228308d15407cd
Consumer of gralloc buffers need to distinguish between buffers
with different usage flags, such as HW_TEXTURE vs VIDEO_ENCODER.
Change-Id: Idc330390c184ea942c096b84d29afe7705c06e4d
Some clients need to distinguish between buffers going to HWC
for composition and other regular buffers.
Change-Id: Ia05a765afe2f8bd223f3e47edd0fb746d6ade531
genlock is no-op from Android 4.2 onwards since the sync framework
is used for explicit synchronization.
Change-Id: Idd1df589516534a683e0fa1ef0cfbb7f0e411f67
This changes GRALLOC_USAGE_PRIVATE_CAMERA_HEAP to
GRALLOC_USAGE_PRIVATE_ADSP_HEAP as the CAMERA_HEAP
is not used anymore
Change-Id: I5a95f68c4c7f4445ade2398dd239faad9ed16b22
- Introduce a new class to Get the Adreno computed stride information.
This class has been added to allow adreno library computed strides to
be propagated to the allocation function as well as those clients
requesting it.
- Add a new Perform function to get the stride. The width and the format
can be passed from the calling functions (like EGL) to get the stride of
the buffer.
Change-Id: I4c2b4a02deff327f0ea5558c478997527fe9d3cf
Make the display HALs compile with/without the Qualcomm BSP
specific features so they can work with pure AOSP.
Change-Id: I1ad7282c4fe1fe7e3309afb530a07735f165ffbe
Allocate extra space for metadata in buffer handles
Provide api to map this space in client process and set the metadata
Change-Id: I8bca8448670d4aa88d439320faf402dae30458f8
Add case GRALLOC_MODULE_PERFORM_UPDATE_BUFFER_GEOMETRY in
gralloc_perform function to update the new buffer dimensions.
Change-Id: I7a855dc017dd042dda2abdc28c51ce5ec919fceb
