--Move fb_id creation/deletion from gralloc to DAL and make it per
cycle
--Make Gralloc/HWC/SDM structures independent of libdrmutils
and fb_id / gemhandles
--Pass BufferAllocator pointer to Display* and HWDevice*
--Add new GetBufferLayout API to BufferAllocator that can be called
by DAL before creating fb_id
Change-Id: I102f432cccee912ad4bcce622764938fa3d36ed3
CRs-fixed: 1114808
Define new HAL color format for RAW-8 stream and
add support for buffer allocation with RAW-8 format.
Change-Id: I1ee1dbd270d25c27e52c5dd023345c8283c658d2
Add support for booting up with default non-atomic mode
Add libdrmutils that currently has:
DRMMaster:
Creates a master DRM session
Converts ION handles to DRM FB_ID
DRMResMgr:
Enables a default display path by providing APIs for
connector id, crtc id, mode etc
Change-Id: I1dc697d2cc5e3fa744c99e2c9ddd57bf06e78c4f
CRs-fixed: 1114808
Add support for BGR_888 and CBYCRY_422_I in display HAL. The
new formats will be used by QCarCam Application.
CRs-Fixed: 1116491
Change-Id: I5ccca57a3ca2d27c4e064b0c5abd68c77c7afadd
- Add Rec2020 CSC in qdMetadata for limited/full range
- Expose CSC as #defines in gralloc private header to
help GFX decouple from the display headers
Change-Id: I90ee2708275bf1a37ece0fce2f0867dfad64e39a
Crs-fixed: 1074164
- Use getpagesize() function from unistd.h to get page size
in place of PAGE_SIZE macro.
- Make isDisableUBWCForEncoder declaration pure virtual.
Change-Id: I89405e999e4683874f4daa32188181e688a19812
CRs-Fixed: 1069351
Align Venus TP10 UBWC format enum value to the value defined in the
video header, in the same way as its done for Venus UBWC format
Change-Id: I4e929d8dd028dc3f854f1ec9ecc5f8dbbfae98be
CRs-fixed: 1061950
Add unaligned_width and unaligned_height in private_handle_t to store
the buffer resolution without alignment that client asked to allocate.
Change-Id: I28d757af4178f581e6a83dc06198106c85fc7262
CRs-Fixed: 1040942
On some targets, Venus h/w can support 4k decoding but mdss
can handle only upto 2k.
So, in usecases where the resolution of the video
is more than 2k, venus h/w would downscale the content to 2k
and allocate the output decoded buffers at 2k.
In cases where display(SF) is not the consumer of the
decoded buffers(for ex:transcoding, etc), downscaling
need not happen.
So, video f/w needs a mechanism to identify the consumer
of the decoded buffers and allocate them accordingly.
The buffers would be allocated at the incoming video
resolution by default. During allocation, the gralloc private
flag PRIV_FLAGS_DISP_CONSUMER would be set to indicate to the
video f/w if display is the consumer of the content.
If display happens to be the consumer and the resolution
of the incoming video is more than 2k, video f/w would
cancel the earlier allocated buffers and would allocate
the new buffers at 2k.
Change-Id: Ic6e562d357eadb8d49b166b454746f91ccc85ed8
Currently both handle metadata and handle flags are used to indicate
the color space. This change deprecates support for flags.
Also gralloc doesn't set a color space based on use case anymore,
since front-end requirements keep changing. The default is set to 601
and the onus of correctly specifying the color space now rests on
clients.
CRs-fixed: 919117
Change-Id: I4988830e22804517b393c60dbe641d3bd1d790ec
- Define new format in gralloc_priv.h header
- Add support for HAL_PIXEL_FORMAT_BGR_565 while allocating buffers
CRs-fixed: 904907
Change-Id: I2cf3cdcfc5c89b11abc4ceb4daba77a5123ecf67
Add PRIV_FLAGS_INTERNAL_ONLY which will be used by clients
to know if that is an INTERNAL only layer.
Change-Id: I2cc69bcbc86c18d97ce0c841670b760e48721ffa
A client can call GRALLOC_MODULE_PERFORM_GET_RGB_DATA_ADDRESS api
to get RGB data address for any linear or UBWC aligned RGB buffer.
Change-Id: I3a7d25f504b7ba1dec79cc872cafbb38ddbb6bd2
* Earlier, camera preview buffers were of NV21(YCrCb_420_SP)
and the video buffers were of NV12_VENUS(YCbCr_420_SP_VENUS)
format. Now that the video encoder has support for NV21,
both the camera and video buffers can be of
NV21_VENUS(YCrCb_420_SP_VENUS) format.
* If the preview and video buffer sizes are the same,
CPP double pass to generate video and preview buffers can be
avoided and the buffers can now be generated within a single pass
with CPP duplication thereby saving power.
* Add support in gralloc for NV12_VENUS format to achieve
the same.
Change-Id: I7001f975f2cafa21c893e7384ddbddd5f2788b1d
1. Reclaim some old gralloc flags.
2. System heap allocation happens by default.
3. Remove some unused private flags.
4. Add heapid member to alloc_data to better line up with ion
header
5. Remove check for MDSS_TARGET
Change-Id: I37be0a2fcd5fd4a14bb9ca235fcae41f6f3ec19e
1. It helps in checking gralloc private usage flags at compile time.
2. Define GRALLOC_MODULE_PERFORM_GET_UBWC_FLAG to enable client to
query the value of "PRIV_FLAGS_UBWC_ALIGNED" flag at run time.
3. Add ADRENO_PIXELFORMAT_NV12_EXT in defined Adreno Pixel formats
to fix NV12_UBWC HAL pixel format conversion to Adreno format.
Change-Id: I78ccac98f1bd1bfbd2aa596ceb7a293f3d2e5f6e
API to allow the video decoder to set the S3D format.
The supported format definitions have moved to qdMetadata.h
for uniformity.
Change-Id: I2b313bf72df97ae948e7efc7faf4a4441c0ef5ce
1. Add support for UBWC allocation in the Gralloc APIs for aligned
width, aligned height and buffer size. A client can request for UBWC
allocation by sending UBWC specific HAL pixel format or by setting
GRALLOC_USAGE_PRIVATE_ALLOC_UBWC flag in the usage flags.
2. Gralloc allocates UBWC aligned buffer, only if format is supported
by GPU and MDP and no CPU usage flags are set. Otherwise it allocates
linear buffer.
3. If UBWC conditions are met, gralloc sets PRIV_FLAGS_UBWC_ALIGNED
in private handle flags to tell client that allocated buffer has UBWC
alignment. This flag remains unset by default.
4. Add helper functions in gralloc to calculate UBWC meta buffer size
for RGB* formats.
5. Add UBWC HAL pixel format HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC
which has been defined by Video module.
6. Add AdrenoMemInfo api to query, if GPU supports UBWC for a format.
7.MDP driver expects UBWC specific pixel format defined by MDP header.
Change-Id: I5b4344bc90aa498dbdb7bb8100e70ed7728e6ea5
This helps in checking the formats using the defines at
compile time.
Helps in removing dependency of other modules on display
HAL
Change-Id: I8bd9bf471b2bcf26ccdfeb0cf3cb4ef31faf5702
Remove the unused gralloc flag: GRALLOC_USAGE_PRIVATE_UI_CONTIG_HEAP.
It was only used when we had ION carveout allocations for UI. It is
not needed anymore and no module is using it.
Change-Id: I46ec5758ec3c753ee20426c258aa2a0a46f6a4ac
Allocate gralloc buffers cached by default unless clients specify
uncached using PRIVATE_UNCACHED or READ_RARELY or WRITE_RARELY at
allocation time. Some clients could use gralloc for allocation but
later won't use lock()/unlock() for CPU operations and likely use
their own caching methods. Cached by default helps such clients.
SW usage flags are not defined as bit values, so do not use bitops
on those flags.
Change-Id: Id371de2ec6efbfa0ed84172b3540f3ebc8f5d459
Change gralloc perform enums to #defines, so that gfx libraries
can use this to determine if the feature is supported on the
current version of display HAL.
Change-Id: I22f5502e5801b5ab586f9b054afc4275844318c6
lock() can be called from a CpuConsumer with only the READ_OFTEN flag
so relying only on that makes gralloc assume there are no non cpu
writers.
Store the writer information during allocation in private flags of
handle and refer to those during lock()
Change-Id: Ifbf25ebc74dbf4e422a2fdec52ec000cd75e549b
For PROTECTED but NON SECURE layers set MDP_SMP_FORCE_ALLOC flag
to allow SMP allocation and prevent GPU fallback
In Such cases if video resolution changes dynamically
it fails to display layer due to GPU fallback.
Use this flag for FB layer composition and depricate
MDP_BACKEND_COMPOSITION flag.
Change-Id: I9ab7cbdd2e12b56dfa67d5b4b3ff6b2dcd0096be
-Clients not having WRITE_OFTEN or READ_OFTEN are uncached.
-Invalidate cache on lock only if CPU needs to read and there
are non-CPU writers in system (camera,gpu etc)
-Flush cache on unlock only if CPU writes. Since all buffers will be
read in HWC(MDP) there is no need to check if readers exist.
Change-Id: Icd114e60b7456bd71592b81016892e806c37cb22
1. Use MDP rotator to rotate RGB layers which are rendered by software
2. Restrict total number of rotator sessions to 4 for all displays
3. Disable RGB layer rotation for all MDP versions < MDP5
Change-Id: Ie93111082dff9a16b614e9768df5d8ce83ff9e25
Remove opaque types like size_t, uintptr_t, intptr_t to support
32bit and 64bit processes together.
When a 64bit process creates a handle and a 32bit process validates
the incoming ints against expected ints, opaque types lead to
different and mismatching values.
Always use unit64_t for base address for 32bit and 64bit SF.
Use unsigned int for offset and size, since ION uses that.
Change-Id: I7db5544556a8924f98010b965f837592e9f0b4ca
The android_ycbcr structure in graphics.h is populated to give
the luma and chroma addresses. Use the same structure to give
this information to graphics via a gralloc perform call.
Change-Id: Ib42866a9ea90873886dcb60a1aac6cb375292642
The custom stride and height can be set by video
decoder for smooth streaming. Return this in
perform so that graphics can use it
Change-Id: I44c814b2bae1f61d3ec5c36a22d1c6119542b10a
1. Screenrecord and WFD use virtual display and encoder.
Since HAL supports only one virtual display, we need a
definite way to distinguish both use-cases.
Failure to differentiate will break Screen record + WFD
concurrent usecase.
WFD stack will set this usage flag and SF will query the usage
flags to differentiate WFD and screenrecord usecase.
2. Deprecate GRALLOC_USAGE_PRIVATE_EXTERNAL_CC and
GRALLOC_USAGE_PRIVATE_EXTERNAL_BLOCK flags as these are no
longer used.
Change-Id: Ifa260c5af2371eea830744ce62a5a83b8cfd0de7
Macro tile is enabled only if all the conditions are met:
1. GPU hardware should support Macro Tiling.
2. MDSS hardware should support Macro Tiling.
3. USAGE flags shouldnt contain GRALLOC_USAGE_SW_READ_OFTEN and
GRALLOC_USAGE_SW_WRITE_OFTEN.
4. RGB 16bit and 32bit formats.
5. persist.hwc.macro_tile_enable flag should be enabled.
PRIV_FLAGS_TILE_RENDERED flag is added to indicate whether the layer
is rendered/composited in Macro Tiling or Linear format.
Change-Id: Ie3139839c84d76c5d1a2300f33910a09eb7336f4
VPU and MDSS on MPQ8092 supports the 10 bit compressed pixel format
to reduce the memory access bandwidth
Change-Id: I903c52640120c4bf4252405831b98d1ef92c1572
