The previous check for RGB formats skipped certain formats and hence
the alignment was incorrect.
Add a check for all non-compressed RGB formats before calling
getGpuAlignedWidthHeight
CRs-fixed: 888733
Change-Id: Icae4cfb92ceae5e593fd6c5658999fc90ef97ea1
Allow UBWC, if an OpenGL client sets UBWC usage flag and GPU plus MDP
support the format. OR if a non-OpenGL client like Rotator, sets UBWC
usage flag and MDP supports the format. It de-couples the UBWC decision
for Rotator output buffer format from GPU.
Change-Id: I5e78b615f71c1781a40b8c137a37b111eb786323
Return aligned width and height in case meta operation is
UPDATE_BUFFER_GEOMETRY.
CRs-Fixed: 880373
Change-Id: I3b263518d509f4de68c93692eace3cb0b2c69808
1. Define LINEAR_FORMAT operation in MetaData.
2. VENUS ouput buffer is linear for NV12_UBWC Interlaced video playback.
So Video module performs LINEAR_FORMAT operation to set "linearFormat"
metadata member to NV12 linear format in case of Interlaced video.
3. Handle LINEAR_FORMAT metadata operation in HWC wrapper and gralloc.
CRs-Fixed: 855474
Change-Id: I77dd72bec26f225de75adb6c214ccd90db239e3e
1. Remove unused libraries libhdmi, liboverlay and libhwcomposer.
2. Remove unused functions and files from libqdutils.
2. Add querySDEInfo() function in qdutisl to query SDE capability.
Change-Id: Ibea2dd2d22fecb420079e3b7cbbcc57d10f75d49
1. Fix the missed ALIGN in getUBwcMetaBufferSize api.
2. Fix de-reference of data address pointer in getRgbDataAddress api.
Change-Id: I5dae2b6f449bb9a5b0dcc23110a2efce36060a42
Make all content protection and secure display heaps and flags
backward compatible. Honor the different requirements for master
side and slave side content protection and secure display.
Change-Id: I21a5170f2ae7ffd9c447e8af795e3665e673248f
This patch adds a new debug property
that can be used to disable UBWC compilant
allocations for graphics stack by gralloc.
Change-Id: I59e5994700730c73d62eec9f74ab6ded60c2d256
A client can call GRALLOC_MODULE_PERFORM_GET_RGB_DATA_ADDRESS api
to get RGB data address for any linear or UBWC aligned RGB buffer.
Change-Id: I3a7d25f504b7ba1dec79cc872cafbb38ddbb6bd2
* Earlier, camera preview buffers were of NV21(YCrCb_420_SP)
and the video buffers were of NV12_VENUS(YCbCr_420_SP_VENUS)
format. Now that the video encoder has support for NV21,
both the camera and video buffers can be of
NV21_VENUS(YCrCb_420_SP_VENUS) format.
* If the preview and video buffer sizes are the same,
CPP double pass to generate video and preview buffers can be
avoided and the buffers can now be generated within a single pass
with CPP duplication thereby saving power.
* Add support in gralloc for NV12_VENUS format to achieve
the same.
Change-Id: I7001f975f2cafa21c893e7384ddbddd5f2788b1d
1. Add support for RGBX_8888 UBWC in display engine and gralloc APIs.
2. Set the appropriate rotator output format for RGB* UBWC formats.
3. Move the UBWC aligned format enums in their appropriate range.
Change-Id: I0107f10894f9edbe657fce29b99f6e909c675150
Add support for new secure system heap and corresponding flags
for all pixel buffers. Keep the old mm heap for secure display
buffers.
Change-Id: Ic0ee7783a2d1ff420c34396f7cc4bd5ac3058c44
1. Reclaim some old gralloc flags.
2. System heap allocation happens by default.
3. Remove some unused private flags.
4. Add heapid member to alloc_data to better line up with ion
header
5. Remove check for MDSS_TARGET
Change-Id: I37be0a2fcd5fd4a14bb9ca235fcae41f6f3ec19e
Add support for NV12_UBWC HAL pixel format in getYUVPlaneInfo api to
enable GRALLOC_MODULE_PERFORM_GET_YUV_PLANE_INFO for this format.
Change-Id: I94389ddc45cba94124b36fb3ecb0b947250c0681
1. It helps in checking gralloc private usage flags at compile time.
2. Define GRALLOC_MODULE_PERFORM_GET_UBWC_FLAG to enable client to
query the value of "PRIV_FLAGS_UBWC_ALIGNED" flag at run time.
3. Add ADRENO_PIXELFORMAT_NV12_EXT in defined Adreno Pixel formats
to fix NV12_UBWC HAL pixel format conversion to Adreno format.
Change-Id: I78ccac98f1bd1bfbd2aa596ceb7a293f3d2e5f6e
1. Allow UBWC allocation, if client is using an explicitly defined
UBWC HAL pixel format OR if client sets UBWC gralloc usage flag and
GPU supports the format.
2. EGL wants gralloc to set PRIV_FLAGS_UBWC_ALIGNED bit in private
handle flags, only if GPU supports UBWC for that format.
Change-Id: I4194a046217cbc4c0a8ac2b2fb4b73ebd5076fc2
Modify getYUVPlaneInfo to return data from metadata
as well, if the geometry has changed, and align it
according to the format.
Change-Id: I119a1719c214c87e542b471c9cd9a20b01e2bf5e
Add adreno_utils header to define Adreno pixel formats, which are
needed by gralloc to map HAL format to corresponding Adreno format.
Change-Id: I6d38f34583955e3990393801f1dca0dd9aa2013b
1. Add support for UBWC allocation in the Gralloc APIs for aligned
width, aligned height and buffer size. A client can request for UBWC
allocation by sending UBWC specific HAL pixel format or by setting
GRALLOC_USAGE_PRIVATE_ALLOC_UBWC flag in the usage flags.
2. Gralloc allocates UBWC aligned buffer, only if format is supported
by GPU and MDP and no CPU usage flags are set. Otherwise it allocates
linear buffer.
3. If UBWC conditions are met, gralloc sets PRIV_FLAGS_UBWC_ALIGNED
in private handle flags to tell client that allocated buffer has UBWC
alignment. This flag remains unset by default.
4. Add helper functions in gralloc to calculate UBWC meta buffer size
for RGB* formats.
5. Add UBWC HAL pixel format HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC
which has been defined by Video module.
6. Add AdrenoMemInfo api to query, if GPU supports UBWC for a format.
7.MDP driver expects UBWC specific pixel format defined by MDP header.
Change-Id: I5b4344bc90aa498dbdb7bb8100e70ed7728e6ea5
Remove the unused gralloc flag: GRALLOC_USAGE_PRIVATE_UI_CONTIG_HEAP.
It was only used when we had ION carveout allocations for UI. It is
not needed anymore and no module is using it.
Change-Id: I46ec5758ec3c753ee20426c258aa2a0a46f6a4ac
Allocate gralloc buffers cached by default unless clients specify
uncached using PRIVATE_UNCACHED or READ_RARELY or WRITE_RARELY at
allocation time. Some clients could use gralloc for allocation but
later won't use lock()/unlock() for CPU operations and likely use
their own caching methods. Cached by default helps such clients.
SW usage flags are not defined as bit values, so do not use bitops
on those flags.
Change-Id: Id371de2ec6efbfa0ed84172b3540f3ebc8f5d459
Pass a flag to ion to allow non-contiguous allocations with a sg
(scatter gather) list of 1MB chunks for all secure buffers except
secure display.
Change-Id: Ife2709e94571ab7603b29da17805a857ba73fd72
For PROTECTED but NON SECURE layers set MDP_SMP_FORCE_ALLOC flag
to allow SMP allocation and prevent GPU fallback
In Such cases if video resolution changes dynamically
it fails to display layer due to GPU fallback.
Use this flag for FB layer composition and depricate
MDP_BACKEND_COMPOSITION flag.
Change-Id: I9ab7cbdd2e12b56dfa67d5b4b3ff6b2dcd0096be
-Clients not having WRITE_OFTEN or READ_OFTEN are uncached.
-Invalidate cache on lock only if CPU needs to read and there
are non-CPU writers in system (camera,gpu etc)
-Flush cache on unlock only if CPU writes. Since all buffers will be
read in HWC(MDP) there is no need to check if readers exist.
Change-Id: Icd114e60b7456bd71592b81016892e806c37cb22
- Use proper alignment for cstride while calculating the
ycbcr info for YV12 format
- This fixes the corruption issue when the video is composed
using GPU
CRs-fixed: 711696
Change-Id: I776cc6c5ce781ea3de25b5d8427345b512a8305a
Graphics requires 32 pixel alignment and camera driver is being
updated to this.
Change-Id: I00fe659f7a16abeb8f65d9bbf41a24a7c8113bfb
CRs-fixed: 476475
NV12 spec says that the chroma stride is the same as the luma
stride. The camera hardware produces YUV data per this spec.
NV21 has the same behaviour with the chroma samples reversed.
Venus also conforms to this.
Change-Id: I6e107b2a3ba6f51e135348bd147a9c26be003bb2
Remove opaque types like size_t, uintptr_t, intptr_t to support
32bit and 64bit processes together.
When a 64bit process creates a handle and a 32bit process validates
the incoming ints against expected ints, opaque types lead to
different and mismatching values.
Always use unit64_t for base address for 32bit and 64bit SF.
Use unsigned int for offset and size, since ION uses that.
Change-Id: I7db5544556a8924f98010b965f837592e9f0b4ca
The android_ycbcr structure in graphics.h is populated to give
the luma and chroma addresses. Use the same structure to give
this information to graphics via a gralloc perform call.
Change-Id: Ib42866a9ea90873886dcb60a1aac6cb375292642
