c74ddc87c9
On some panels you end up with all of: - No range descriptor - No description of physical connectivity - Native panel size mode in standard timings list In principle you're supposed to use the timings for that mode from the DMT spec, but in practice the DMT spec has timings for both 1920x1200 normal and 1920x1200RB, and the standard timing field gives you no way to distinguish. And, of course, the non-RB timings don't fit in a single DVI link.
791 lines
24 KiB
C
791 lines
24 KiB
C
/*
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* Copyright 2006 Luc Verhaegen.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* @file This file covers code to convert a xf86MonPtr containing EDID-probed
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* information into a list of modes, including applying monitor-specific
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* quirks to fix broken EDID data.
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#else
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#endif
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#include "xf86.h"
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#include "xf86DDC.h"
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#include <X11/Xatom.h>
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#include "property.h"
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#include "propertyst.h"
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#include "xf86DDC.h"
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#include "xf86Crtc.h"
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#include <string.h>
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#include <math.h>
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/*
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* Quirks to work around broken EDID data from various monitors.
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*/
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typedef enum {
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DDC_QUIRK_NONE = 0,
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/* First detailed mode is bogus, prefer largest mode at 60hz */
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DDC_QUIRK_PREFER_LARGE_60 = 1 << 0,
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/* 135MHz clock is too high, drop a bit */
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DDC_QUIRK_135_CLOCK_TOO_HIGH = 1 << 1,
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/* Prefer the largest mode at 75 Hz */
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DDC_QUIRK_PREFER_LARGE_75 = 1 << 2,
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/* Convert detailed timing's horizontal from units of cm to mm */
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DDC_QUIRK_DETAILED_H_IN_CM = 1 << 3,
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/* Convert detailed timing's vertical from units of cm to mm */
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DDC_QUIRK_DETAILED_V_IN_CM = 1 << 4,
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/* Detailed timing descriptors have bogus size values, so just take the
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* maximum size and use that.
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*/
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DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE = 1 << 5,
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/* Monitor forgot to set the first detailed is preferred bit. */
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DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6,
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/* use +hsync +vsync for detailed mode */
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DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7,
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/* Force single-link DVI bandwidth limit */
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DDC_QUIRK_DVI_SINGLE_LINK = 1 << 8,
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} ddc_quirk_t;
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static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC)
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{
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/* Belinea 10 15 55 */
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if (memcmp (DDC->vendor.name, "MAX", 4) == 0 &&
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((DDC->vendor.prod_id == 1516) ||
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(DDC->vendor.prod_id == 0x77e)))
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return TRUE;
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/* Acer AL1706 */
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if (memcmp (DDC->vendor.name, "ACR", 4) == 0 &&
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DDC->vendor.prod_id == 44358)
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return TRUE;
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/* Bug #10814: Samsung SyncMaster 225BW */
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if (memcmp (DDC->vendor.name, "SAM", 4) == 0 &&
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DDC->vendor.prod_id == 596)
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return TRUE;
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/* Bug #10545: Samsung SyncMaster 226BW */
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if (memcmp (DDC->vendor.name, "SAM", 4) == 0 &&
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DDC->vendor.prod_id == 638)
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return TRUE;
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/* Acer F51 */
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if (memcmp (DDC->vendor.name, "API", 4) == 0 &&
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DDC->vendor.prod_id == 0x7602)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_prefer_large_75 (int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #11603: Funai Electronics PM36B */
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if (memcmp (DDC->vendor.name, "FCM", 4) == 0 &&
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DDC->vendor.prod_id == 13600)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_detailed_h_in_cm (int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #11603: Funai Electronics PM36B */
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if (memcmp (DDC->vendor.name, "FCM", 4) == 0 &&
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DDC->vendor.prod_id == 13600)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_detailed_v_in_cm (int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #11603: Funai Electronics PM36B */
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if (memcmp (DDC->vendor.name, "FCM", 4) == 0 &&
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DDC->vendor.prod_id == 13600)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_detailed_use_maximum_size (int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #10304: LGPhilipsLCD LP154W01-A5 */
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if (memcmp (DDC->vendor.name, "LPL", 4) == 0 &&
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(DDC->vendor.prod_id == 0 || DDC->vendor.prod_id == 0x2a00))
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return TRUE;
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return FALSE;
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}
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static Bool quirk_135_clock_too_high (int scrnIndex, xf86MonPtr DDC)
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{
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/* Envision Peripherals, Inc. EN-7100e. See bug #9550. */
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if (memcmp (DDC->vendor.name, "EPI", 4) == 0 &&
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DDC->vendor.prod_id == 59264)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_first_detailed_preferred (int scrnIndex, xf86MonPtr DDC)
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{
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/* Philips 107p5 CRT. Reported on xorg@ with pastebin. */
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if (memcmp (DDC->vendor.name, "PHL", 4) == 0 &&
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DDC->vendor.prod_id == 57364)
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return TRUE;
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/* Proview AY765C 17" LCD. See bug #15160*/
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if (memcmp (DDC->vendor.name, "PTS", 4) == 0 &&
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DDC->vendor.prod_id == 765)
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return TRUE;
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/* ACR of some sort RH #284231 */
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if (memcmp (DDC->vendor.name, "ACR", 4) == 0 &&
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DDC->vendor.prod_id == 2423)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #12439: Samsung SyncMaster 205BW */
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if (memcmp (DDC->vendor.name, "SAM", 4) == 0 &&
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DDC->vendor.prod_id == 541)
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return TRUE;
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return FALSE;
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}
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/* This should probably be made more generic */
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static Bool quirk_dvi_single_link(int scrnIndex, xf86MonPtr DDC)
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{
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/* Red Hat bug #453106: Apple 23" Cinema Display */
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if (memcmp (DDC->vendor.name, "APL", 4) == 0 &&
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DDC->vendor.prod_id == 0x921c)
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return TRUE;
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return FALSE;
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}
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typedef struct {
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Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
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ddc_quirk_t quirk;
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char *description;
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} ddc_quirk_map_t;
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static const ddc_quirk_map_t ddc_quirks[] = {
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{
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quirk_prefer_large_60, DDC_QUIRK_PREFER_LARGE_60,
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"Detailed timing is not preferred, use largest mode at 60Hz"
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},
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{
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quirk_135_clock_too_high, DDC_QUIRK_135_CLOCK_TOO_HIGH,
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"Recommended 135MHz pixel clock is too high"
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},
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{
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quirk_prefer_large_75, DDC_QUIRK_PREFER_LARGE_75,
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"Detailed timing is not preferred, use largest mode at 75Hz"
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},
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{
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quirk_detailed_h_in_cm, DDC_QUIRK_DETAILED_H_IN_CM,
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"Detailed timings give horizontal size in cm."
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},
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{
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quirk_detailed_v_in_cm, DDC_QUIRK_DETAILED_V_IN_CM,
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"Detailed timings give vertical size in cm."
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},
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{
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quirk_detailed_use_maximum_size, DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE,
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"Detailed timings give sizes in cm."
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},
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{
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quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED,
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"First detailed timing was not marked as preferred."
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},
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{
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quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP,
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"Use +hsync +vsync for detailed timing."
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},
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{
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quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK,
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"Forcing maximum pixel clock to single DVI link."
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},
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{
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NULL, DDC_QUIRK_NONE,
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"No known quirks"
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},
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};
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/*
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* TODO:
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* - for those with access to the VESA DMT standard; review please.
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*/
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#define MODEPREFIX NULL, NULL, NULL, 0, M_T_DRIVER
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#define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
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static const DisplayModeRec DDCEstablishedModes[17] = {
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{ MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@60Hz */
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{ MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@56Hz */
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{ MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@75Hz */
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{ MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 491, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@72Hz */
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{ MODEPREFIX, 30240, 640, 704, 768, 864, 0, 480, 483, 486, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@67Hz */
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{ MODEPREFIX, 25200, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@60Hz */
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{ MODEPREFIX, 35500, 720, 738, 846, 900, 0, 400, 421, 423, 449, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 720x400@88Hz */
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{ MODEPREFIX, 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@70Hz */
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{ MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@75Hz */
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{ MODEPREFIX, 78800, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1024x768@75Hz */
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{ MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@70Hz */
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{ MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@60Hz */
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{ MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 776, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX }, /* 1024x768@43Hz */
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{ MODEPREFIX, 57284, 832, 864, 928, 1152, 0, 624, 625, 628, 667, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 832x624@75Hz */
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{ MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@75Hz */
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{ MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@72Hz */
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{ MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1152x864@75Hz */
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};
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static DisplayModePtr
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DDCModesFromEstablished(int scrnIndex, struct established_timings *timing,
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ddc_quirk_t quirks)
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{
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DisplayModePtr Modes = NULL, Mode = NULL;
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CARD32 bits = (timing->t1) | (timing->t2 << 8) |
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((timing->t_manu & 0x80) << 9);
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int i;
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for (i = 0; i < 17; i++) {
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if (bits & (0x01 << i)) {
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Mode = xf86DuplicateMode(&DDCEstablishedModes[i]);
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Modes = xf86ModesAdd(Modes, Mode);
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}
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}
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return Modes;
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}
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#define LEVEL_DMT 0
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#define LEVEL_GTF 1
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#define LEVEL_CVT 2
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static int
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MonitorStandardTimingLevel(xf86MonPtr DDC)
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{
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if (DDC->ver.revision >= 2) {
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if (DDC->ver.revision >= 4 && CVT_SUPPORTED(DDC->features.msc)) {
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return LEVEL_CVT;
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}
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return LEVEL_GTF;
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}
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return LEVEL_DMT;
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}
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/*
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* This is not really correct. Appendix B of the EDID 1.4 spec defines
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* the right thing to do here. If the timing given here matches a mode
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* defined in the VESA DMT standard, we _must_ use that. If the device
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* supports CVT modes, then we should generate a CVT timing. If both
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* of the above fail, use GTF.
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*
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* There are some wrinkles here. EDID 1.1 and 1.0 sinks can't really
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* "support" GTF, since it wasn't a standard yet; so if they ask for a
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* timing in this section that isn't defined in DMT, returning a GTF mode
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* may not actually be valid. EDID 1.3 sinks often report support for
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* some CVT modes, but they are not required to support CVT timings for
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* modes in the standard timing descriptor, so we should _not_ treat them
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* as CVT-compliant (unless specified in an extension block I suppose).
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*
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* EDID 1.4 requires that all sink devices support both GTF and CVT timings
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* for modes in this section, but does say that CVT is preferred.
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*/
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static DisplayModePtr
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DDCModesFromStandardTiming(struct std_timings *timing, ddc_quirk_t quirks,
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int timing_level)
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{
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DisplayModePtr Modes = NULL, Mode = NULL;
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int i;
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for (i = 0; i < STD_TIMINGS; i++) {
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if (timing[i].hsize && timing[i].vsize && timing[i].refresh) {
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/* XXX check for DMT first, else... */
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if (timing_level == LEVEL_CVT)
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Mode = xf86CVTMode(timing[i].hsize, timing[i].vsize,
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timing[i].refresh, FALSE, FALSE);
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else
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Mode = xf86GTFMode(timing[i].hsize, timing[i].vsize,
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timing[i].refresh, FALSE, FALSE);
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Mode->type = M_T_DRIVER;
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Modes = xf86ModesAdd(Modes, Mode);
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}
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}
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return Modes;
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}
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/*
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*
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*/
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static DisplayModePtr
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DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
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Bool preferred, ddc_quirk_t quirks)
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{
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DisplayModePtr Mode;
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/*
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* Refuse to create modes that are insufficiently large. 64 is a random
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* number, maybe the spec says something about what the minimum is. In
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* particular I see this frequently with _old_ EDID, 1.0 or so, so maybe
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* our parser is just being too aggresive there.
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*/
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if (timing->h_active < 64 || timing->v_active < 64) {
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xf86DrvMsg(scrnIndex, X_INFO,
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"%s: Ignoring tiny %dx%d mode\n", __func__,
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timing->h_active, timing->v_active);
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return NULL;
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}
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/* We don't do stereo */
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if (timing->stereo) {
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xf86DrvMsg(scrnIndex, X_INFO,
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"%s: Ignoring: We don't handle stereo.\n", __func__);
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return NULL;
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}
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/* We only do seperate sync currently */
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if (timing->sync != 0x03) {
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xf86DrvMsg(scrnIndex, X_INFO,
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"%s: %dx%d Warning: We only handle separate"
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" sync.\n", __func__, timing->h_active, timing->v_active);
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}
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Mode = xnfcalloc(1, sizeof(DisplayModeRec));
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Mode->type = M_T_DRIVER;
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if (preferred)
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Mode->type |= M_T_PREFERRED;
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if( ( quirks & DDC_QUIRK_135_CLOCK_TOO_HIGH ) &&
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timing->clock == 135000000 )
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Mode->Clock = 108880;
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else
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Mode->Clock = timing->clock / 1000.0;
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Mode->HDisplay = timing->h_active;
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Mode->HSyncStart = timing->h_active + timing->h_sync_off;
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Mode->HSyncEnd = Mode->HSyncStart + timing->h_sync_width;
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Mode->HTotal = timing->h_active + timing->h_blanking;
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Mode->VDisplay = timing->v_active;
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Mode->VSyncStart = timing->v_active + timing->v_sync_off;
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Mode->VSyncEnd = Mode->VSyncStart + timing->v_sync_width;
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Mode->VTotal = timing->v_active + timing->v_blanking;
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/* perform basic check on the detail timing */
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if (Mode->HSyncEnd > Mode->HTotal || Mode->VSyncEnd > Mode->VTotal) {
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xfree(Mode);
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return NULL;
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}
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xf86SetModeDefaultName(Mode);
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/* We ignore h/v_size and h/v_border for now. */
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if (timing->interlaced)
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Mode->Flags |= V_INTERLACE;
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if (quirks & DDC_QUIRK_DETAILED_SYNC_PP)
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|
Mode->Flags |= V_PVSYNC | V_PHSYNC;
|
|
else {
|
|
if (timing->misc & 0x02)
|
|
Mode->Flags |= V_PVSYNC;
|
|
else
|
|
Mode->Flags |= V_NVSYNC;
|
|
|
|
if (timing->misc & 0x01)
|
|
Mode->Flags |= V_PHSYNC;
|
|
else
|
|
Mode->Flags |= V_NHSYNC;
|
|
}
|
|
|
|
return Mode;
|
|
}
|
|
|
|
#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)
|
|
static DisplayModePtr
|
|
DDCModesFromCVT(int scrnIndex, struct cvt_timings *t)
|
|
{
|
|
DisplayModePtr modes = NULL;
|
|
int i;
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
if (t[i].height) {
|
|
if (t[i].rates & 0x10)
|
|
modes = xf86ModesAdd(modes,
|
|
xf86CVTMode(t[i].width, t[i].height, 50, 0, 0));
|
|
if (t[i].rates & 0x08)
|
|
modes = xf86ModesAdd(modes,
|
|
xf86CVTMode(t[i].width, t[i].height, 60, 0, 0));
|
|
if (t[i].rates & 0x04)
|
|
modes = xf86ModesAdd(modes,
|
|
xf86CVTMode(t[i].width, t[i].height, 75, 0, 0));
|
|
if (t[i].rates & 0x02)
|
|
modes = xf86ModesAdd(modes,
|
|
xf86CVTMode(t[i].width, t[i].height, 85, 0, 0));
|
|
if (t[i].rates & 0x01)
|
|
modes = xf86ModesAdd(modes,
|
|
xf86CVTMode(t[i].width, t[i].height, 60, 1, 0));
|
|
} else break;
|
|
}
|
|
|
|
return modes;
|
|
}
|
|
#endif
|
|
|
|
|
|
/*
|
|
* This is only valid when the sink claims to be continuous-frequency
|
|
* but does not supply a detailed range descriptor. Such sinks are
|
|
* arguably broken. Currently the mode validation code isn't aware of
|
|
* this; the non-RANDR code even punts the decision of optional sync
|
|
* range checking to the driver. Loss.
|
|
*/
|
|
static void
|
|
DDCGuessRangesFromModes(int scrnIndex, MonPtr Monitor, DisplayModePtr Modes)
|
|
{
|
|
DisplayModePtr Mode = Modes;
|
|
|
|
if (!Monitor || !Modes)
|
|
return;
|
|
|
|
/* set up the ranges for scanning through the modes */
|
|
Monitor->nHsync = 1;
|
|
Monitor->hsync[0].lo = 1024.0;
|
|
Monitor->hsync[0].hi = 0.0;
|
|
|
|
Monitor->nVrefresh = 1;
|
|
Monitor->vrefresh[0].lo = 1024.0;
|
|
Monitor->vrefresh[0].hi = 0.0;
|
|
|
|
while (Mode) {
|
|
if (!Mode->HSync)
|
|
Mode->HSync = ((float) Mode->Clock ) / ((float) Mode->HTotal);
|
|
|
|
if (!Mode->VRefresh)
|
|
Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
|
|
((float) (Mode->HTotal * Mode->VTotal));
|
|
|
|
if (Mode->HSync < Monitor->hsync[0].lo)
|
|
Monitor->hsync[0].lo = Mode->HSync;
|
|
|
|
if (Mode->HSync > Monitor->hsync[0].hi)
|
|
Monitor->hsync[0].hi = Mode->HSync;
|
|
|
|
if (Mode->VRefresh < Monitor->vrefresh[0].lo)
|
|
Monitor->vrefresh[0].lo = Mode->VRefresh;
|
|
|
|
if (Mode->VRefresh > Monitor->vrefresh[0].hi)
|
|
Monitor->vrefresh[0].hi = Mode->VRefresh;
|
|
|
|
Mode = Mode->next;
|
|
}
|
|
}
|
|
|
|
static ddc_quirk_t
|
|
xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose)
|
|
{
|
|
ddc_quirk_t quirks;
|
|
int i;
|
|
|
|
quirks = DDC_QUIRK_NONE;
|
|
for (i = 0; ddc_quirks[i].detect; i++) {
|
|
if (ddc_quirks[i].detect (scrnIndex, DDC)) {
|
|
if (verbose) {
|
|
xf86DrvMsg (scrnIndex, X_INFO, " EDID quirk: %s\n",
|
|
ddc_quirks[i].description);
|
|
}
|
|
quirks |= ddc_quirks[i].quirk;
|
|
}
|
|
}
|
|
|
|
return quirks;
|
|
}
|
|
|
|
/**
|
|
* Applies monitor-specific quirks to the decoded EDID information.
|
|
*
|
|
* Note that some quirks applying to the mode list are still implemented in
|
|
* xf86DDCGetModes.
|
|
*/
|
|
void
|
|
xf86DDCApplyQuirks(int scrnIndex, xf86MonPtr DDC)
|
|
{
|
|
ddc_quirk_t quirks = xf86DDCDetectQuirks (scrnIndex, DDC, FALSE);
|
|
int i;
|
|
|
|
for (i = 0; i < DET_TIMINGS; i++) {
|
|
struct detailed_monitor_section *det_mon = &DDC->det_mon[i];
|
|
|
|
if (det_mon->type != DT)
|
|
continue;
|
|
|
|
if (quirks & DDC_QUIRK_DETAILED_H_IN_CM)
|
|
det_mon->section.d_timings.h_size *= 10;
|
|
|
|
if (quirks & DDC_QUIRK_DETAILED_V_IN_CM)
|
|
det_mon->section.d_timings.v_size *= 10;
|
|
|
|
if (quirks & DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
|
|
det_mon->section.d_timings.h_size = 10 * DDC->features.hsize;
|
|
det_mon->section.d_timings.v_size = 10 * DDC->features.vsize;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Walks the modes list, finding the mode with the largest area which is
|
|
* closest to the target refresh rate, and marks it as the only preferred mode.
|
|
*/
|
|
static void
|
|
xf86DDCSetPreferredRefresh(int scrnIndex, DisplayModePtr modes,
|
|
float target_refresh)
|
|
{
|
|
DisplayModePtr mode, best = modes;
|
|
|
|
for (mode = modes; mode; mode = mode->next)
|
|
{
|
|
mode->type &= ~M_T_PREFERRED;
|
|
|
|
if (mode == best) continue;
|
|
|
|
if (mode->HDisplay * mode->VDisplay >
|
|
best->HDisplay * best->VDisplay)
|
|
{
|
|
best = mode;
|
|
continue;
|
|
}
|
|
if (mode->HDisplay * mode->VDisplay ==
|
|
best->HDisplay * best->VDisplay)
|
|
{
|
|
double mode_refresh = xf86ModeVRefresh (mode);
|
|
double best_refresh = xf86ModeVRefresh (best);
|
|
double mode_dist = fabs(mode_refresh - target_refresh);
|
|
double best_dist = fabs(best_refresh - target_refresh);
|
|
|
|
if (mode_dist < best_dist)
|
|
{
|
|
best = mode;
|
|
continue;
|
|
}
|
|
}
|
|
}
|
|
if (best)
|
|
best->type |= M_T_PREFERRED;
|
|
}
|
|
|
|
_X_EXPORT DisplayModePtr
|
|
xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC)
|
|
{
|
|
int i;
|
|
DisplayModePtr Modes = NULL, Mode;
|
|
ddc_quirk_t quirks;
|
|
Bool preferred;
|
|
int timing_level;
|
|
|
|
xf86DrvMsg (scrnIndex, X_INFO, "EDID vendor \"%s\", prod id %d\n",
|
|
DDC->vendor.name, DDC->vendor.prod_id);
|
|
|
|
quirks = xf86DDCDetectQuirks(scrnIndex, DDC, TRUE);
|
|
|
|
preferred = PREFERRED_TIMING_MODE(DDC->features.msc);
|
|
if (DDC->ver.revision >= 4)
|
|
preferred = TRUE;
|
|
if (quirks & DDC_QUIRK_FIRST_DETAILED_PREFERRED)
|
|
preferred = TRUE;
|
|
if (quirks & (DDC_QUIRK_PREFER_LARGE_60 | DDC_QUIRK_PREFER_LARGE_75))
|
|
preferred = FALSE;
|
|
|
|
timing_level = MonitorStandardTimingLevel(DDC);
|
|
|
|
for (i = 0; i < DET_TIMINGS; i++) {
|
|
struct detailed_monitor_section *det_mon = &DDC->det_mon[i];
|
|
|
|
switch (det_mon->type) {
|
|
case DT:
|
|
Mode = DDCModeFromDetailedTiming(scrnIndex,
|
|
&det_mon->section.d_timings,
|
|
preferred,
|
|
quirks);
|
|
preferred = FALSE;
|
|
Modes = xf86ModesAdd(Modes, Mode);
|
|
break;
|
|
case DS_STD_TIMINGS:
|
|
Mode = DDCModesFromStandardTiming(det_mon->section.std_t,
|
|
quirks, timing_level);
|
|
Modes = xf86ModesAdd(Modes, Mode);
|
|
break;
|
|
#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)
|
|
case DS_CVT:
|
|
Mode = DDCModesFromCVT(scrnIndex, det_mon->section.cvt);
|
|
Modes = xf86ModesAdd(Modes, Mode);
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Add established timings */
|
|
Mode = DDCModesFromEstablished(scrnIndex, &DDC->timings1, quirks);
|
|
Modes = xf86ModesAdd(Modes, Mode);
|
|
|
|
/* Add standard timings */
|
|
Mode = DDCModesFromStandardTiming(DDC->timings2, quirks, timing_level);
|
|
Modes = xf86ModesAdd(Modes, Mode);
|
|
|
|
if (quirks & DDC_QUIRK_PREFER_LARGE_60)
|
|
xf86DDCSetPreferredRefresh(scrnIndex, Modes, 60);
|
|
|
|
if (quirks & DDC_QUIRK_PREFER_LARGE_75)
|
|
xf86DDCSetPreferredRefresh(scrnIndex, Modes, 75);
|
|
|
|
return Modes;
|
|
}
|
|
|
|
/*
|
|
* Fill out MonPtr with xf86MonPtr information.
|
|
*/
|
|
_X_EXPORT void
|
|
xf86DDCMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
|
|
{
|
|
DisplayModePtr Modes = NULL, Mode;
|
|
int i, clock;
|
|
Bool have_hsync = FALSE, have_vrefresh = FALSE, have_maxpixclock = FALSE;
|
|
ddc_quirk_t quirks;
|
|
|
|
if (!Monitor || !DDC)
|
|
return;
|
|
|
|
Monitor->DDC = DDC;
|
|
|
|
quirks = xf86DDCDetectQuirks(scrnIndex, DDC, FALSE);
|
|
|
|
if (Monitor->widthmm <= 0 && Monitor->heightmm <= 0) {
|
|
Monitor->widthmm = 10 * DDC->features.hsize;
|
|
Monitor->heightmm = 10 * DDC->features.vsize;
|
|
}
|
|
|
|
/*
|
|
* If this is a digital display, then we can use reduced blanking.
|
|
* XXX This is a 1.3 heuristic. 1.4 explicitly defines rb support.
|
|
*/
|
|
if (DDC->features.input_type)
|
|
Monitor->reducedblanking = TRUE;
|
|
|
|
Modes = xf86DDCGetModes(scrnIndex, DDC);
|
|
|
|
/* Skip EDID ranges if they were specified in the config file */
|
|
have_hsync = (Monitor->nHsync != 0);
|
|
have_vrefresh = (Monitor->nVrefresh != 0);
|
|
have_maxpixclock = (Monitor->maxPixClock != 0);
|
|
|
|
/* Go through the detailed monitor sections */
|
|
for (i = 0; i < DET_TIMINGS; i++) {
|
|
switch (DDC->det_mon[i].type) {
|
|
case DS_RANGES:
|
|
if (!have_hsync) {
|
|
if (!Monitor->nHsync)
|
|
xf86DrvMsg(scrnIndex, X_INFO,
|
|
"Using EDID range info for horizontal sync\n");
|
|
Monitor->hsync[Monitor->nHsync].lo =
|
|
DDC->det_mon[i].section.ranges.min_h;
|
|
Monitor->hsync[Monitor->nHsync].hi =
|
|
DDC->det_mon[i].section.ranges.max_h;
|
|
Monitor->nHsync++;
|
|
} else {
|
|
xf86DrvMsg(scrnIndex, X_INFO,
|
|
"Using hsync ranges from config file\n");
|
|
}
|
|
|
|
if (!have_vrefresh) {
|
|
if (!Monitor->nVrefresh)
|
|
xf86DrvMsg(scrnIndex, X_INFO,
|
|
"Using EDID range info for vertical refresh\n");
|
|
Monitor->vrefresh[Monitor->nVrefresh].lo =
|
|
DDC->det_mon[i].section.ranges.min_v;
|
|
Monitor->vrefresh[Monitor->nVrefresh].hi =
|
|
DDC->det_mon[i].section.ranges.max_v;
|
|
Monitor->nVrefresh++;
|
|
} else {
|
|
xf86DrvMsg(scrnIndex, X_INFO,
|
|
"Using vrefresh ranges from config file\n");
|
|
}
|
|
|
|
clock = DDC->det_mon[i].section.ranges.max_clock * 1000;
|
|
if (quirks & DDC_QUIRK_DVI_SINGLE_LINK)
|
|
clock = min(clock, 165000);
|
|
if (!have_maxpixclock && clock > Monitor->maxPixClock)
|
|
Monitor->maxPixClock = clock;
|
|
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (Modes) {
|
|
/* Print Modes */
|
|
xf86DrvMsg(scrnIndex, X_INFO, "Printing DDC gathered Modelines:\n");
|
|
|
|
Mode = Modes;
|
|
while (Mode) {
|
|
xf86PrintModeline(scrnIndex, Mode);
|
|
Mode = Mode->next;
|
|
}
|
|
|
|
/* Do we still need ranges to be filled in? */
|
|
if (!Monitor->nHsync || !Monitor->nVrefresh)
|
|
DDCGuessRangesFromModes(scrnIndex, Monitor, Modes);
|
|
|
|
/* look for last Mode */
|
|
Mode = Modes;
|
|
|
|
while (Mode->next)
|
|
Mode = Mode->next;
|
|
|
|
/* add to MonPtr */
|
|
if (Monitor->Modes) {
|
|
Monitor->Last->next = Modes;
|
|
Modes->prev = Monitor->Last;
|
|
Monitor->Last = Mode;
|
|
} else {
|
|
Monitor->Modes = Modes;
|
|
Monitor->Last = Mode;
|
|
}
|
|
}
|
|
}
|