mirror of
https://github.com/oplus-giulia-dev/android_kernel_oneplus_sm8650-devicetrees
synced 2025-11-08 17:16:49 +08:00
Commit label r2.0_00020.0 - LA.VENDOR.14.3.0.r1-20200-lanai.QSSI15.0
This commit is contained in:
android-t1
7
Kbuild
7
Kbuild
@@ -11,6 +11,7 @@ ifeq ($(CONFIG_ARCH_KALAMA),y)
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dtbo-y += kalama-cnss.dtbo
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dtbo-y += kalama-aim300-cnss.dtbo
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dtbo-y += kalama-rb5-gen2-cnss.dtbo
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dtbo-y += kalama-iot-vc-cnss.dtbo
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endif
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ifeq ($(CONFIG_ARCH_QCS405),y)
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@@ -105,7 +106,7 @@ dtbo-y += anorak-hsp-cnss.dtbo
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dtbo-y += anorak-kiwi-cnss.dtbo
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endif
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ifeq ($(CONFIG_QTI_QUIN_GVM),y)
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ifeq (y, $(filter y, $(CONFIG_ARCH_QTI_VM) $(CONFIG_QTI_QUIN_GVM)))
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dtbo-y += sa8155p-vm-cnss.dtbo
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dtbo-y += sa8195p-vm-cnss.dtbo
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dtbo-y += sa8255p-vm-cnss.dtbo
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@@ -125,6 +126,10 @@ ifeq ($(CONFIG_ARCH_SA525),y)
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dtbo-y += sa525m-cnss.dtbo
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endif
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ifeq ($(TARGET_SUPPORT),sa510m)
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dtbo-y += sa510m-cnss.dtbo
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endif
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ifeq ($(CONFIG_ARCH_KONA),y)
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dtbo-y += kona-iot-vc-cnss.dtbo
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endif
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11
kalama-iot-vc-cnss.dts
Normal file
11
kalama-iot-vc-cnss.dts
Normal file
@@ -0,0 +1,11 @@
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/dts-v1/;
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/plugin/;
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#include "kalama-iot-vc-cnss.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. KalamaP IoT VC";
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compatible = "qcom,kalamap-iot", "qcom,kalamap", "qcom-iot";
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qcom,msm-id = <603 0x20000>;
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qcom,board-id = <0x10020 1>;
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};
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6
kalama-iot-vc-cnss.dtsi
Normal file
6
kalama-iot-vc-cnss.dtsi
Normal file
@@ -0,0 +1,6 @@
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#include "kalama-cnss.dtsi"
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&cnss_pci1 {
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reg = <0x100 0x00 0x00 0x00 0x00>;
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status="disabled";
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};
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@@ -6,6 +6,6 @@
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/ {
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model = "Qualcomm Technologies, Inc. Monaco Single LA Virtual Machine";
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compatible = "qcom,monaco", "qcom,quinvm";
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qcom,msm-id = <606 0x10000>;
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qcom,msm-id = <606 0x10000>, <695 0x10000>;
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qcom,board-id = <0 0x1000001>;
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};
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@@ -5,7 +5,7 @@
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/ {
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model = "Qualcomm Technologies, Inc. Niobe SoCs";
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compatible = "qcom,niobe", "qcom,niobep-qxr", "qcom,niobep", "qcom,qxr";
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compatible = "qcom,niobe", "qcom,niobep-qxr", "qcom,niobep", "qcom,qxr", "qcom,idp", "qcom,niobe-idp";
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qcom,msm-id = <629 0x10000>, <652 0x10000>;
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qcom,board-id = <0x10021 0>, <0x10022 0>, <0x10022 1>, <0x10026 0>, <0x10026 1>;
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qcom,board-id = <0x10021 0>, <0x10022 0>, <0x10022 1>, <0x10022 2>, <0x10026 0>, <0x10026 1>, <0x20026 0x1>;
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};
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@@ -7,6 +7,8 @@
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model = "Qualcomm Technologies, Inc. Pineapple SoCs";
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compatible = "qcom,pineapple", "qcom,pineapplep";
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qcom,msm-id = <557 0x10000>, <577 0x10000>, <557 0x20000>, <577 0x20000>,
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<682 0x10000>, <682 0x20000>, <696 0x10000>, <696 0x20000>;
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<682 0x10000>, <682 0x20000>, <696 0x10000>, <696 0x20000>,
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<645 0x10000>, <645 0x20000>, <646 0x10000>, <646 0x20000>,
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<702 0x10000>, <702 0x20000>;
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qcom,board-id = <1 0>, <8 0>, <11 0>, <0x15 0>, <0x1000B 0>, <0x10021 0>, <0x50001 0>, <0x50008 0>, <0x5000B 0>;
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};
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11
sa510m-cnss.dts
Normal file
11
sa510m-cnss.dts
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@@ -0,0 +1,11 @@
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/dts-v1/;
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/plugin/;
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#include "sa510m-cnss.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. SA510M";
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compatible = "qcom,sa510m";
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qcom,msm-id = <697 0x10000>;
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qcom,board-id = <0x22 0x200>, <0x22 0x300>;
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};
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100
sa510m-cnss.dtsi
Normal file
100
sa510m-cnss.dtsi
Normal file
@@ -0,0 +1,100 @@
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#include <dt-bindings/interconnect/qcom,sdxbaagha.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pmx35.h>
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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&tlmm {
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cnss_pins {
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wlan_en_active: wlan_en_active {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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wlan_en_sleep: wlan_en_sleep {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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};
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&reserved_memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x00000000 0xffffffff>;
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reusable;
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alignment = <0x400000>;
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size = <0x1400000>;
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};
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};
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&soc {
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wlan: qcom,cnss-qca-converged {
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compatible = "qcom,cnss-qca-converged";
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qcom,wlan;
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qcom,multi-wlan-exchg;
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qcom,wlan-rc-num = <0>;
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qcom,bus-type=<0>;
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qcom,notify-modem-status;
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vdd-wlan-io-supply = <&L6A>;
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wlan_vregs = "vdd-wlan-io";
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qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
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wlan-en-gpio = <&tlmm 95 0>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&wlan_en_active &display_bl_en>;
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pinctrl-1 = <&wlan_en_sleep>;
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chip_cfg@0 {
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supported-ids = <0x003e>;
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qcom,wlan-ramdump-dynamic = <0x200000>;
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};
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};
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};
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&pcie0 {
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qcom,boot-option = <0x1>;
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status = "ok";
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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cnss_pci: cnss_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group>;
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memory-region = <&cnss_wlan_mem>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci_iommu_group: cnss_pci_iommu_group {
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-geometry = <0xa0000000 0x10010000>;
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qcom,iommu-dma = "atomic";
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qcom,iommu-faults = "stall-disable", "no-CFRE", "HUPCF",
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"non-fatal";
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};
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};
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};
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@@ -62,6 +62,19 @@
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qcom,wlan-ramdump-dynamic = <0x420000>;
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};
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chip_cfg@2 {
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supported-ids = <0x1102>;
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wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
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"vdd-wlan-rfa2", "vdd-wlan-rfa3";
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qcom,vdd-wlan-aon-config = <1000000 1000000 0 0 0>;
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qcom,vdd-wlan-rfa1-config = <1370000 1370000 0 0 0>;
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qcom,vdd-wlan-rfa2-config = <2040000 2040000 0 0 0>;
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qcom,vdd-wlan-rfa3-config = <1900000 1900000 450000 0 0>;
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qcom,wlan-ramdump-dynamic = <0x400000>;
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};
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};
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};
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@@ -7,5 +7,5 @@
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model = "Qualcomm Technologies, Inc. SDXKOVA SoC";
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compatible = "qcom,sdxkova";
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qcom,msm-id = <556 0x10000>, <677 0x10000>, <678 0x10000>, <679 0x10000>;
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qcom,board-id = <0x2010022 0x302>, <0x2010022 0x402>, <0x10022 0x300>, <0x10022 0x400>, <0x20022 0x300>, <0x20022 0x400>, <0x30022 0x300>, <0x30022 0x400>, <0x10015 0x300>, <0x20015 0x300>, <0x30015 0x300>, <0x30015 0x400>;
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qcom,board-id = <0x2010022 0x302>, <0x2010022 0x402>, <0x10022 0x300>, <0x10022 0x400>, <0x30022 0x300>, <0x30022 0x400>, <0x10015 0x300>, <0x30015 0x300>, <0x30015 0x400>;
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};
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