mirror of
https://github.com/oplus-giulia-dev/android_kernel_oneplus_sm8650-devicetrees
synced 2025-11-04 06:44:04 +08:00
ff6c59d864
Disable TPDM ipa to avoid the register access issue to TPDM ipa. Change-Id: I6053d064f7476eb42624ccf7e9cfb1b98f2c7c72
2300 lines
43 KiB
Plaintext
2300 lines
43 KiB
Plaintext
&soc {
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stm: stm@8002000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb962>;
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reg = <0x8002000 0x1000>,
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<0xe280000 0x180000>;
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reg-names = "stm-base", "stm-stimulus-base";
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atid = <16>;
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coresight-name = "coresight-stm";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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stm_out_funnel_in0: endpoint {
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remote-endpoint =
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<&funnel_in0_in_stm>;
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};
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};
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};
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};
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audio_etm0 {
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compatible = "qcom,coresight-remote-etm";
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coresight-name = "coresight-audio-etm0";
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qcom,inst-id = <5>;
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atid = <40>;
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out-ports {
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port {
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audio_etm0_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_audio_etm0>;
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};
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};
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};
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};
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lpass_stm: lpass_stm {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-lpass-stm";
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qcom,dummy-source;
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atid = <25>;
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out-ports {
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port {
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lpass_stm_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_lpass_stm>;
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};
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};
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};
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};
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tpdm_lpass_lpi: tpdm_lpass_lpi {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-tpdm-lpass-lpi";
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qcom,dummy-source;
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atid = <26>;
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out-ports {
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port {
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tpdm_lpass_lpi_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_tpdm_lpass_lpi>;
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};
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};
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};
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};
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tpdm_dlnt: tpdm@8b48000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8b48000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-dlnt";
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atid = <78>;
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_dlnt_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_dlnt>;
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};
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};
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};
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};
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tpdm_gfx: tpdm@8940000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8940000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-gfx";
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atid = <78>;
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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out-ports {
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port {
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tpdm_gfx_out_funnel_gfx: endpoint {
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remote-endpoint =
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<&funnel_gfx_in_tpdm_gfx>;
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};
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};
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};
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};
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tpdm_vsense: tpdm@8840000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8840000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-vsense";
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status = "disabled";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_vsense_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_vsense>;
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};
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};
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};
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};
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tpdm_sdcc1: tpdm@8870000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8870000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-sdcc1";
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status = "disabled";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_sdcc1_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_sdcc1>;
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};
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};
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};
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};
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tpdm_sdcc2: tpdm@8b20000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8b20000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-sdcc2";
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status = "disabled";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_sdcc2_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_sdcc2>;
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};
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};
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};
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};
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tpdm_dl_ct: tpdm@8b40000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8b40000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-dlct";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_dlct_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_dlct>;
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};
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};
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};
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};
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tpdm_ipcc: tpdm@8b41000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8b41000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-ipcc";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_ipcc_out_tpda_dl_center: endpoint {
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remote-endpoint =
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<&tpda_dl_center_in_tpdm_ipcc>;
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};
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};
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};
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};
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tpdm_prng: tpdm@884c000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x884c000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-prng";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <65>;
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out-ports {
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port {
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tpdm_prng_out_tpda_qdss: endpoint {
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remote-endpoint =
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<&tpda_qdss_in_tpdm_prng>;
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};
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};
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};
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};
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tpdm_qm: tpdm@89d0000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x89d0000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-qm";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <65>;
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out-ports {
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port {
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tpdm_qm_out_tpda_qdss: endpoint {
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remote-endpoint =
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<&tpda_qdss_in_tpdm_qm>;
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};
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};
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};
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};
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tpdm_ipa: tpdm@8b1f000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8b1f000 0x1000>;
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reg-names = "tpdm-base";
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status = "disabled";
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coresight-name = "coresight-tpdm-ipa";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <65>;
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out-ports {
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port {
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tpdm_ipa_out_tpda_qdss: endpoint {
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remote-endpoint =
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<&tpda_qdss_in_tpdm_ipa>;
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};
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};
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};
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};
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tpdm_pimem: tpdm@8850000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8850000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-pimem";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <65>;
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out-ports {
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port {
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tpdm_pimem_out_tpda_qdss: endpoint {
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remote-endpoint =
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<&tpda_qdss_in_tpdm_pimem>;
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};
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};
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};
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};
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tpdm_ddr0: tpdm@8a48000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8a48000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-ddr0";
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status = "disabled";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_ddr0_out_funnel_ddr: endpoint {
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remote-endpoint =
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<&funnel_ddr_in_tpdm_ddr0>;
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};
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};
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};
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};
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tpdm_ddr1: tpdm@8a49000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8a49000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-ddr1";
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status = "disabled";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_ddr1_out_funnel_ddr: endpoint {
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remote-endpoint =
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<&funnel_ddr_in_tpdm_ddr1>;
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};
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};
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};
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};
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tpdm_mapss: tpdm@8a01000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8a01000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-mapss";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_mapss_out_tpda_aodbg: endpoint {
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remote-endpoint =
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<&tpda_aodbg_in_tpdm_mapss>;
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};
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};
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};
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};
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modem_etm0 {
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compatible = "qcom,coresight-remote-etm";
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coresight-name = "coresight-modem-etm0";
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qcom,inst-id = <2>;
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atid = <36 37>;
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out-ports {
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port {
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modem_etm0_out_funnel_modem: endpoint {
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remote-endpoint =
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<&funnel_modem_in_modem_etm0>;
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};
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};
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};
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};
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modem_diag: modem_diag {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-modem-diag";
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qcom,dummy-source;
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atid = <50>;
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out-ports {
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port {
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modem_diag_out_funnel_modem: endpoint {
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remote-endpoint =
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<&funnel_modem_in_modem_diag>;
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};
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};
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};
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};
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tpdm_modem0: tpdm@8800000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x8800000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-modem-0";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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atid = <67>;
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out-ports {
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port {
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tpdm_modem0_out_tpda_modem: endpoint {
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remote-endpoint =
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<&tpda_modem_in_tpdm_modem0>;
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};
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};
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};
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};
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tpdm_modem1: tpdm@8801000 {
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compatible = "qcom,coresight-dummy";
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qcom,dummy-source;
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coresight-name = "coresight-tpdm-modem-1";
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atid = <67>;
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out-ports {
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port {
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tpdm_modem1_out_tpda_modem: endpoint {
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remote-endpoint =
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<&tpda_modem_in_tpdm_modem1>;
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};
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};
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};
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};
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tpdm_modem2: tpdm@8802000 {
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compatible = "qcom,coresight-dummy";
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qcom,dummy-source;
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coresight-name = "coresight-tpdm-modem-2";
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atid = <67>;
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out-ports {
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port {
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tpdm_modem2_out_tpda_modem: endpoint {
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remote-endpoint =
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<&tpda_modem_in_tpdm_modem2>;
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};
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};
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};
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};
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tpdm_modem3: tpdm@8803000 {
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compatible = "qcom,coresight-dummy";
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qcom,dummy-source;
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coresight-name = "coresight-tpdm-modem-3";
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atid = <67>;
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out-ports {
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port {
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tpdm_modem3_out_tpda_modem: endpoint {
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remote-endpoint =
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<&tpda_modem_in_tpdm_modem3>;
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};
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};
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};
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};
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tpdm_modem4: tpdm@8804000 {
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compatible = "qcom,coresight-dummy";
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qcom,dummy-source;
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coresight-name = "coresight-tpdm-modem-4";
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atid = <67>;
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out-ports {
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port {
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tpdm_modem4_out_tpda_modem: endpoint {
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remote-endpoint =
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<&tpda_modem_in_tpdm_modem4>;
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};
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};
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};
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};
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tpdm_llm_silver: tpdm@98a0000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x98a0000 0x1000>;
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reg-names = "tpdm-base";
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atid = <66>;
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coresight-name = "coresight-tpdm-llm-silver";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_llm_silver_out_tpda_apss: endpoint {
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remote-endpoint =
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<&tpda_apss_in_tpdm_llm_silver>;
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};
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};
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};
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};
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tpdm_actpm: tpdm@9860000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x9860000 0x1000>;
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reg-names = "tpdm-base";
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atid = <66>;
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coresight-name = "coresight-tpdm-actpm";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_actpm_out_tpda_apss: endpoint {
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remote-endpoint =
|
|
<&tpda_apss_in_tpdm_actpm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_apss: tpdm@9861000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x9861000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
atid = <66>;
|
|
coresight-name = "coresight-tpdm-apss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_apss_out_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_in_tpdm_apss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_wpss: tpdm@8980000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x8980000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
atid = <78>;
|
|
coresight-name = "coresight-tpdm-wpss0";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_wpss_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_tpdm_wpss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_wpss1: tpdm@8981000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x8981000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
atid = <78>;
|
|
coresight-name = "coresight-tpdm-wpss1";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_wpss1_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_tpdm_wpss1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
wpss_etm: wpss_etm0 {
|
|
compatible = "qcom,coresight-remote-etm";
|
|
|
|
coresight-name = "coresight-wpss-etm0";
|
|
qcom,inst-id = <3>;
|
|
atid = <44>;
|
|
|
|
out-ports {
|
|
port {
|
|
wpss_etm0_out_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_in_wpss_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_dcc: tpdm@8003000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x8003000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
atid = <65>;
|
|
coresight-name = "coresight-tpdm-dcc";
|
|
|
|
qcom,hw-enable-check;
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_dcc_out_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_in_tpdm_dcc>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_spdm: tpdm@800f000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x800f000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
coresight-name = "coresight-tpdm-spdm";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
atid = <65>;
|
|
out-ports {
|
|
port {
|
|
tpdm_spdm_out_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_in_tpdm_spdm>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpdm_wcss: tpdm@899c000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb968>;
|
|
reg = <0x899c000 0x1000>;
|
|
reg-names = "tpdm-base";
|
|
|
|
atid = <24>;
|
|
coresight-name = "coresight-tpdm-wcss";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
qcom,cmb-msr-skip;
|
|
|
|
out-ports {
|
|
port {
|
|
tpdm_wcss_out_tpda_wcss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_wcss_in_tpdm_wcss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_wcss: tpda@899d000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x899d000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <24>;
|
|
qcom,dsb-elem-size = <4 32>;
|
|
qcom,cmb-elem-size = <0 32>,
|
|
<3 64>;
|
|
|
|
status = "disabled";
|
|
coresight-name = "coresight-tpda-wcss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_wcss_in_tpdm_wcss: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_wcss_out_tpda_wcss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_wcss_out_funnel_wcss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wcss_in_tpda_wcss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_wcss: funnel@899e000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x899e000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-wcss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
status = "disabled";
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wcss_in_tpda_wcss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_wcss_out_funnel_wcss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wcss_out_funnel_in1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in1_in_funnel_wcss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel_wpss: funnel@8983000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8983000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-wpss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wpss_in_tpdm_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_wpss_out_funnel_wpss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_wpss_in_tpdm_wpss1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_wpss1_out_funnel_wpss>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_wpss_in_wpss_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&wpss_etm0_out_funnel_wpss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_wpss_out_tpda_dl_center_3: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl_center_3_in_funnel_wpss>;
|
|
source = <&tpdm_wpss>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_wpss_out_tpda_dl_center_4: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl_center_4_in_funnel_wpss>;
|
|
source = <&tpdm_wpss1>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_wpss_out_funnel_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl_center_in_funnel_wpss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
etm0: etm@9040000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9040000 0x1000>;
|
|
cpu = <&CPU0>;
|
|
|
|
atid = <1>;
|
|
qcom,skip-power-up;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm0";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm0_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm1: etm@9140000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9140000 0x1000>;
|
|
cpu = <&CPU1>;
|
|
|
|
atid = <2>;
|
|
qcom,skip-power-up;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm1";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm1_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm2: etm@9240000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9240000 0x1000>;
|
|
cpu = <&CPU2>;
|
|
qcom,skip-power-up;
|
|
atid = <3>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm2";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm2_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm3: etm@9340000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9340000 0x1000>;
|
|
cpu = <&CPU3>;
|
|
qcom,skip-power-up;
|
|
atid = <4>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm3";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm3_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm4: etm@9440000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9440000 0x1000>;
|
|
cpu = <&CPU4>;
|
|
qcom,skip-power-up;
|
|
atid = <5>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm4";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm4_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm5: etm@9540000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9540000 0x1000>;
|
|
cpu = <&CPU5>;
|
|
qcom,skip-power-up;
|
|
atid = <6>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm5";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm5_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm5>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm6: etm@9640000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9640000 0x1000>;
|
|
cpu = <&CPU6>;
|
|
qcom,skip-power-up;
|
|
atid = <7>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm6";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm6_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm6>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm7: etm@9740000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb95d>;
|
|
reg = <0x9740000 0x1000>;
|
|
cpu = <&CPU7>;
|
|
qcom,skip-power-up;
|
|
atid = <8>;
|
|
arm,coresight-loses-context-with-cpu;
|
|
coresight-name = "coresight-etm7";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
out-ports {
|
|
port {
|
|
etm7_out_funnel_apss0: endpoint {
|
|
remote-endpoint = <&funnel_apss0_in_etm7>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpda_apss: tpda@9863000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x9863000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <66>;
|
|
qcom,dsb-elem-size = <3 32>;
|
|
qcom,cmb-elem-size = <0 32>,
|
|
<2 64>;
|
|
|
|
coresight-name = "coresight-tpda-apss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_apss_in_tpdm_llm_silver: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_llm_silver_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
tpda_apss_in_tpdm_actpm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_actpm_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
tpda_apss_in_tpdm_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_apss_out_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_apss_out_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_in_tpda_apss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_apss0: funnel@9800000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
reg = <0x09800000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-apss0";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_apss0_out_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_in_funnel_apss0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_apss0_in_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&etm0_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_apss0_in_etm1: endpoint {
|
|
remote-endpoint =
|
|
<&etm1_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_apss0_in_etm2: endpoint {
|
|
remote-endpoint =
|
|
<&etm2_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_apss0_in_etm3: endpoint {
|
|
remote-endpoint =
|
|
<&etm3_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
funnel_apss0_in_etm4: endpoint {
|
|
remote-endpoint =
|
|
<&etm4_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_apss0_in_etm5: endpoint {
|
|
remote-endpoint =
|
|
<&etm5_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_apss0_in_etm6: endpoint {
|
|
remote-endpoint =
|
|
<&etm6_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_apss0_in_etm7: endpoint {
|
|
remote-endpoint =
|
|
<&etm7_out_funnel_apss0>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_apss: funnel@9810000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x9810000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-apss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_apss_in_funnel_apss0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss0_out_funnel_apss>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_apss_in_tpda_apss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_apss_out_funnel_apss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_apss_out_funnel_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl_center_in_funnel_apss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tpda_modem: tpda@8806000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x8806000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <67>;
|
|
qcom,dsb-elem-size = <0 32>;
|
|
qcom,cmb-elem-size = <1 32>,
|
|
<2 32>,
|
|
<3 64>,
|
|
<4 64>;
|
|
coresight-name = "coresight-tpda-modem";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_modem_in_tpdm_modem0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem0_out_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_modem_in_tpdm_modem1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem1_out_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
tpda_modem_in_tpdm_modem2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem2_out_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
tpda_modem_in_tpdm_modem3: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem3_out_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
tpda_modem_in_tpdm_modem4: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_modem4_out_tpda_modem>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
tpda_modem_out_funnel_modem_dl: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_dl_in_tpda_modem>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_modem: funnel@8807000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8807000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-modem_dl";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_modem_dl_in_tpda_modem: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_modem_out_funnel_modem_dl>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_modem_in_modem_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&modem_etm0_out_funnel_modem>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
funnel_modem_in_modem_diag: endpoint {
|
|
remote-endpoint =
|
|
<&modem_diag_out_funnel_modem>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
funnel_modem_out_funnel_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl_center_in_funnel_modem>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tpda_aodbg: tpda@8a04000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x8a04000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <71>;
|
|
|
|
qcom,dsb-elem-size = <0 32>;
|
|
coresight-name = "coresight-tpda-aodbg";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_aodbg_in_tpdm_mapss: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_mapss_out_tpda_aodbg>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
tpda_aodbg_out_funnel_in1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in1_in_tpda_aodbg>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_ddr: funnel@8a4c000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8a4c000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
status = "disabled";
|
|
coresight-name = "coresight-funnel-ddr";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_ddr_in_tpdm_ddr0: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr0_out_funnel_ddr>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_ddr_in_tpdm_ddr1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ddr1_out_funnel_ddr>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_ddr_out_tpda_dl_center_17: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl_center_17_in_funnel_ddr>;
|
|
source = <&tpdm_ddr0>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_ddr_out_tpda_dl_center_18: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl_center_18_in_funnel_ddr>;
|
|
source = <&tpdm_ddr1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
funnel_lpass_lpi: funnel@8a24000 {
|
|
compatible = "arm,coresight-static-funnel";
|
|
coresight-name = "coresight-funnel-lpass_lpi";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_lpass_lpi_in_audio_etm0: endpoint {
|
|
remote-endpoint =
|
|
<&audio_etm0_out_funnel_lpass_lpi>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_lpass_lpi_in_lpass_stm: endpoint {
|
|
remote-endpoint =
|
|
<&lpass_stm_out_funnel_lpass_lpi>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_lpass_lpi_in_tpdm_lpass_lpi: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_lpass_lpi_out_funnel_lpass_lpi>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_lpass_lpi_out_funnel_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_qdss_in_funnel_lpass_lpi>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_gfx: funnel@8944000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8944000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-gfx";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_gfx_in_tpdm_gfx: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_gfx_out_funnel_gfx>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_gfx_out_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_in_funnel_gfx>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tpda_qdss: tpda@8004000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x8004000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <65>;
|
|
coresight-name = "coresight-tpda-qdss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
qcom,cmb-elem-size = <9 32>,
|
|
<10 64>,
|
|
<13 32>,
|
|
<14 64>,
|
|
<15 64>;
|
|
|
|
qcom,dsb-elem-size = <1 32>,
|
|
<12 32>;
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
tpda_qdss_in_funnel_gfx: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_gfx_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@9 {
|
|
reg = <9>;
|
|
tpda_qdss_in_tpdm_dcc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dcc_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@10 {
|
|
reg = <10>;
|
|
tpda_qdss_in_tpdm_prng: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_prng_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@12 {
|
|
reg = <12>;
|
|
tpda_qdss_in_tpdm_qm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_qm_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@13 {
|
|
reg = <13>;
|
|
tpda_qdss_in_tpdm_spdm: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_spdm_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@14 {
|
|
reg = <14>;
|
|
tpda_qdss_in_tpdm_ipa: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ipa_out_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
port@15 {
|
|
reg = <15>;
|
|
tpda_qdss_in_tpdm_pimem: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_pimem_out_tpda_qdss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
tpda_qdss_out_funnel_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_qdss_in_tpda_qdss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_qdss: funnel@8005000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8005000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-qdss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_qdss_in_tpda_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_qdss_out_funnel_qdss>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_qdss_in_funnel_lpass_lpi: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_lpass_lpi_out_funnel_qdss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_qdss_out_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_in_funnel_qdss>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tpda_dl_center: tpda@8b43000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb969>;
|
|
|
|
reg = <0x8b43000 0x1000>;
|
|
reg-names = "tpda-base";
|
|
|
|
qcom,tpda-atid = <78>;
|
|
qcom,dsb-elem-size =<0 32>,
|
|
<3 32>,
|
|
<26 32>;
|
|
|
|
qcom,cmb-elem-size = <4 32>,
|
|
<17 64>,
|
|
<18 64>,
|
|
<20 32>,
|
|
<23 32>,
|
|
<24 32>,
|
|
<27 64>;
|
|
coresight-name = "coresight-tpda-dl_center";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
tpda_dl_center_in_tpdm_dlnt: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dlnt_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
tpda_dl_center_3_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_tpda_dl_center_3>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
tpda_dl_center_4_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_tpda_dl_center_4>;
|
|
};
|
|
};
|
|
|
|
port@17 {
|
|
reg = <17>;
|
|
tpda_dl_center_17_in_funnel_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_ddr_out_tpda_dl_center_17>;
|
|
};
|
|
};
|
|
|
|
port@18 {
|
|
reg = <18>;
|
|
tpda_dl_center_18_in_funnel_ddr: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_ddr_out_tpda_dl_center_18>;
|
|
};
|
|
};
|
|
|
|
port@20 {
|
|
reg = <20>;
|
|
tpda_dl_center_in_tpdm_vsense: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_vsense_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@23 {
|
|
reg = <23>;
|
|
tpda_dl_center_in_tpdm_sdcc1: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_sdcc1_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@24 {
|
|
reg = <24>;
|
|
tpda_dl_center_in_tpdm_sdcc2: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_sdcc2_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@26 {
|
|
reg = <26>;
|
|
tpda_dl_center_in_tpdm_dlct: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_dlct_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@27 {
|
|
reg = <27>;
|
|
tpda_dl_center_in_tpdm_ipcc: endpoint {
|
|
remote-endpoint =
|
|
<&tpdm_ipcc_out_tpda_dl_center>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tpda_dl_center_out_funnel_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl_center_in_tpda_dl_center>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_dl_center: funnel@8b44000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8b44000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-dl_center";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_dl_center_in_tpda_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_dl_center_out_funnel_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_dl_center_in_funnel_wpss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wpss_out_funnel_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
funnel_dl_center_in_funnel_modem: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_modem_out_funnel_dl_center>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_dl_center_in_funnel_apss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_apss_out_funnel_dl_center>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_dl_center_out_funnel_in1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in1_in_funnel_dl_center>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_in0: funnel@8041000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8041000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-in0";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_in0_in_funnel_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_qdss_out_funnel_in0>;
|
|
};
|
|
};
|
|
|
|
port@7 {
|
|
reg = <7>;
|
|
funnel_in0_in_stm: endpoint {
|
|
remote-endpoint =
|
|
<&stm_out_funnel_in0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_in0_out_funnel_merg: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_merg_in_funnel_in0>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_in1: funnel@8042000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8042000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-in1";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_in1_in_tpda_aodbg: endpoint {
|
|
remote-endpoint =
|
|
<&tpda_aodbg_out_funnel_in1>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
funnel_in1_in_funnel_wcss: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_wcss_out_funnel_in1>;
|
|
};
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
funnel_in1_in_funnel_dl_center: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_dl_center_out_funnel_in1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_in1_out_funnel_merg: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_merg_in_funnel_in1>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
funnel_merg: funnel@8045000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb908>;
|
|
|
|
reg = <0x8045000 0x1000>;
|
|
reg-names = "funnel-base";
|
|
|
|
coresight-name = "coresight-funnel-merg";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
funnel_merg_in_funnel_in0: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in0_out_funnel_merg>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
funnel_merg_in_funnel_in1: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_in1_out_funnel_merg>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
funnel_merg_out_tmc_etf: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etf_in_funnel_merg>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tmc_etf: tmc@8047000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb961>;
|
|
reg = <0x8047000 0x1000>;
|
|
reg-names = "tmc-base";
|
|
|
|
coresight-name = "coresight-tmc-etf";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
tmc_etf_in_funnel_merg: endpoint {
|
|
remote-endpoint =
|
|
<&funnel_merg_out_tmc_etf>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
port {
|
|
tmc_etf_out_replicator_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_qdss_in_tmc_etf>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
replicator_qdss: replicator@8046000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb909>;
|
|
|
|
reg = <0x8046000 0x1000>;
|
|
reg-names = "replicator-base";
|
|
|
|
coresight-name = "coresight-replicator_qdss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
in-ports {
|
|
port {
|
|
replicator_qdss_in_tmc_etf: endpoint {
|
|
remote-endpoint =
|
|
<&tmc_etf_out_replicator_qdss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
replicator_qdss_out_etr: endpoint {
|
|
remote-endpoint =
|
|
<&etr_in_replicator_qdss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tmc_etr: tmc@8048000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb961>;
|
|
|
|
reg = <0x8048000 0x1000>;
|
|
reg-names = "tmc-base";
|
|
|
|
qcom,iommu-dma = "bypass";
|
|
iommus = <&apps_smmu 0x0e0 0>;
|
|
|
|
qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
|
|
|
|
qcom,sw-usb;
|
|
coresight-name = "coresight-tmc-etr";
|
|
|
|
arm,buffer-size = <0x400000>;
|
|
coresight-csr = <&csr>;
|
|
csr-atid-offset = <0xf8>;
|
|
csr-irqctrl-offset = <0x6c>;
|
|
byte-cntr-name = "byte-cntr";
|
|
byte-cntr-class-name = "coresight-tmc-etr-stream";
|
|
|
|
interrupts = <GIC_SPI 429 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "byte-cntr-irq";
|
|
|
|
arm,scatter-gather;
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
port {
|
|
etr_in_replicator_qdss: endpoint {
|
|
remote-endpoint =
|
|
<&replicator_qdss_out_etr>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
apss_tgu: tgu@9840000 {
|
|
compatible = "arm,primecell";
|
|
arm,primecell-periphid = <0x000bb999>;
|
|
reg = <0x9840000 0x1000>;
|
|
reg-names = "tgu-base";
|
|
tgu-steps = <3>;
|
|
tgu-conditions = <4>;
|
|
tgu-regs = <8>;
|
|
tgu-timer-counters = <8>;
|
|
interrupts = <0 23 1>, <0 24 1>, <0 25 1>, <0 26 1>;
|
|
coresight-name = "coresight-tgu-apss";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
csr: csr@8001000 {
|
|
compatible = "qcom,coresight-csr";
|
|
|
|
reg = <0x8001000 0x1000>;
|
|
reg-names = "csr-base";
|
|
|
|
coresight-name = "coresight-csr";
|
|
qcom,set-byte-cntr-support;
|
|
qcom,blk-size = <1>;
|
|
};
|
|
|
|
swao_csr: csr@8a03000 {
|
|
compatible = "qcom,coresight-csr";
|
|
reg = <0x8a03000 0x1000>;
|
|
reg-names = "csr-base";
|
|
|
|
coresight-name = "coresight-swao-csr";
|
|
|
|
qcom,timestamp-support;
|
|
qcom,aodbg-csr-support;
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
|
|
qcom,blk-size = <1>;
|
|
};
|
|
|
|
apss_cti0: cti@98e0000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x98e0000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti0";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
apss_cti1: cti@98f0000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x98f0000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti1";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
apss_cti2: cti@9900000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x9900000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-apss_cti2";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
riscv_cti: cti@982b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x982b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-riscv_cti";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
lpass_lpi_cti: cti@8a21000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8a21000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_lpi_cti";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
lpass_q6_cti: cti@8a2b000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8a2b000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-lpass_q6_cti";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
mapss_cti: cti@8a02000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8a02000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-mapss_cti";
|
|
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
wcss_cti0: cti@89a4000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x89a4000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-wcss_cti0";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
wcss_cti1: cti@89a5000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x89a5000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-wcss_cti1";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
wcss_cti2: cti@89a6000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x89a6000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-wcss_cti2";
|
|
|
|
status = "disabled";
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
dlct1_cti0: cti@8b42000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8b42000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dlct1_cti0";
|
|
qcom,extended_cti;
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
dlnt_cti0: cti@8b49000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8b49000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-dlnt_cti0";
|
|
qcom,extended_cti;
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
qdss_cti: cti@8010000 {
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
|
reg = <0x8010000 0x1000>;
|
|
|
|
arm,primecell-periphid = <0x000bb922>;
|
|
coresight-name = "coresight-cti-qdss_cti";
|
|
qcom,extended_cti;
|
|
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
};
|