diff --git a/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.md b/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.md index f37dcbc..cb6cf51 100644 --- a/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.md +++ b/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.md @@ -3,10 +3,16 @@ 参考资料： * 内核头文件：`include\linux\spi\spi.h` + * 百问网驱动直播课里对应的源码 * GIT仓库：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git * 源码位置： ![image-20220217163558763](pic/10_ref_code.png) + +* 上述源码也放到了驱动大全的GIT仓库里，位置如下： + ![image-20220224174405587](pic/16_ref_code.png) + + ## 1. 回顾平台总线设备驱动模型 diff --git a/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif b/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif new file mode 100644 index 0000000..7310944 Binary files /dev/null and b/IMX6ULL/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif differ diff --git a/IMX6ULL/doc_pic/11_SPI/pic/16_ref_code.png b/IMX6ULL/doc_pic/11_SPI/pic/16_ref_code.png new file mode 100644 index 0000000..941f674 Binary files /dev/null and b/IMX6ULL/doc_pic/11_SPI/pic/16_ref_code.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.md b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.md new file mode 100644 index 0000000..c319480 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.md @@ -0,0 +1,34 @@ +## 总线设备驱动模型彻底分析 + +Linux在线培训班的预习资料等，放在GIT仓库里。 + +GIT仓库地址：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git + +GIT使用说明：https://download.100ask.org/tools/Software/git/how_to_use_git.html + +**注意**：GIT仓库地址无法在浏览器中直接访问，必须使用GIT工具。 + + + +### 1. 预习视频 + +跟上次课的视频一样： + +![image-20211119234511274](pic/06_platform_detail/01_driver_video.png) + +![image-20211119234645373](pic/06_platform_detail/02_vides.png) + + + +### 2. 示例代码 + +代码在GIT仓库中： + +![image-20211123153247720](pic/06_platform_detail/03_source.png) + + + +### 3. 详细分析 + +详细分析led_dev.c, led_drv.c中的代码。 + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.pdf b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.pdf new file mode 100644 index 0000000..98f5180 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.pdf differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.tif b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.tif new file mode 100644 index 0000000..4226f2e Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.tif differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/01_driver_video.png b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/01_driver_video.png new file mode 100644 index 0000000..92b5e0c Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/01_driver_video.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/02_vides.png b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/02_vides.png new file mode 100644 index 0000000..d4e9bc5 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/02_vides.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/03_source.png b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/03_source.png new file mode 100644 index 0000000..ffea724 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/pic/06_platform_detail/03_source.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/Makefile new file mode 100644 index 0000000..61281a4 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/Makefile @@ -0,0 +1,17 @@ +ARCH=x86 +CROSS_COMPILE= + +KVERSION = $(shell uname -r) +KERN_DIR = /lib/modules/$(KVERSION)/build + +all: + make -C $(KERN_DIR) M=`pwd` modules + +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +obj-m += led_drv.o +obj-m += led_dev.o +obj-m += led_dev2.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c new file mode 100644 index 0000000..f0036db --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c @@ -0,0 +1,63 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(1), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c new file mode 100644 index 0000000..1e655c7 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c @@ -0,0 +1,64 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(2), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led_second", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, + .driver_override = "100ask_led", +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c new file mode 100644 index 0000000..f890022 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c @@ -0,0 +1,63 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(3), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led_3", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c new file mode 100644 index 0000000..8ee1628 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c @@ -0,0 +1,180 @@ +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +#define LED_MAX_CNT 10 + +struct led_desc { + int pin; + int minor; +}; + +/* 1. 确定主设备号 */ +static int major = 0; +static struct class *led_class; + +static int g_ledcnt = 0; +static struct led_desc leds_desc[LED_MAX_CNT]; + + + +/* 3. 实现对应的open/read/write等函数，填入file_operations结构体 */ +static ssize_t led_drv_write (struct file *file, const char __user *buf, size_t size, loff_t *offset) +{ + int err; + char status; + struct inode *inode = file_inode(file); + int minor = iminor(inode); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + err = copy_from_user(&status, buf, 1); + + /* 根据次设备号和status控制LED */ + printk("set led pin 0x%x as %d\n", leds_desc[minor].pin, status); + + return 1; +} + +static int led_drv_open (struct inode *node, struct file *file) +{ + int minor = iminor(node); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* 根据次设备号初始化LED */ + printk("init led pin 0x%x as output\n", leds_desc[minor].pin); + + return 0; +} + + +/* 2. 定义自己的file_operations结构体 */ +static struct file_operations led_drv = { + .owner = THIS_MODULE, + .open = led_drv_open, + .write = led_drv_write, +}; + +/* B.1 实现platform_driver的probe函数 */ +static int led_probe(struct platform_device *pdev) +{ + int minor; + int i = 0; + + struct resource *res; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + res = platform_get_resource(pdev, IORESOURCE_IRQ, i++); + if (!res) + return -EINVAL; + + /* 记录引脚 */ + minor = g_ledcnt; + leds_desc[minor].pin = res->start; + leds_desc[minor].minor = minor; + + /* 7.2 辅助信息 */ + /* 创建设备节点 */ + device_create(led_class, NULL, MKDEV(major, minor), NULL, "100ask_led%d", minor); /* /dev/100ask_led0,1,... */ + + platform_set_drvdata(pdev, &leds_desc[minor]); + + g_ledcnt++; + + return 0; +} + +/* B.2 实现platform_driver的remove函数 */ +static int led_remove(struct platform_device *pdev) +{ + struct led_desc *led = platform_get_drvdata(pdev); + + device_destroy(led_class, MKDEV(major, led->minor)); /* /dev/100ask_led0,1,... */ + + return 0; +} + +static const struct platform_device_id led_id_table[] = { + {"100ask_led", 1}, + {"100ask_led_3", 2}, + {"100ask_led_4", 3}, + { }, +}; + + +/* A. 实现platform_driver */ +static struct platform_driver led_driver = { + .probe = led_probe, + .remove = led_remove, + .driver = { + .name = "100ask_led", + }, + .id_table = led_id_table, +}; + + + +/* 4. 把file_operations结构体告诉内核：注册驱动程序register_chrdev */ +/* 5. 谁来注册驱动程序啊？得有一个入口函数：安装驱动程序时，就会去调用这个入口函数 */ +static int __init led_init(void) +{ + int err; + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + major = register_chrdev(0, "100ask_led", &led_drv); /* /dev/led */ + + + /* 7.1 辅助信息 */ + led_class = class_create(THIS_MODULE, "100ask_led_class"); + err = PTR_ERR(led_class); + if (IS_ERR(led_class)) { + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + unregister_chrdev(major, "led"); + return -1; + } + + /* C. 注册platform_driver */ + err = platform_driver_register(&led_driver); + + return err; +} + +/* 6. 有入口函数就应该有出口函数：卸载驱动程序时，就会去调用这个出口函数 */ +static void __exit led_exit(void) +{ + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* C. 反注册platform_driver */ + platform_driver_unregister(&led_driver); + + class_destroy(led_class); + unregister_chrdev(major, "100ask_led"); +} + + +/* 7. 其他完善：提供设备信息，自动创建设备节点 */ + +module_init(led_init); +module_exit(led_exit); + +MODULE_LICENSE("GPL"); + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c new file mode 100644 index 0000000..099eb11 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c @@ -0,0 +1,50 @@ + +#include +#include +#include +#include +#include +#include + +/* + * ./ledtest /dev/100ask_led0 on + * ./ledtest /dev/100ask_led0 off + */ +int main(int argc, char **argv) +{ + int fd; + char status; + + /* 1. 判断参数 */ + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + /* 2. 打开文件 */ + fd = open(argv[1], O_RDWR); + if (fd == -1) + { + printf("can not open file %s\n", argv[1]); + return -1; + } + + /* 3. 写文件 */ + if (0 == strcmp(argv[2], "on")) + { + status = 1; + write(fd, &status, 1); + } + else + { + status = 0; + write(fd, &status, 1); + } + + close(fd); + + return 0; +} + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md new file mode 100644 index 0000000..5f6ea12 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md @@ -0,0 +1,22 @@ +## 07_设备树入门 + +Linux在线培训班的预习资料等，放在GIT仓库里。 + +GIT仓库地址：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git + +GIT使用说明：https://download.100ask.org/tools/Software/git/how_to_use_git.html + +**注意**：GIT仓库地址无法在浏览器中直接访问，必须使用GIT工具。 + + + +### 1. 预习视频 + +跟上次课的视频一样： + +![image-20211119234511274](pic/07_device_tree/01_driver_video.png) + +![image-20211125145343625](pic/07_device_tree/02_videos.png) + + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf new file mode 100644 index 0000000..f0365a1 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif new file mode 100644 index 0000000..effefd0 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts new file mode 100644 index 0000000..fca4d1e --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts @@ -0,0 +1,1625 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + chosen { + stdout-path = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + }; + + aliases { + can0 = "/soc/aips-bus@02000000/can@02090000"; + can1 = "/soc/aips-bus@02000000/can@02094000"; + ethernet0 = "/soc/aips-bus@02100000/ethernet@02188000"; + ethernet1 = "/soc/aips-bus@02000000/ethernet@020b4000"; + gpio0 = "/soc/aips-bus@02000000/gpio@0209c000"; + gpio1 = "/soc/aips-bus@02000000/gpio@020a0000"; + gpio2 = "/soc/aips-bus@02000000/gpio@020a4000"; + gpio3 = "/soc/aips-bus@02000000/gpio@020a8000"; + gpio4 = "/soc/aips-bus@02000000/gpio@020ac000"; + i2c0 = "/soc/aips-bus@02100000/i2c@021a0000"; + i2c1 = "/soc/aips-bus@02100000/i2c@021a4000"; + i2c2 = "/soc/aips-bus@02100000/i2c@021a8000"; + i2c3 = "/soc/aips-bus@02100000/i2c@021f8000"; + mmc0 = "/soc/aips-bus@02100000/usdhc@02190000"; + mmc1 = "/soc/aips-bus@02100000/usdhc@02194000"; + serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + serial1 = "/soc/aips-bus@02100000/serial@021e8000"; + serial2 = "/soc/aips-bus@02100000/serial@021ec000"; + serial3 = "/soc/aips-bus@02100000/serial@021f0000"; + serial4 = "/soc/aips-bus@02100000/serial@021f4000"; + serial5 = "/soc/aips-bus@02100000/serial@021fc000"; + serial6 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000"; + serial7 = "/soc/aips-bus@02200000/serial@02288000"; + spi0 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02008000"; + spi1 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c000"; + spi2 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000"; + spi3 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000"; + usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000"; + usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + clock-latency = <0xee6c>; + operating-points = <0xdbba0 0x137478 0xc15c0 0x12b128 0x80e80 0x11edd8 0x60ae0 0xfa3e8 0x30570 0xe7ef0>; + fsl,soc-operating-points = <0xdbba0 0x11edd8 0xc15c0 0x11edd8 0x80e80 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>; + fsl,low-power-run; + clocks = <0x1 0x5d 0x1 0x1a 0x1 0x26 0x1 0xdb 0x1 0x38 0x1 0x39 0x1 0x19 0x1 0x12 0x1 0xb 0x1 0x4 0x1 0x3>; + clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc"; + arm-supply = <0x2>; + soc-supply = <0x3>; + }; + }; + + interrupt-controller@00a01000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <0x3>; + interrupt-controller; + reg = <0xa01000 0x1000 0xa02000 0x100>; + linux,phandle = <0x1e>; + phandle = <0x1e>; + }; + + clocks { + #address-cells = <0x1>; + #size-cells = <0x0>; + + clock@0 { + compatible = "fixed-clock"; + reg = <0x0>; + #clock-cells = <0x0>; + clock-frequency = <0x8000>; + clock-output-names = "ckil"; + linux,phandle = <0x16>; + phandle = <0x16>; + }; + + clock@1 { + compatible = "fixed-clock"; + reg = <0x1>; + #clock-cells = <0x0>; + clock-frequency = <0x16e3600>; + clock-output-names = "osc"; + linux,phandle = <0x17>; + phandle = <0x17>; + }; + + clock@2 { + compatible = "fixed-clock"; + reg = <0x2>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di0"; + linux,phandle = <0x18>; + phandle = <0x18>; + }; + + clock@3 { + compatible = "fixed-clock"; + reg = <0x3>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di1"; + linux,phandle = <0x19>; + phandle = <0x19>; + }; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "simple-bus"; + interrupt-parent = <0x4>; + ranges; + + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <0x1 0x26 0x1 0x35 0x1 0x1a 0x1 0x5d 0x1 0x1b 0x1 0x55 0x1 0x3c 0x1 0x5e 0x1 0x3e 0x1 0x3 0x1 0x60 0x1 0xd4 0x1 0x56 0x1 0x3d 0x1 0x5f 0x1 0x3f 0x1 0x38 0x1 0xa3 0x1 0x4 0x1 0x12 0x1 0x19 0x1 0x39 0x1 0xb>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; + fsl,max_ddr_freq = <0x17d78400>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <0x0 0x5e 0x4>; + status = "disabled"; + }; + + sram@00900000 { + compatible = "fsl,lpm-sram"; + reg = <0x900000 0x4000>; + }; + + sram@00904000 { + compatible = "fsl,ddr-lpm-sram"; + reg = <0x904000 0x1000>; + }; + + sram@00905000 { + compatible = "mmio-sram"; + reg = <0x905000 0x1b000>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x918000 0x8000>; + overw_reg = <0x5 0x905000 0x13000>; + }; + + dma-apbh@01804000 { + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x1804000 0x2000>; + interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <0x1>; + dma-channels = <0x4>; + clocks = <0x1 0x80>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + gpmi-nand@01806000 { + compatible = "fsl,imx6ull-gpmi-nand", "fsl, imx6ul-gpmi-nand"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1806000 0x2000 0x1808000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0x0 0xf 0x4>; + interrupt-names = "bch"; + clocks = <0x1 0x85 0x1 0x86 0x1 0x84 0x1 0x83 0x1 0xdc>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; + dmas = <0x6 0x0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + + aips-bus@02000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x100000>; + ranges; + + spba-bus@02000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x40000>; + ranges; + + spdif@02004000 { + compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif"; + reg = <0x2004000 0x4000>; + interrupts = <0x0 0x34 0x4>; + dmas = <0x7 0x29 0x12 0x0 0x7 0x2a 0x12 0x0>; + dma-names = "rx", "tx"; + clocks = <0x1 0xd5 0x1 0x3 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x64 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba"; + status = "disabled"; + }; + + ecspi@02008000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2008000 0x4000>; + interrupts = <0x0 0x1f 0x4>; + clocks = <0x1 0x8b 0x1 0x8b>; + clock-names = "ipg", "per"; + dmas = <0x7 0x3 0x7 0x1 0x7 0x4 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x8>; + fsl,spi-num-chipselects = <0x2>; + cs-gpios = <0x9 0x1a 0x1 0x9 0x18 0x1>; + }; + + ecspi@0200c000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x200c000 0x4000>; + interrupts = <0x0 0x20 0x4>; + clocks = <0x1 0x8c 0x1 0x8c>; + clock-names = "ipg", "per"; + dmas = <0x7 0x5 0x7 0x1 0x7 0x6 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi@02010000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2010000 0x4000>; + interrupts = <0x0 0x21 0x4>; + clocks = <0x1 0x8d 0x1 0x8d>; + clock-names = "ipg", "per"; + dmas = <0x7 0x7 0x7 0x1 0x7 0x8 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xa>; + cs-gpios = <0xb 0x14 0x1>; + + icm20608@0 { + compatible = "invensense,icm20608"; + interrupt-parent = <0xb>; + interrupts = <0x1 0x1>; + spi-max-frequency = <0x7a1200>; + reg = <0x0>; + }; + }; + + ecspi@02014000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2014000 0x4000>; + interrupts = <0x0 0x22 0x4>; + clocks = <0x1 0x8e 0x1 0x8e>; + clock-names = "ipg", "per"; + dmas = <0x7 0x9 0x7 0x1 0x7 0xa 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02018000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2018000 0x4000>; + interrupts = <0x0 0x27 0x4>; + clocks = <0x1 0xc9 0x1 0xca>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2b 0x4 0x0 0x7 0x2c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02020000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2020000 0x4000>; + interrupts = <0x0 0x1a 0x4>; + clocks = <0x1 0xbd 0x1 0xbe>; + clock-names = "ipg", "per"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xc>; + }; + + esai@02024000 { + compatible = "fsl,imx6ull-esai"; + reg = <0x2024000 0x4000>; + interrupts = <0x0 0x33 0x4>; + clocks = <0x1 0xe6 0x1 0xe5 0x1 0xe4 0x1 0xe6 0x1 0xbb>; + clock-names = "core", "mem", "extal", "fsys", "spba"; + dmas = <0x7 0x0 0x15 0x0 0x7 0x2f 0x15 0x0>; + dma-names = "rx", "tx"; + dma-source = <0xd 0x0 0xe 0x0 0xf>; + status = "disabled"; + }; + + sai@02028000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2028000 0x4000>; + interrupts = <0x0 0x61 0x4>; + clocks = <0x1 0xb3 0x1 0x0 0x1 0xb2 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x23 0x18 0x0 0x7 0x24 0x18 0x0>; + status = "disabled"; + }; + + sai@0202c000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x202c000 0x4000>; + interrupts = <0x0 0x62 0x4>; + clocks = <0x1 0xb5 0x1 0x0 0x1 0xb4 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x25 0x18 0x0 0x7 0x26 0x18 0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xe>; + assigned-clocks = <0x1 0x47 0x1 0xb4>; + assigned-clock-parents = <0x1 0x32>; + assigned-clock-rates = <0x0 0xbb8000>; + linux,phandle = <0x3a>; + phandle = <0x3a>; + }; + + sai@02030000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2030000 0x4000>; + interrupts = <0x0 0x18 0x4>; + clocks = <0x1 0xb7 0x1 0x0 0x1 0xb6 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x27 0x18 0x0 0x7 0x28 0x18 0x0>; + status = "disabled"; + }; + + asrc@02034000 { + compatible = "fsl,imx53-asrc"; + reg = <0x2034000 0x4000>; + interrupts = <0x0 0x32 0x4>; + clocks = <0x1 0x81 0x1 0x82 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas = <0x7 0x11 0x17 0x1 0x7 0x12 0x17 0x1 0x7 0x13 0x17 0x1 0x7 0x14 0x17 0x1 0x7 0x15 0x17 0x1 0x7 0x16 0x17 0x1>; + dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; + fsl,asrc-rate = <0xbb80>; + fsl,asrc-width = <0x10>; + status = "okay"; + linux,phandle = <0x3c>; + phandle = <0x3c>; + }; + }; + + tsc@02040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x2040000 0x4000 0x219c000 0x4000>; + interrupts = <0x0 0x3 0x4 0x0 0x65 0x4>; + clocks = <0x1 0x64 0x1 0x7c>; + clock-names = "tsc", "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xf>; + xnur-gpio = <0xb 0x3 0x1>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + }; + + pwm@02080000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2080000 0x4000>; + interrupts = <0x0 0x53 0x4>; + clocks = <0x1 0xa7 0x1 0xa7>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x10>; + status = "okay"; + linux,phandle = <0x38>; + phandle = <0x38>; + }; + + pwm@02084000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2084000 0x4000>; + interrupts = <0x0 0x54 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@02088000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2088000 0x4000>; + interrupts = <0x0 0x55 0x4>; + clocks = <0x1 0xa9 0x1 0xa9>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@0208c000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x208c000 0x4000>; + interrupts = <0x0 0x56 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + can@02090000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2090000 0x4000>; + interrupts = <0x0 0x6e 0x4>; + clocks = <0x1 0x94 0x1 0x95>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x1 0x10 0x11>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x11>; + xceiver-supply = <0x12>; + }; + + can@02094000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2094000 0x4000>; + interrupts = <0x0 0x6f 0x4>; + clocks = <0x1 0x96 0x1 0x97>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x2 0x10 0x12>; + status = "disabled"; + }; + + gpt@02098000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x2098000 0x4000>; + interrupts = <0x0 0x37 0x4>; + clocks = <0x1 0x98 0x1 0xd6>; + clock-names = "ipg", "osc_per"; + }; + + gpio@0209c000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x209c000 0x4000>; + interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + gpio@020a0000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a0000 0x4000>; + interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + }; + + gpio@020a4000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a4000 0x4000>; + interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x32>; + phandle = <0x32>; + }; + + gpio@020a8000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a8000 0x4000>; + interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + gpio@020ac000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20ac000 0x4000>; + interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x15>; + phandle = <0x15>; + }; + + snvs@020b0000 { + compatible = "fsl,imx6ul-snvs"; + reg = <0x20b0000 0x4000>; + interrupts = <0x0 0x4 0x4>; + }; + + ethernet@020b4000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x20b4000 0x4000>; + interrupts = <0x0 0x78 0x4 0x0 0x79 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2e 0x1 0x2e>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x4>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x13>; + phy-mode = "rmii"; + phy-handle = <0x14>; + phy-reset-gpios = <0x15 0x6 0x1>; + phy-reset-duration = <0x1a>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x0>; + linux,phandle = <0x24>; + phandle = <0x24>; + }; + + ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x1>; + linux,phandle = <0x14>; + phandle = <0x14>; + }; + }; + }; + + kpp@020b8000 { + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; + reg = <0x20b8000 0x4000>; + interrupts = <0x0 0x52 0x4>; + clocks = <0x1 0x0>; + status = "disabled"; + }; + + wdog@020bc000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20bc000 0x4000>; + interrupts = <0x0 0x50 0x4>; + clocks = <0x1 0xd0>; + status = "okay"; + }; + + wdog@020c0000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20c0000 0x4000>; + interrupts = <0x0 0x51 0x4>; + clocks = <0x1 0xd1>; + status = "disabled"; + }; + + ccm@020c4000 { + compatible = "fsl,imx6ul-ccm"; + reg = <0x20c4000 0x4000>; + interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>; + #clock-cells = <0x1>; + clocks = <0x16 0x17 0x18 0x19>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; + assigned-clocks = <0x1 0x32>; + assigned-clock-rates = <0x2ee00000>; + linux,phandle = <0x1>; + phandle = <0x1>; + }; + + anatop@020c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus"; + reg = <0x20c8000 0x1000>; + interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>; + linux,phandle = <0x1b>; + phandle = <0x1b>; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <0x280de8>; + regulator-max-microvolt = <0x33e140>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <0x8>; + anatop-vol-bit-width = <0x5>; + anatop-min-bit-val = <0x0>; + anatop-min-voltage = <0x280de8>; + anatop-max-voltage = <0x33e140>; + anatop-enable-bit = <0x0>; + linux,phandle = <0x1a>; + phandle = <0x1a>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x0>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x18>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x12>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x1c>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + }; + + usbphy@020c9000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20c9000 0x1000>; + interrupts = <0x0 0x2c 0x4>; + clocks = <0x1 0x20>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x20>; + phandle = <0x20>; + }; + + usbphy@020ca000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20ca000 0x1000>; + interrupts = <0x0 0x2d 0x4>; + clocks = <0x1 0x21>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x22>; + phandle = <0x22>; + }; + + tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupts = <0x0 0x31 0x4>; + fsl,tempmon = <0x1b>; + fsl,tempmon-data = <0x1c>; + clocks = <0x1 0x1b>; + }; + + snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + linux,phandle = <0x1d>; + phandle = <0x1d>; + + snvs-rtc-lp { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <0x1d>; + offset = <0x34>; + interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>; + }; + + snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <0x1d>; + offset = <0x38>; + mask = <0x61>; + }; + + snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <0x1d>; + interrupts = <0x0 0x4 0x4>; + linux,keycode = <0x74>; + wakeup-source; + }; + }; + + epit@020d0000 { + reg = <0x20d0000 0x4000>; + interrupts = <0x0 0x38 0x4>; + }; + + epit@020d4000 { + reg = <0x20d4000 0x4000>; + interrupts = <0x0 0x39 0x4>; + }; + + src@020d8000 { + compatible = "fsl,imx6ul-src", "fsl,imx51-src"; + reg = <0x20d8000 0x4000>; + interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>; + #reset-cells = <0x1>; + }; + + gpc@020dc000 { + compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; + reg = <0x20dc000 0x4000>; + interrupt-controller; + #interrupt-cells = <0x3>; + interrupts = <0x0 0x59 0x4>; + interrupt-parent = <0x1e>; + fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>; + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0x0>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + + iomuxc@020e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x20e0000 0x4000>; + pinctrl-names = "default"; + pinctrl-0 = <0x1f>; + + imx6ul-evk { + + hoggrp-1 { + fsl,pins = <0x90 0x31c 0x0 0x5 0x0 0x17059 0x5c 0x2e8 0x4b8 0x2 0x0 0x17059 0x1c 0x60 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x1f>; + phandle = <0x1f>; + }; + + hdmigrp { + fsl,pins = <0x8c 0x318 0x0 0x5 0x0 0x59>; + linux,phandle = <0x2a>; + phandle = <0x2a>; + }; + + lcdif_tsc_int { + fsl,pins = <0x70 0x2fc 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x2d>; + phandle = <0x2d>; + }; + + enet1grp { + fsl,pins; + linux,phandle = <0x23>; + phandle = <0x23>; + }; + + enet2grp { + fsl,pins = <0x74 0x300 0x580 0x1 0x0 0x1b0b0 0x78 0x304 0x0 0x1 0x0 0x1b0b0 0xec 0x378 0x0 0x0 0x0 0x1b0b0 0x100 0x38c 0x0 0x0 0x0 0x1b0b0 0xe4 0x370 0x0 0x0 0x0 0x1b0b0 0xe8 0x374 0x0 0x0 0x0 0x1b0b0 0xf8 0x384 0x0 0x0 0x0 0x1b0b0 0xf0 0x37c 0x0 0x0 0x0 0x1b0b0 0xf4 0x380 0x0 0x0 0x0 0x1b0b0 0xfc 0x388 0x57c 0x4 0x2 0x4001b031 0xcc 0x358 0x0 0x0 0x0 0x1b0b0 0xe0 0x36c 0x0 0x0 0x0 0x1b0b0 0xc4 0x350 0x0 0x0 0x0 0x1b0b0 0xc8 0x354 0x0 0x0 0x0 0x1b0b0 0xd8 0x364 0x0 0x0 0x0 0x1b0b0 0xd0 0x35c 0x0 0x0 0x0 0x1b0b0 0xd4 0x360 0x0 0x0 0x0 0x1b0b0 0xdc 0x368 0x574 0x4 0x2 0x4001b031>; + linux,phandle = <0x13>; + phandle = <0x13>; + }; + + flexcan1grp { + fsl,pins = <0xac 0x338 0x0 0x2 0x0 0x10b0 0xb0 0x33c 0x584 0x2 0x0 0x10b0>; + linux,phandle = <0x11>; + phandle = <0x11>; + }; + + i2c1grp { + fsl,pins = <0xb4 0x340 0x5a4 0x2 0x1 0x4001b8b0 0xb8 0x344 0x5a8 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x28>; + phandle = <0x28>; + }; + + i2c2grp { + fsl,pins = <0xbc 0x348 0x5ac 0x2 0x2 0x4001b8b0 0xc0 0x34c 0x5b0 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x29>; + phandle = <0x29>; + }; + + ecspi3 { + fsl,pins = <0x9c 0x328 0x55c 0x8 0x0 0x10b0 0xa0 0x32c 0x558 0x8 0x0 0x10b0 0x98 0x324 0x554 0x8 0x0 0x10b0 0x94 0x320 0x0 0x5 0x0 0x10b0 0x60 0x2ec 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + ecspi1 { + fsl,pins = <0x1f4 0x480 0x534 0x3 0x1 0x10b0 0x1fc 0x488 0x53c 0x3 0x1 0x10b0 0x200 0x48c 0x538 0x3 0x1 0x10b0 0x1f8 0x484 0x0 0x5 0x0 0x10b0 0x1f0 0x47c 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + uart3grp { + fsl,pins = <0xa4 0x330 0x0 0x0 0x0 0x1b0b1 0xa8 0x334 0x634 0x0 0x1 0x1b0b1>; + linux,phandle = <0x34>; + phandle = <0x34>; + }; + + uart1grp { + fsl,pins = <0x84 0x310 0x0 0x0 0x0 0x1b0b1 0x88 0x314 0x624 0x0 0x3 0x1b0b1>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + + uart6grp { + fsl,pins = <0x1d4 0x460 0x0 0x8 0x0 0x1b0b1 0x1d8 0x464 0x64c 0x8 0x3 0x1b0b1>; + linux,phandle = <0x36>; + phandle = <0x36>; + }; + + sai2grp { + fsl,pins = <0x50 0x2dc 0x5f8 0x2 0x0 0x17088 0x4c 0x2d8 0x5fc 0x2 0x0 0x17088 0x58 0x2e4 0x0 0x2 0x0 0x11088 0x54 0x2e0 0x5f4 0x2 0x0 0x11088 0x48 0x2d4 0x5f0 0x2 0x0 0x17088>; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + tscgrp { + fsl,pins = <0x60 0x2ec 0x0 0x5 0x0 0xb0 0x64 0x2f0 0x0 0x5 0x0 0xb0 0x68 0x2f4 0x0 0x5 0x0 0xb0 0x6c 0x2f8 0x0 0x5 0x0 0xb0>; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + usdhc1grp { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x17059 0x1c0 0x44c 0x0 0x0 0x0 0x10071 0x1c4 0x450 0x0 0x0 0x0 0x17059 0x1c8 0x454 0x0 0x0 0x0 0x17059 0x1cc 0x458 0x0 0x0 0x0 0x17059 0x1d0 0x45c 0x0 0x0 0x0 0x17059>; + linux,phandle = <0x25>; + phandle = <0x25>; + }; + + usdhc1grp100mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170b9 0x1c0 0x44c 0x0 0x0 0x0 0x100b9 0x1c4 0x450 0x0 0x0 0x0 0x170b9 0x1c8 0x454 0x0 0x0 0x0 0x170b9 0x1cc 0x458 0x0 0x0 0x0 0x170b9 0x1d0 0x45c 0x0 0x0 0x0 0x170b9>; + }; + + usdhc1grp200mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170f9 0x1c0 0x44c 0x0 0x0 0x0 0x100f9 0x1c4 0x450 0x0 0x0 0x0 0x170f9 0x1c8 0x454 0x0 0x0 0x0 0x170f9 0x1cc 0x458 0x0 0x0 0x0 0x170f9 0x1d0 0x45c 0x0 0x0 0x0 0x170f9>; + }; + + usdhc2grp { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059>; + }; + + usdhc2grp_8bit { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059 0x190 0x41c 0x68c 0x1 0x1 0x17059 0x194 0x420 0x690 0x1 0x1 0x17059 0x198 0x424 0x694 0x1 0x1 0x17059 0x19c 0x428 0x698 0x1 0x1 0x17059>; + linux,phandle = <0x26>; + phandle = <0x26>; + }; + + usdhc2grp_8bit_100mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100b9 0x17c 0x408 0x678 0x1 0x2 0x170b9 0x180 0x40c 0x67c 0x1 0x2 0x170b9 0x184 0x410 0x680 0x1 0x2 0x170b9 0x188 0x414 0x684 0x1 0x1 0x170b9 0x18c 0x418 0x688 0x1 0x2 0x170b9 0x190 0x41c 0x68c 0x1 0x1 0x170b9 0x194 0x420 0x690 0x1 0x1 0x170b9 0x198 0x424 0x694 0x1 0x1 0x170b9 0x19c 0x428 0x698 0x1 0x1 0x170b9>; + }; + + usdhc2grp_8bit_200mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100f9 0x17c 0x408 0x678 0x1 0x2 0x170f9 0x180 0x40c 0x67c 0x1 0x2 0x170f9 0x184 0x410 0x680 0x1 0x2 0x170f9 0x188 0x414 0x684 0x1 0x1 0x170f9 0x18c 0x418 0x688 0x1 0x2 0x170f9 0x190 0x41c 0x68c 0x1 0x1 0x170f9 0x194 0x420 0x690 0x1 0x1 0x170f9 0x198 0x424 0x694 0x1 0x1 0x170f9 0x19c 0x428 0x698 0x1 0x1 0x170f9>; + }; + + lcdifdatgrp { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79 0x158 0x3e4 0x0 0x0 0x0 0x79 0x15c 0x3e8 0x0 0x0 0x0 0x79 0x160 0x3ec 0x0 0x0 0x0 0x79 0x164 0x3f0 0x0 0x0 0x0 0x79 0x168 0x3f4 0x0 0x0 0x0 0x79 0x16c 0x3f8 0x0 0x0 0x0 0x79 0x170 0x3fc 0x0 0x0 0x0 0x79 0x174 0x400 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2e>; + phandle = <0x2e>; + }; + + lcdifdatgrp_16bits { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79>; + }; + + lcdifctrlgrp { + fsl,pins = <0x104 0x390 0x0 0x0 0x0 0x79 0x108 0x394 0x0 0x0 0x0 0x79 0x10c 0x398 0x5dc 0x0 0x0 0x79 0x110 0x39c 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2f>; + phandle = <0x2f>; + }; + + pwm1grp { + fsl,pins = <0x7c 0x308 0x0 0x0 0x0 0x110b0>; + linux,phandle = <0x10>; + phandle = <0x10>; + }; + + lcdifresetgrp { + fsl,pins = <0x114 0x3a0 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x30>; + phandle = <0x30>; + }; + + adc1grp { + fsl,pins = <0x68 0x2f4 0x0 0x5 0x0 0x10b1 0x6c 0x2f8 0x0 0x5 0x0 0x10b1>; + linux,phandle = <0x27>; + phandle = <0x27>; + }; + }; + }; + + iomuxc-gpr@020e4000 { + compatible = "fsl,imx6ul-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; + reg = <0x20e4000 0x4000>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + + mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <0xd>; + status = "disabled"; + }; + + gpt@020e8000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x20e8000 0x4000>; + interrupts = <0x0 0x6d 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + }; + + sdma@020ec000 { + compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; + reg = <0x20ec000 0x4000>; + interrupts = <0x0 0x2 0x4>; + clocks = <0x1 0xb8 0x1 0xb8>; + clock-names = "ipg", "ahb"; + #dma-cells = <0x3>; + iram = <0x5>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + pwm@020f0000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f0000 0x4000>; + interrupts = <0x0 0x72 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f4000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f4000 0x4000>; + interrupts = <0x0 0x73 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f8000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f8000 0x4000>; + interrupts = <0x0 0x74 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020fc000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20fc000 0x4000>; + interrupts = <0x0 0x75 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + }; + + aips-bus@02100000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2100000 0x100000>; + ranges; + + usb@02184000 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184000 0x200>; + interrupts = <0x0 0x2b 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x20>; + fsl,usbmisc = <0x21 0x0>; + fsl,anatop = <0x1b>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + }; + + usb@02184200 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184200 0x200>; + interrupts = <0x0 0x2a 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x22>; + fsl,usbmisc = <0x21 0x1>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "host"; + disable-over-current; + }; + + usbmisc@02184800 { + #index-cells = <0x1>; + compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; + reg = <0x2184800 0x200>; + linux,phandle = <0x21>; + phandle = <0x21>; + }; + + ethernet@02188000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x2188000 0x4000>; + interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2c 0x1 0x2c>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x3>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x23>; + phy-mode = "rmii"; + phy-handle = <0x24>; + phy-reset-gpios = <0x15 0x9 0x1>; + phy-reset-duration = <0x1a>; + }; + + usdhc@02190000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2190000 0x4000>; + interrupts = <0x0 0x16 0x4>; + clocks = <0x1 0xce 0x1 0xce 0x1 0xce>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x40 0x1 0xce>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x4>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x25>; + cd-gpios = <0xb 0x13 0x1>; + keep-power-in-suspend; + enable-sdio-wakeup; + }; + + usdhc@02194000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2194000 0x4000>; + interrupts = <0x0 0x17 0x4>; + clocks = <0x1 0xcf 0x1 0xcf 0x1 0xcf>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x41 0x1 0xcf>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x8>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x26>; + non-removable; + }; + + adc@02198000 { + compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; + reg = <0x2198000 0x4000>; + interrupts = <0x0 0x64 0x4>; + clocks = <0x1 0x7b>; + num-channels = <0x5>; + clock-names = "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x27>; + vref-supply = <0x12>; + }; + + i2c@021a0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a0000 0x4000>; + interrupts = <0x0 0x24 0x4>; + clocks = <0x1 0x9c>; + status = "okay"; + clock-frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x28>; + }; + + i2c@021a4000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a4000 0x4000>; + interrupts = <0x0 0x25 0x4>; + clocks = <0x1 0x9d>; + status = "okay"; + clock_frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x29>; + + wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <0x1 0xb4>; + clock-names = "mclk"; + wlf,shared-lrclk; + linux,phandle = <0x3b>; + phandle = <0x3b>; + }; + + sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names = "sii902x"; + pinctrl-0 = <0x2a>; + resets = <0x2b>; + interrupt-parent = <0xb>; + interrupts = <0x12 0x2>; + mode_str = "1280x720M@60"; + bits-per-pixel = <0x10>; + reg = <0x39>; + status = "okay"; + }; + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <0xb>; + interrupts = <0x5 0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x2c 0x2d>; + reset-gpios = <0x15 0x2 0x1>; + irq-gpios = <0xb 0x5 0x2>; + irq-flags = <0x2>; + touchscreen-max-id = <0x5>; + touchscreen-size-x = <0x320>; + touchscreen-size-y = <0x1e0>; + touchscreen-max-w = <0x400>; + touchscreen-max-p = <0x400>; + goodix,type-a-report = <0x0>; + goodix,driver-send-cfg = <0x0>; + goodix,create-wr-node = <0x1>; + goodix,wakeup-with-reset = <0x0>; + goodix,resume-in-workqueue = <0x0>; + goodix,int-sync = <0x0>; + goodix,swap-x2y = <0x0>; + goodix,esd-protect = <0x0>; + goodix,pen-suppress-finger = <0x0>; + goodix,auto-update = <0x0>; + goodix,auto-update-cfg = <0x0>; + goodix,power-off-sleep = <0x0>; + goodix,cfg-group0 = [6b 00 04 58 02 05 0d 00 01 0f 28 0f 50 32 03 05 00 00 00 00 00 00 00 00 00 00 00 8a 2a 0c 45 47 0c 08 00 00 00 40 03 2c 00 01 00 00 00 03 64 32 00 00 00 28 64 94 d5 02 07 00 00 04 95 2c 00 8b 34 00 82 3f 00 7d 4c 00 7a 5b 00 7a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 18 16 14 12 10 0e 0c 0a 08 06 04 02 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 18 1c 1d 1e 1f 20 21 22 24 13 12 10 0f 0a 08 06 04 02 00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 79 01]; + goodix,cfg-group1 = [97 e0 01 10 01 05 0d 00 01 00 00 05 5a 46 53 11 00 00 11 11 14 14 14 22 0a 04 00 00 00 00 00 00 53 00 14 00 00 84 00 00 3c 00 00 64 1e 28 87 27 08 32 34 05 0d 20 33 60 11 02 24 00 00 64 80 80 14 02 00 00 54 89 68 85 6d 82 72 80 76 7d 7b 7b 00 00 00 00 00 00 00 f0 50 3c ff ff 07 00 00 00 02 14 14 03 04 00 21 64 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 20 50 3c 3c 00 00 00 00 00 0d 06 0c 05 0b 04 0a 03 ff ff ff ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3c 00 05 1e 00 02 2a 1e 19 14 02 00 03 0a 05 00 00 00 00 00 00 00 01 ff ff 86 22 03 00 00 33 00 0f 00 00 00 50 3c 50 00 00 00 00 2a 01]; + goodix,cfg-group2 = [00 20 03 e0 01 05 3c 00 01 08 28 0c 50 32 03 05 00 00 00 00 00 00 00 17 19 1e 14 8b 2b 0d 33 35 0c 08 00 00 00 9a 03 11 00 01 00 00 00 00 00 32 00 00 00 20 58 94 c5 02 00 00 00 04 b0 23 00 93 2b 00 7b 35 00 69 41 00 5b 4f 00 5b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0f 10 12 13 16 18 1c 1d 1e 1f 20 21 22 24 26 ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff 48 01]; + }; + }; + + i2c@021a8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a8000 0x4000>; + interrupts = <0x0 0x26 0x4>; + clocks = <0x1 0x9e>; + status = "disabled"; + }; + + romcp@021ac000 { + compatible = "fsl,imx6ul-romcp", "syscon"; + reg = <0x21ac000 0x4000>; + }; + + mmdc@021b0000 { + compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; + reg = <0x21b0000 0x4000>; + }; + + weim@021b8000 { + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; + reg = <0x21b8000 0x4000>; + interrupts = <0x0 0xe 0x4>; + clocks = <0x1 0x0>; + }; + + ocotp-ctrl@021bc000 { + compatible = "fsl,imx6ull-ocotp", "syscon"; + reg = <0x21bc000 0x4000>; + clocks = <0x1 0xa5>; + linux,phandle = <0x1c>; + phandle = <0x1c>; + }; + + csu@021c0000 { + compatible = "fsl,imx6ul-csu"; + reg = <0x21c0000 0x4000>; + interrupts = <0x0 0x15 0x4>; + status = "disabled"; + }; + + csi@021c4000 { + compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi"; + reg = <0x21c4000 0x4000>; + interrupts = <0x0 0x7 0x4>; + clocks = <0x1 0x0 0x1 0x8a 0x1 0x0>; + clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + status = "disabled"; + }; + + lcdif@021c8000 { + compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; + reg = <0x21c8000 0x4000>; + interrupts = <0x0 0x5 0x4>; + clocks = <0x1 0xa2 0x1 0xa1 0x1 0x0>; + clock-names = "pix", "axi", "disp_axi"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x2e 0x2f 0x30>; + display = <0x31>; + reset-gpios = <0x32 0x4 0x1>; + + display { + bits-per-pixel = <0x18>; + bus-width = <0x18>; + linux,phandle = <0x31>; + phandle = <0x31>; + + display-timings { + native-mode = <0x33>; + + timing0_1024x768 { + clock-frequency = <0x2faf080>; + hactive = <0x400>; + vactive = <0x258>; + hfront-porch = <0xa0>; + hback-porch = <0x8c>; + hsync-len = <0x14>; + vback-porch = <0x14>; + vfront-porch = <0xc>; + vsync-len = <0x3>; + hsync-active = <0x0>; + vsync-active = <0x0>; + de-active = <0x1>; + pixelclk-active = <0x0>; + linux,phandle = <0x33>; + phandle = <0x33>; + }; + }; + }; + }; + + pxp@021cc000 { + compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma"; + reg = <0x21cc000 0x4000>; + interrupts = <0x0 0x8 0x4 0x0 0x12 0x4>; + clocks = <0x1 0x0 0x1 0xaf>; + clock-names = "pxp_ipg", "pxp_axi"; + status = "okay"; + }; + + qspi@021e0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; + reg = <0x21e0000 0x4000 0x60000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0x0 0x6b 0x4>; + clocks = <0x1 0xb0 0x1 0xb0>; + clock-names = "qspi_en", "qspi"; + status = "disabled"; + }; + + serial@021e8000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21e8000 0x4000>; + interrupts = <0x0 0x1b 0x4>; + clocks = <0x1 0xbf 0x1 0xc0>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1b 0x4 0x0 0x7 0x1c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021ec000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21ec000 0x4000>; + interrupts = <0x0 0x1c 0x4>; + clocks = <0x1 0xc1 0x1 0xc2>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1d 0x4 0x0 0x7 0x1e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x34 0x35>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <0x64 0x64>; + linux,rs485-enabled-at-boot-time; + }; + + serial@021f0000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f0000 0x4000>; + interrupts = <0x0 0x1d 0x4>; + clocks = <0x1 0xc3 0x1 0xc4>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1f 0x4 0x0 0x7 0x20 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021f4000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f4000 0x4000>; + interrupts = <0x0 0x1e 0x4>; + clocks = <0x1 0xc5 0x1 0xc6>; + clock-names = "ipg", "per"; + dmas = <0x7 0x21 0x4 0x0 0x7 0x22 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c@021f8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21f8000 0x4000>; + interrupts = <0x0 0x23 0x4>; + clocks = <0x1 0x9f>; + status = "disabled"; + }; + + serial@021fc000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21fc000 0x4000>; + interrupts = <0x0 0x11 0x4>; + clocks = <0x1 0xc7 0x1 0xc8>; + clock-names = "ipg", "per"; + dmas = <0x7 0x0 0x4 0x0 0x7 0x2f 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x36>; + }; + }; + + aips-bus@02200000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2200000 0x100000>; + ranges; + + dcp@02280000 { + compatible = "fsl,imx6sl-dcp"; + reg = <0x2280000 0x4000>; + interrupts = <0x0 0x2e 0x4 0x0 0x2f 0x4 0x0 0x30 0x4>; + clocks = <0x1 0xe7>; + clock-names = "dcp"; + }; + + rngb@02284000 { + compatible = "fsl,imx6sl-rng", "fsl,imx-rng", "imx-rng"; + reg = <0x2284000 0x4000>; + interrupts = <0x0 0x6 0x4>; + clocks = <0x1 0x0>; + }; + + serial@02288000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2288000 0x4000>; + interrupts = <0x0 0x28 0x4>; + clocks = <0x1 0xcb 0x1 0xcc>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2d 0x4 0x0 0x7 0x2e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + epdc@0228c000 { + compatible = "fsl,imx7d-epdc"; + interrupts = <0x0 0x70 0x4>; + reg = <0x228c000 0x4000>; + clocks = <0x1 0xeb 0x1 0xec>; + clock-names = "epdc_axi", "epdc_pix"; + status = "disabled"; + }; + + iomuxc-snvs@02290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x2290000 0x10000>; + pinctrl-names = "default_snvs"; + pinctrl-0 = <0x37>; + + imx6ul-evk { + + hoggrp-2 { + fsl,pins = <0x2c 0x70 0x0 0x5 0x0 0x1b0b0 0x20 0x64 0x0 0x5 0x0 0x1b0b0 0xc 0x50 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x37>; + phandle = <0x37>; + }; + + tscresetgrp { + fsl,pins = <0x10 0x54 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x2c>; + phandle = <0x2c>; + }; + + spi4grp { + fsl,pins = <0x0 0x44 0x0 0x5 0x0 0x70a1 0x4 0x48 0x0 0x5 0x0 0x70a1 0x24 0x68 0x0 0x5 0x0 0x70a1 0x28 0x6c 0x0 0x5 0x0 0x80000000>; + linux,phandle = <0x3d>; + phandle = <0x3d>; + }; + + ledgrp { + fsl,pins = <0x14 0x58 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x39>; + phandle = <0x39>; + }; + + uart3_rs485 { + fsl,pins = <0x8 0x4c 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x35>; + phandle = <0x35>; + }; + }; + }; + + snvs-gpr@0x02294000 { + compatible = "fsl, imx6ull-snvs-gpr"; + reg = <0x2294000 0x10000>; + }; + }; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <0x38 0x0 0x3e8>; + brightness-levels = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x8 0xa>; + default-brightness-level = <0x8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + regulator@0 { + compatible = "regulator-fixed"; + reg = <0x0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + linux,phandle = <0x12>; + phandle = <0x12>; + }; + + regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <0x39fbc0>; + regulator-max-microvolt = <0x39fbc0>; + gpios = <0x15 0x5 0x0>; + enable-active-high; + regulator-boot-on; + }; + + regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + gpios = <0xb 0xa 0x1>; + regulator-boot-on; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <0x39>; + status = "disabled"; + + cpu { + label = "cpu"; + gpios = <0x15 0x3 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <0x15 0x1 0x1>; + gpio-key,wakeup; + linux,code = <0x2>; + }; + + user2 { + label = "User2 Button"; + gpios = <0x9 0xe 0x1>; + gpio-key,wakeup; + linux,code = <0x3>; + }; + }; + + sound { + compatible = "fsl,imx6ul-evk-wm8960", "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <0x3a>; + audio-codec = <0x3b>; + asrc-controller = <0x3c>; + codec-master; + gpr = <0xd 0x4 0x100000 0x100000>; + hp-det = <0x3 0x0>; + audio-routing = "Headphone Jack", "HP_L", "Headphone Jack", "HP_R", "Ext Spk", "SPK_LP", "Ext Spk", "SPK_LN", "Ext Spk", "SPK_RP", "Ext Spk", "SPK_RN", "LINPUT2", "Mic Jack", "LINPUT3", "Mic Jack", "RINPUT1", "Main MIC", "RINPUT2", "Main MIC", "Mic Jack", "MICB", "Main MIC", "MICB", "CPU-Playback", "ASRC-Playback", "Playback", "CPU-Playback", "ASRC-Capture", "CPU-Capture", "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <0x3d>; + pinctrl-assert-gpios = <0x15 0x8 0x1>; + status = "okay"; + gpio-sck = <0x15 0xb 0x0>; + gpio-mosi = <0x15 0xa 0x0>; + cs-gpios = <0x15 0x7 0x0>; + num-chipselects = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <0x2>; + reg = <0x0>; + registers-number = <0x1>; + registers-default = [57]; + spi-max-frequency = <0x2710>; + linux,phandle = <0x3e>; + phandle = <0x3e>; + }; + }; + + sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <0x3e 0x1 0x1>; + reset-delay-us = <0x186a0>; + #reset-cells = <0x0>; + status = "okay"; + linux,phandle = <0x2b>; + phandle = <0x2b>; + }; +}; diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts new file mode 100644 index 0000000..4e58b1b --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts @@ -0,0 +1,937 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include +#include "imx6ull.dtsi" + +/ { + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 1000>; + brightness-levels = <0 1 2 3 4 5 6 8 10>; + default-brightness-level = <8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_can_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_ltemodule: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + reg_gpio_wifi: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + status = "disabled"; + + led0: cpu { + label = "cpu"; + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + + user2 { + label = "User2 Button"; + gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + }; + sound { + compatible = "fsl,imx6ul-evk-wm8960", + "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <&sai2>; + audio-codec = <&codec>; + asrc-controller = <&asrc>; + codec-master; + gpr = <&gpr 4 0x100000 0x100000>; + hp-det = <3 0>; + /*hp-det-gpios = <&gpio5 4 0>; + mic-det-gpios = <&gpio5 4 0>;*/ + audio-routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Ext Spk", "SPK_LP", + "Ext Spk", "SPK_LN", + "Ext Spk", "SPK_RP", + "Ext Spk", "SPK_RN", + "LINPUT2", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Main MIC", + "RINPUT2", "Main MIC", + "Mic Jack", "MICB", + "Main MIC", "MICB", + "CPU-Playback", "ASRC-Playback", + "Playback", "CPU-Playback", + "ASRC-Capture", "CPU-Capture", + "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + status = "okay"; + gpio-sck = <&gpio5 11 0>; + gpio-mosi = <&gpio5 10 0>; + cs-gpios = <&gpio5 7 0>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + gpio_spi: gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <1>; + registers-default = /bits/ 8 <0x57>; + spi-max-frequency = <10000>; + }; + }; + + sii902x_reset: sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + #reset-cells = <0>; + status = "okay"; + }; + +}; + +&gpmi{ + status = "disabled"; +}; +&cpu0 { + arm-supply = <®_arm>; + soc-supply = <®_soc>; +}; + +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0>; + }; + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <1>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; +&gpc { + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks IMX6UL_CLK_SAI2>; + clock-names = "mclk"; + wlf,shared-lrclk; + }; + sii902x: sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names="sii902x"; + pinctrl-0 = <&pinctrl_sii902x>; + resets = <&sii902x_reset>; + interrupt-parent = <&gpio1>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + mode_str ="1280x720M@60"; + bits-per-pixel = <16>; + reg = <0x39>; + status = "okay"; + }; + + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>; + /*pinctrl-1 = <&pinctrl_tsc_irq>;*/ + /*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input"; + pinctrl-0 = <&ts_int_default>; + pinctrl-1 = <&ts_int_output_low>; + pinctrl-2 = <&ts_int_output_high>; + pinctrl-3 = <&ts_int_input>; + */ + reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>; + irq-flags = <2>; /*1:rising 2: falling*/ + + touchscreen-max-id = <5>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-max-w = <1024>; + touchscreen-max-p = <1024>; + /*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/ + + goodix,type-a-report = <0>; + goodix,driver-send-cfg = <0>; + goodix,create-wr-node = <1>; + goodix,wakeup-with-reset = <0>; + goodix,resume-in-workqueue = <0>; + goodix,int-sync = <0>; + goodix,swap-x2y = <0>; + goodix,esd-protect = <0>; + goodix,pen-suppress-finger = <0>; + goodix,auto-update = <0>; + goodix,auto-update-cfg = <0>; + goodix,power-off-sleep = <0>; + + /*7*/ + goodix,cfg-group0 = [ + 6b 00 04 58 02 05 0d 00 01 0f + 28 0f 50 32 03 05 00 00 00 00 + 00 00 00 00 00 00 00 8a 2a 0c + 45 47 0c 08 00 00 00 40 03 2c + 00 01 00 00 00 03 64 32 00 00 + 00 28 64 94 d5 02 07 00 00 04 + 95 2c 00 8b 34 00 82 3f 00 7d + 4c 00 7a 5b 00 7a 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 18 16 14 12 10 0e 0c 0a + 08 06 04 02 ff ff 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 16 18 1c 1d 1e 1f 20 21 + 22 24 13 12 10 0f 0a 08 06 04 + 02 00 ff ff ff ff ff ff 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 79 01 + ]; + + /*4.3*/ + goodix,cfg-group1 = [ + 97 E0 01 10 01 05 0D 00 01 00 + 00 05 5A 46 53 11 00 00 11 11 + 14 14 14 22 0A 04 00 00 00 00 + 00 00 53 00 14 00 00 84 00 00 + 3C 00 00 64 1E 28 87 27 08 32 + 34 05 0D 20 33 60 11 02 24 00 + 00 64 80 80 14 02 00 00 54 89 + 68 85 6D 82 72 80 76 7D 7B 7B + 00 00 00 00 00 00 00 F0 50 3C + FF FF 07 00 00 00 02 14 14 03 + 04 00 21 64 0A 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 32 20 50 3C 3C 00 00 00 00 00 + 0D 06 0C 05 0B 04 0A 03 FF FF + FF FF FF FF 00 01 02 03 04 05 + 06 07 08 09 0A 0B 0C 0D FF FF + FF FF FF FF FF FF FF FF FF FF + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 3C 00 05 1E 00 02 + 2A 1E 19 14 02 00 03 0A 05 00 + 00 00 00 00 00 00 01 FF FF 86 + 22 03 00 00 33 00 0F 00 00 00 + 50 3C 50 00 00 00 00 2A 01 + ]; + + /*5*/ + goodix,cfg-group2 = [ + 00 20 03 E0 01 05 3C 00 01 08 + 28 0C 50 32 03 05 00 00 00 00 + 00 00 00 17 19 1E 14 8B 2B 0D + 33 35 0C 08 00 00 00 9A 03 11 + 00 01 00 00 00 00 00 32 00 00 + 00 20 58 94 C5 02 00 00 00 04 + B0 23 00 93 2B 00 7B 35 00 69 + 41 00 5B 4F 00 5B 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 02 04 06 08 0A 0C 0E 10 + 12 14 16 18 1A FF 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 02 04 06 08 0A 0C 0F + 10 12 13 16 18 1C 1D 1E 1F 20 + 21 22 24 26 FF FF FF FF 00 00 + 00 FF FF FF FF FF FF FF FF FF + FF FF FF FF 48 01 + ]; + + }; + + +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>; + imx6ul-evk { + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 /* USB OTG1 ID */ + // MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x000010B0 + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110A0 + >; + }; + pinctrl_sii902x: hdmigrp { + fsl,pins = < + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59 + >; + }; + pinctrl_touchscreen_int: lcdif_tsc_int { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0 + >; + }; + pinctrl_enet1: enet1grp { + fsl,pins = < + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x000010B0 + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x000010B0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_ecspi3: ecspi3 { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x000010B0 + MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x000010B0 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x000010B0 + //MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x000010B0 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x000010B0 + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x000010B0 + >; + }; + + pinctrl_ecspi1: ecspi1 { + fsl,pins = < + MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x000010B0 + MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x000010B0 + MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x000010B0 + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x000010B0 + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x000010B0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + >; + }; + + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2_8bit: usdhc2grp_8bit { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + pinctrl_lcdif_reset: lcdifresetgrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0 + >; + }; + + pinctrl_adc1: adc1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x000010B1 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x000010B1 + >; + }; + + }; +}; + +&iomuxc_snvs { + pinctrl-names = "default_snvs"; + pinctrl-0 = <&pinctrl_hog_2>; + imx6ul-evk { + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 /* enet1 reset */ + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0 /* enet2 reset */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110A0 /*key 1*/ + >; + }; + + pinctrl_tsc_reset: tscresetgrp { /*!< Function assigned for the core: Cortex-A7[ca7] */ + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x000110A0 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 + MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 + >; + }; + + pinctrl_leds: ledgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0 + >; + }; + + pinctrl_485_ctl: uart3_rs485 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 + >; + }; + + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl + &pinctrl_lcdif_reset>; + display = <&display0>; + status = "okay"; + reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 100ask */ + + display0: display { + bits-per-pixel = <24>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0_1024x768 { + clock-frequency = <50000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <160>; + hback-porch = <140>; + hsync-len = <20>; + vback-porch = <20>; + vfront-porch = <12>; + vsync-len = <3>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pxp { + status = "okay"; +}; +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + status = "okay"; + + + spidev: icm20608@0{ + compatible = "invensense,icm20608"; + interrupt-parent = <&gpio1>; + interrupts = <1 1>; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3 + &pinctrl_485_ctl>; + //pinctrl-0 = <&pinctrl_uart3>; + //fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>; + //rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + //rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <100 100>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + status = "okay"; +}; + + +&usbotg1 { + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphy1 { + tx-d-cal = <0x5>; +}; + +&usbphy2 { + tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_8bit>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + status = "okay"; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc1>; + num-channels = <5>; + vref-supply = <®_can_3v3>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + /* + spidev0: spi@0 { + compatible = "rohm,dh2228fv"; + reg = <0>; + spi-max-frequency = <5000000>; + }; + + spidev1: spi@1 { + compatible = "rohm,dh2228fv"; + reg = <1>; + spi-max-frequency = <5000000>; + }; + */ + +}; + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png new file mode 100644 index 0000000..92b5e0c Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png new file mode 100644 index 0000000..27c19a9 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts new file mode 100644 index 0000000..fca4d1e --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts @@ -0,0 +1,1625 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + chosen { + stdout-path = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + }; + + aliases { + can0 = "/soc/aips-bus@02000000/can@02090000"; + can1 = "/soc/aips-bus@02000000/can@02094000"; + ethernet0 = "/soc/aips-bus@02100000/ethernet@02188000"; + ethernet1 = "/soc/aips-bus@02000000/ethernet@020b4000"; + gpio0 = "/soc/aips-bus@02000000/gpio@0209c000"; + gpio1 = "/soc/aips-bus@02000000/gpio@020a0000"; + gpio2 = "/soc/aips-bus@02000000/gpio@020a4000"; + gpio3 = "/soc/aips-bus@02000000/gpio@020a8000"; + gpio4 = "/soc/aips-bus@02000000/gpio@020ac000"; + i2c0 = "/soc/aips-bus@02100000/i2c@021a0000"; + i2c1 = "/soc/aips-bus@02100000/i2c@021a4000"; + i2c2 = "/soc/aips-bus@02100000/i2c@021a8000"; + i2c3 = "/soc/aips-bus@02100000/i2c@021f8000"; + mmc0 = "/soc/aips-bus@02100000/usdhc@02190000"; + mmc1 = "/soc/aips-bus@02100000/usdhc@02194000"; + serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + serial1 = "/soc/aips-bus@02100000/serial@021e8000"; + serial2 = "/soc/aips-bus@02100000/serial@021ec000"; + serial3 = "/soc/aips-bus@02100000/serial@021f0000"; + serial4 = "/soc/aips-bus@02100000/serial@021f4000"; + serial5 = "/soc/aips-bus@02100000/serial@021fc000"; + serial6 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000"; + serial7 = "/soc/aips-bus@02200000/serial@02288000"; + spi0 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02008000"; + spi1 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c000"; + spi2 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000"; + spi3 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000"; + usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000"; + usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + clock-latency = <0xee6c>; + operating-points = <0xdbba0 0x137478 0xc15c0 0x12b128 0x80e80 0x11edd8 0x60ae0 0xfa3e8 0x30570 0xe7ef0>; + fsl,soc-operating-points = <0xdbba0 0x11edd8 0xc15c0 0x11edd8 0x80e80 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>; + fsl,low-power-run; + clocks = <0x1 0x5d 0x1 0x1a 0x1 0x26 0x1 0xdb 0x1 0x38 0x1 0x39 0x1 0x19 0x1 0x12 0x1 0xb 0x1 0x4 0x1 0x3>; + clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc"; + arm-supply = <0x2>; + soc-supply = <0x3>; + }; + }; + + interrupt-controller@00a01000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <0x3>; + interrupt-controller; + reg = <0xa01000 0x1000 0xa02000 0x100>; + linux,phandle = <0x1e>; + phandle = <0x1e>; + }; + + clocks { + #address-cells = <0x1>; + #size-cells = <0x0>; + + clock@0 { + compatible = "fixed-clock"; + reg = <0x0>; + #clock-cells = <0x0>; + clock-frequency = <0x8000>; + clock-output-names = "ckil"; + linux,phandle = <0x16>; + phandle = <0x16>; + }; + + clock@1 { + compatible = "fixed-clock"; + reg = <0x1>; + #clock-cells = <0x0>; + clock-frequency = <0x16e3600>; + clock-output-names = "osc"; + linux,phandle = <0x17>; + phandle = <0x17>; + }; + + clock@2 { + compatible = "fixed-clock"; + reg = <0x2>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di0"; + linux,phandle = <0x18>; + phandle = <0x18>; + }; + + clock@3 { + compatible = "fixed-clock"; + reg = <0x3>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di1"; + linux,phandle = <0x19>; + phandle = <0x19>; + }; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "simple-bus"; + interrupt-parent = <0x4>; + ranges; + + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <0x1 0x26 0x1 0x35 0x1 0x1a 0x1 0x5d 0x1 0x1b 0x1 0x55 0x1 0x3c 0x1 0x5e 0x1 0x3e 0x1 0x3 0x1 0x60 0x1 0xd4 0x1 0x56 0x1 0x3d 0x1 0x5f 0x1 0x3f 0x1 0x38 0x1 0xa3 0x1 0x4 0x1 0x12 0x1 0x19 0x1 0x39 0x1 0xb>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; + fsl,max_ddr_freq = <0x17d78400>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <0x0 0x5e 0x4>; + status = "disabled"; + }; + + sram@00900000 { + compatible = "fsl,lpm-sram"; + reg = <0x900000 0x4000>; + }; + + sram@00904000 { + compatible = "fsl,ddr-lpm-sram"; + reg = <0x904000 0x1000>; + }; + + sram@00905000 { + compatible = "mmio-sram"; + reg = <0x905000 0x1b000>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x918000 0x8000>; + overw_reg = <0x5 0x905000 0x13000>; + }; + + dma-apbh@01804000 { + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x1804000 0x2000>; + interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <0x1>; + dma-channels = <0x4>; + clocks = <0x1 0x80>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + gpmi-nand@01806000 { + compatible = "fsl,imx6ull-gpmi-nand", "fsl, imx6ul-gpmi-nand"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1806000 0x2000 0x1808000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0x0 0xf 0x4>; + interrupt-names = "bch"; + clocks = <0x1 0x85 0x1 0x86 0x1 0x84 0x1 0x83 0x1 0xdc>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; + dmas = <0x6 0x0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + + aips-bus@02000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x100000>; + ranges; + + spba-bus@02000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x40000>; + ranges; + + spdif@02004000 { + compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif"; + reg = <0x2004000 0x4000>; + interrupts = <0x0 0x34 0x4>; + dmas = <0x7 0x29 0x12 0x0 0x7 0x2a 0x12 0x0>; + dma-names = "rx", "tx"; + clocks = <0x1 0xd5 0x1 0x3 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x64 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba"; + status = "disabled"; + }; + + ecspi@02008000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2008000 0x4000>; + interrupts = <0x0 0x1f 0x4>; + clocks = <0x1 0x8b 0x1 0x8b>; + clock-names = "ipg", "per"; + dmas = <0x7 0x3 0x7 0x1 0x7 0x4 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x8>; + fsl,spi-num-chipselects = <0x2>; + cs-gpios = <0x9 0x1a 0x1 0x9 0x18 0x1>; + }; + + ecspi@0200c000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x200c000 0x4000>; + interrupts = <0x0 0x20 0x4>; + clocks = <0x1 0x8c 0x1 0x8c>; + clock-names = "ipg", "per"; + dmas = <0x7 0x5 0x7 0x1 0x7 0x6 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi@02010000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2010000 0x4000>; + interrupts = <0x0 0x21 0x4>; + clocks = <0x1 0x8d 0x1 0x8d>; + clock-names = "ipg", "per"; + dmas = <0x7 0x7 0x7 0x1 0x7 0x8 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xa>; + cs-gpios = <0xb 0x14 0x1>; + + icm20608@0 { + compatible = "invensense,icm20608"; + interrupt-parent = <0xb>; + interrupts = <0x1 0x1>; + spi-max-frequency = <0x7a1200>; + reg = <0x0>; + }; + }; + + ecspi@02014000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2014000 0x4000>; + interrupts = <0x0 0x22 0x4>; + clocks = <0x1 0x8e 0x1 0x8e>; + clock-names = "ipg", "per"; + dmas = <0x7 0x9 0x7 0x1 0x7 0xa 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02018000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2018000 0x4000>; + interrupts = <0x0 0x27 0x4>; + clocks = <0x1 0xc9 0x1 0xca>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2b 0x4 0x0 0x7 0x2c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02020000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2020000 0x4000>; + interrupts = <0x0 0x1a 0x4>; + clocks = <0x1 0xbd 0x1 0xbe>; + clock-names = "ipg", "per"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xc>; + }; + + esai@02024000 { + compatible = "fsl,imx6ull-esai"; + reg = <0x2024000 0x4000>; + interrupts = <0x0 0x33 0x4>; + clocks = <0x1 0xe6 0x1 0xe5 0x1 0xe4 0x1 0xe6 0x1 0xbb>; + clock-names = "core", "mem", "extal", "fsys", "spba"; + dmas = <0x7 0x0 0x15 0x0 0x7 0x2f 0x15 0x0>; + dma-names = "rx", "tx"; + dma-source = <0xd 0x0 0xe 0x0 0xf>; + status = "disabled"; + }; + + sai@02028000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2028000 0x4000>; + interrupts = <0x0 0x61 0x4>; + clocks = <0x1 0xb3 0x1 0x0 0x1 0xb2 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x23 0x18 0x0 0x7 0x24 0x18 0x0>; + status = "disabled"; + }; + + sai@0202c000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x202c000 0x4000>; + interrupts = <0x0 0x62 0x4>; + clocks = <0x1 0xb5 0x1 0x0 0x1 0xb4 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x25 0x18 0x0 0x7 0x26 0x18 0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xe>; + assigned-clocks = <0x1 0x47 0x1 0xb4>; + assigned-clock-parents = <0x1 0x32>; + assigned-clock-rates = <0x0 0xbb8000>; + linux,phandle = <0x3a>; + phandle = <0x3a>; + }; + + sai@02030000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2030000 0x4000>; + interrupts = <0x0 0x18 0x4>; + clocks = <0x1 0xb7 0x1 0x0 0x1 0xb6 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x27 0x18 0x0 0x7 0x28 0x18 0x0>; + status = "disabled"; + }; + + asrc@02034000 { + compatible = "fsl,imx53-asrc"; + reg = <0x2034000 0x4000>; + interrupts = <0x0 0x32 0x4>; + clocks = <0x1 0x81 0x1 0x82 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas = <0x7 0x11 0x17 0x1 0x7 0x12 0x17 0x1 0x7 0x13 0x17 0x1 0x7 0x14 0x17 0x1 0x7 0x15 0x17 0x1 0x7 0x16 0x17 0x1>; + dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; + fsl,asrc-rate = <0xbb80>; + fsl,asrc-width = <0x10>; + status = "okay"; + linux,phandle = <0x3c>; + phandle = <0x3c>; + }; + }; + + tsc@02040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x2040000 0x4000 0x219c000 0x4000>; + interrupts = <0x0 0x3 0x4 0x0 0x65 0x4>; + clocks = <0x1 0x64 0x1 0x7c>; + clock-names = "tsc", "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xf>; + xnur-gpio = <0xb 0x3 0x1>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + }; + + pwm@02080000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2080000 0x4000>; + interrupts = <0x0 0x53 0x4>; + clocks = <0x1 0xa7 0x1 0xa7>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x10>; + status = "okay"; + linux,phandle = <0x38>; + phandle = <0x38>; + }; + + pwm@02084000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2084000 0x4000>; + interrupts = <0x0 0x54 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@02088000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2088000 0x4000>; + interrupts = <0x0 0x55 0x4>; + clocks = <0x1 0xa9 0x1 0xa9>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@0208c000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x208c000 0x4000>; + interrupts = <0x0 0x56 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + can@02090000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2090000 0x4000>; + interrupts = <0x0 0x6e 0x4>; + clocks = <0x1 0x94 0x1 0x95>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x1 0x10 0x11>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x11>; + xceiver-supply = <0x12>; + }; + + can@02094000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2094000 0x4000>; + interrupts = <0x0 0x6f 0x4>; + clocks = <0x1 0x96 0x1 0x97>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x2 0x10 0x12>; + status = "disabled"; + }; + + gpt@02098000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x2098000 0x4000>; + interrupts = <0x0 0x37 0x4>; + clocks = <0x1 0x98 0x1 0xd6>; + clock-names = "ipg", "osc_per"; + }; + + gpio@0209c000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x209c000 0x4000>; + interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + gpio@020a0000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a0000 0x4000>; + interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + }; + + gpio@020a4000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a4000 0x4000>; + interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x32>; + phandle = <0x32>; + }; + + gpio@020a8000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a8000 0x4000>; + interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + gpio@020ac000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20ac000 0x4000>; + interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x15>; + phandle = <0x15>; + }; + + snvs@020b0000 { + compatible = "fsl,imx6ul-snvs"; + reg = <0x20b0000 0x4000>; + interrupts = <0x0 0x4 0x4>; + }; + + ethernet@020b4000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x20b4000 0x4000>; + interrupts = <0x0 0x78 0x4 0x0 0x79 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2e 0x1 0x2e>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x4>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x13>; + phy-mode = "rmii"; + phy-handle = <0x14>; + phy-reset-gpios = <0x15 0x6 0x1>; + phy-reset-duration = <0x1a>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x0>; + linux,phandle = <0x24>; + phandle = <0x24>; + }; + + ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x1>; + linux,phandle = <0x14>; + phandle = <0x14>; + }; + }; + }; + + kpp@020b8000 { + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; + reg = <0x20b8000 0x4000>; + interrupts = <0x0 0x52 0x4>; + clocks = <0x1 0x0>; + status = "disabled"; + }; + + wdog@020bc000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20bc000 0x4000>; + interrupts = <0x0 0x50 0x4>; + clocks = <0x1 0xd0>; + status = "okay"; + }; + + wdog@020c0000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20c0000 0x4000>; + interrupts = <0x0 0x51 0x4>; + clocks = <0x1 0xd1>; + status = "disabled"; + }; + + ccm@020c4000 { + compatible = "fsl,imx6ul-ccm"; + reg = <0x20c4000 0x4000>; + interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>; + #clock-cells = <0x1>; + clocks = <0x16 0x17 0x18 0x19>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; + assigned-clocks = <0x1 0x32>; + assigned-clock-rates = <0x2ee00000>; + linux,phandle = <0x1>; + phandle = <0x1>; + }; + + anatop@020c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus"; + reg = <0x20c8000 0x1000>; + interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>; + linux,phandle = <0x1b>; + phandle = <0x1b>; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <0x280de8>; + regulator-max-microvolt = <0x33e140>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <0x8>; + anatop-vol-bit-width = <0x5>; + anatop-min-bit-val = <0x0>; + anatop-min-voltage = <0x280de8>; + anatop-max-voltage = <0x33e140>; + anatop-enable-bit = <0x0>; + linux,phandle = <0x1a>; + phandle = <0x1a>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x0>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x18>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x12>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x1c>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + }; + + usbphy@020c9000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20c9000 0x1000>; + interrupts = <0x0 0x2c 0x4>; + clocks = <0x1 0x20>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x20>; + phandle = <0x20>; + }; + + usbphy@020ca000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20ca000 0x1000>; + interrupts = <0x0 0x2d 0x4>; + clocks = <0x1 0x21>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x22>; + phandle = <0x22>; + }; + + tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupts = <0x0 0x31 0x4>; + fsl,tempmon = <0x1b>; + fsl,tempmon-data = <0x1c>; + clocks = <0x1 0x1b>; + }; + + snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + linux,phandle = <0x1d>; + phandle = <0x1d>; + + snvs-rtc-lp { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <0x1d>; + offset = <0x34>; + interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>; + }; + + snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <0x1d>; + offset = <0x38>; + mask = <0x61>; + }; + + snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <0x1d>; + interrupts = <0x0 0x4 0x4>; + linux,keycode = <0x74>; + wakeup-source; + }; + }; + + epit@020d0000 { + reg = <0x20d0000 0x4000>; + interrupts = <0x0 0x38 0x4>; + }; + + epit@020d4000 { + reg = <0x20d4000 0x4000>; + interrupts = <0x0 0x39 0x4>; + }; + + src@020d8000 { + compatible = "fsl,imx6ul-src", "fsl,imx51-src"; + reg = <0x20d8000 0x4000>; + interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>; + #reset-cells = <0x1>; + }; + + gpc@020dc000 { + compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; + reg = <0x20dc000 0x4000>; + interrupt-controller; + #interrupt-cells = <0x3>; + interrupts = <0x0 0x59 0x4>; + interrupt-parent = <0x1e>; + fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>; + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0x0>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + + iomuxc@020e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x20e0000 0x4000>; + pinctrl-names = "default"; + pinctrl-0 = <0x1f>; + + imx6ul-evk { + + hoggrp-1 { + fsl,pins = <0x90 0x31c 0x0 0x5 0x0 0x17059 0x5c 0x2e8 0x4b8 0x2 0x0 0x17059 0x1c 0x60 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x1f>; + phandle = <0x1f>; + }; + + hdmigrp { + fsl,pins = <0x8c 0x318 0x0 0x5 0x0 0x59>; + linux,phandle = <0x2a>; + phandle = <0x2a>; + }; + + lcdif_tsc_int { + fsl,pins = <0x70 0x2fc 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x2d>; + phandle = <0x2d>; + }; + + enet1grp { + fsl,pins; + linux,phandle = <0x23>; + phandle = <0x23>; + }; + + enet2grp { + fsl,pins = <0x74 0x300 0x580 0x1 0x0 0x1b0b0 0x78 0x304 0x0 0x1 0x0 0x1b0b0 0xec 0x378 0x0 0x0 0x0 0x1b0b0 0x100 0x38c 0x0 0x0 0x0 0x1b0b0 0xe4 0x370 0x0 0x0 0x0 0x1b0b0 0xe8 0x374 0x0 0x0 0x0 0x1b0b0 0xf8 0x384 0x0 0x0 0x0 0x1b0b0 0xf0 0x37c 0x0 0x0 0x0 0x1b0b0 0xf4 0x380 0x0 0x0 0x0 0x1b0b0 0xfc 0x388 0x57c 0x4 0x2 0x4001b031 0xcc 0x358 0x0 0x0 0x0 0x1b0b0 0xe0 0x36c 0x0 0x0 0x0 0x1b0b0 0xc4 0x350 0x0 0x0 0x0 0x1b0b0 0xc8 0x354 0x0 0x0 0x0 0x1b0b0 0xd8 0x364 0x0 0x0 0x0 0x1b0b0 0xd0 0x35c 0x0 0x0 0x0 0x1b0b0 0xd4 0x360 0x0 0x0 0x0 0x1b0b0 0xdc 0x368 0x574 0x4 0x2 0x4001b031>; + linux,phandle = <0x13>; + phandle = <0x13>; + }; + + flexcan1grp { + fsl,pins = <0xac 0x338 0x0 0x2 0x0 0x10b0 0xb0 0x33c 0x584 0x2 0x0 0x10b0>; + linux,phandle = <0x11>; + phandle = <0x11>; + }; + + i2c1grp { + fsl,pins = <0xb4 0x340 0x5a4 0x2 0x1 0x4001b8b0 0xb8 0x344 0x5a8 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x28>; + phandle = <0x28>; + }; + + i2c2grp { + fsl,pins = <0xbc 0x348 0x5ac 0x2 0x2 0x4001b8b0 0xc0 0x34c 0x5b0 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x29>; + phandle = <0x29>; + }; + + ecspi3 { + fsl,pins = <0x9c 0x328 0x55c 0x8 0x0 0x10b0 0xa0 0x32c 0x558 0x8 0x0 0x10b0 0x98 0x324 0x554 0x8 0x0 0x10b0 0x94 0x320 0x0 0x5 0x0 0x10b0 0x60 0x2ec 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + ecspi1 { + fsl,pins = <0x1f4 0x480 0x534 0x3 0x1 0x10b0 0x1fc 0x488 0x53c 0x3 0x1 0x10b0 0x200 0x48c 0x538 0x3 0x1 0x10b0 0x1f8 0x484 0x0 0x5 0x0 0x10b0 0x1f0 0x47c 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + uart3grp { + fsl,pins = <0xa4 0x330 0x0 0x0 0x0 0x1b0b1 0xa8 0x334 0x634 0x0 0x1 0x1b0b1>; + linux,phandle = <0x34>; + phandle = <0x34>; + }; + + uart1grp { + fsl,pins = <0x84 0x310 0x0 0x0 0x0 0x1b0b1 0x88 0x314 0x624 0x0 0x3 0x1b0b1>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + + uart6grp { + fsl,pins = <0x1d4 0x460 0x0 0x8 0x0 0x1b0b1 0x1d8 0x464 0x64c 0x8 0x3 0x1b0b1>; + linux,phandle = <0x36>; + phandle = <0x36>; + }; + + sai2grp { + fsl,pins = <0x50 0x2dc 0x5f8 0x2 0x0 0x17088 0x4c 0x2d8 0x5fc 0x2 0x0 0x17088 0x58 0x2e4 0x0 0x2 0x0 0x11088 0x54 0x2e0 0x5f4 0x2 0x0 0x11088 0x48 0x2d4 0x5f0 0x2 0x0 0x17088>; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + tscgrp { + fsl,pins = <0x60 0x2ec 0x0 0x5 0x0 0xb0 0x64 0x2f0 0x0 0x5 0x0 0xb0 0x68 0x2f4 0x0 0x5 0x0 0xb0 0x6c 0x2f8 0x0 0x5 0x0 0xb0>; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + usdhc1grp { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x17059 0x1c0 0x44c 0x0 0x0 0x0 0x10071 0x1c4 0x450 0x0 0x0 0x0 0x17059 0x1c8 0x454 0x0 0x0 0x0 0x17059 0x1cc 0x458 0x0 0x0 0x0 0x17059 0x1d0 0x45c 0x0 0x0 0x0 0x17059>; + linux,phandle = <0x25>; + phandle = <0x25>; + }; + + usdhc1grp100mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170b9 0x1c0 0x44c 0x0 0x0 0x0 0x100b9 0x1c4 0x450 0x0 0x0 0x0 0x170b9 0x1c8 0x454 0x0 0x0 0x0 0x170b9 0x1cc 0x458 0x0 0x0 0x0 0x170b9 0x1d0 0x45c 0x0 0x0 0x0 0x170b9>; + }; + + usdhc1grp200mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170f9 0x1c0 0x44c 0x0 0x0 0x0 0x100f9 0x1c4 0x450 0x0 0x0 0x0 0x170f9 0x1c8 0x454 0x0 0x0 0x0 0x170f9 0x1cc 0x458 0x0 0x0 0x0 0x170f9 0x1d0 0x45c 0x0 0x0 0x0 0x170f9>; + }; + + usdhc2grp { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059>; + }; + + usdhc2grp_8bit { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059 0x190 0x41c 0x68c 0x1 0x1 0x17059 0x194 0x420 0x690 0x1 0x1 0x17059 0x198 0x424 0x694 0x1 0x1 0x17059 0x19c 0x428 0x698 0x1 0x1 0x17059>; + linux,phandle = <0x26>; + phandle = <0x26>; + }; + + usdhc2grp_8bit_100mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100b9 0x17c 0x408 0x678 0x1 0x2 0x170b9 0x180 0x40c 0x67c 0x1 0x2 0x170b9 0x184 0x410 0x680 0x1 0x2 0x170b9 0x188 0x414 0x684 0x1 0x1 0x170b9 0x18c 0x418 0x688 0x1 0x2 0x170b9 0x190 0x41c 0x68c 0x1 0x1 0x170b9 0x194 0x420 0x690 0x1 0x1 0x170b9 0x198 0x424 0x694 0x1 0x1 0x170b9 0x19c 0x428 0x698 0x1 0x1 0x170b9>; + }; + + usdhc2grp_8bit_200mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100f9 0x17c 0x408 0x678 0x1 0x2 0x170f9 0x180 0x40c 0x67c 0x1 0x2 0x170f9 0x184 0x410 0x680 0x1 0x2 0x170f9 0x188 0x414 0x684 0x1 0x1 0x170f9 0x18c 0x418 0x688 0x1 0x2 0x170f9 0x190 0x41c 0x68c 0x1 0x1 0x170f9 0x194 0x420 0x690 0x1 0x1 0x170f9 0x198 0x424 0x694 0x1 0x1 0x170f9 0x19c 0x428 0x698 0x1 0x1 0x170f9>; + }; + + lcdifdatgrp { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79 0x158 0x3e4 0x0 0x0 0x0 0x79 0x15c 0x3e8 0x0 0x0 0x0 0x79 0x160 0x3ec 0x0 0x0 0x0 0x79 0x164 0x3f0 0x0 0x0 0x0 0x79 0x168 0x3f4 0x0 0x0 0x0 0x79 0x16c 0x3f8 0x0 0x0 0x0 0x79 0x170 0x3fc 0x0 0x0 0x0 0x79 0x174 0x400 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2e>; + phandle = <0x2e>; + }; + + lcdifdatgrp_16bits { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79>; + }; + + lcdifctrlgrp { + fsl,pins = <0x104 0x390 0x0 0x0 0x0 0x79 0x108 0x394 0x0 0x0 0x0 0x79 0x10c 0x398 0x5dc 0x0 0x0 0x79 0x110 0x39c 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2f>; + phandle = <0x2f>; + }; + + pwm1grp { + fsl,pins = <0x7c 0x308 0x0 0x0 0x0 0x110b0>; + linux,phandle = <0x10>; + phandle = <0x10>; + }; + + lcdifresetgrp { + fsl,pins = <0x114 0x3a0 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x30>; + phandle = <0x30>; + }; + + adc1grp { + fsl,pins = <0x68 0x2f4 0x0 0x5 0x0 0x10b1 0x6c 0x2f8 0x0 0x5 0x0 0x10b1>; + linux,phandle = <0x27>; + phandle = <0x27>; + }; + }; + }; + + iomuxc-gpr@020e4000 { + compatible = "fsl,imx6ul-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; + reg = <0x20e4000 0x4000>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + + mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <0xd>; + status = "disabled"; + }; + + gpt@020e8000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x20e8000 0x4000>; + interrupts = <0x0 0x6d 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + }; + + sdma@020ec000 { + compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; + reg = <0x20ec000 0x4000>; + interrupts = <0x0 0x2 0x4>; + clocks = <0x1 0xb8 0x1 0xb8>; + clock-names = "ipg", "ahb"; + #dma-cells = <0x3>; + iram = <0x5>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + pwm@020f0000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f0000 0x4000>; + interrupts = <0x0 0x72 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f4000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f4000 0x4000>; + interrupts = <0x0 0x73 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f8000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f8000 0x4000>; + interrupts = <0x0 0x74 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020fc000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20fc000 0x4000>; + interrupts = <0x0 0x75 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + }; + + aips-bus@02100000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2100000 0x100000>; + ranges; + + usb@02184000 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184000 0x200>; + interrupts = <0x0 0x2b 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x20>; + fsl,usbmisc = <0x21 0x0>; + fsl,anatop = <0x1b>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + }; + + usb@02184200 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184200 0x200>; + interrupts = <0x0 0x2a 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x22>; + fsl,usbmisc = <0x21 0x1>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "host"; + disable-over-current; + }; + + usbmisc@02184800 { + #index-cells = <0x1>; + compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; + reg = <0x2184800 0x200>; + linux,phandle = <0x21>; + phandle = <0x21>; + }; + + ethernet@02188000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x2188000 0x4000>; + interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2c 0x1 0x2c>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x3>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x23>; + phy-mode = "rmii"; + phy-handle = <0x24>; + phy-reset-gpios = <0x15 0x9 0x1>; + phy-reset-duration = <0x1a>; + }; + + usdhc@02190000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2190000 0x4000>; + interrupts = <0x0 0x16 0x4>; + clocks = <0x1 0xce 0x1 0xce 0x1 0xce>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x40 0x1 0xce>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x4>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x25>; + cd-gpios = <0xb 0x13 0x1>; + keep-power-in-suspend; + enable-sdio-wakeup; + }; + + usdhc@02194000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2194000 0x4000>; + interrupts = <0x0 0x17 0x4>; + clocks = <0x1 0xcf 0x1 0xcf 0x1 0xcf>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x41 0x1 0xcf>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x8>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x26>; + non-removable; + }; + + adc@02198000 { + compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; + reg = <0x2198000 0x4000>; + interrupts = <0x0 0x64 0x4>; + clocks = <0x1 0x7b>; + num-channels = <0x5>; + clock-names = "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x27>; + vref-supply = <0x12>; + }; + + i2c@021a0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a0000 0x4000>; + interrupts = <0x0 0x24 0x4>; + clocks = <0x1 0x9c>; + status = "okay"; + clock-frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x28>; + }; + + i2c@021a4000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a4000 0x4000>; + interrupts = <0x0 0x25 0x4>; + clocks = <0x1 0x9d>; + status = "okay"; + clock_frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x29>; + + wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <0x1 0xb4>; + clock-names = "mclk"; + wlf,shared-lrclk; + linux,phandle = <0x3b>; + phandle = <0x3b>; + }; + + sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names = "sii902x"; + pinctrl-0 = <0x2a>; + resets = <0x2b>; + interrupt-parent = <0xb>; + interrupts = <0x12 0x2>; + mode_str = "1280x720M@60"; + bits-per-pixel = <0x10>; + reg = <0x39>; + status = "okay"; + }; + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <0xb>; + interrupts = <0x5 0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x2c 0x2d>; + reset-gpios = <0x15 0x2 0x1>; + irq-gpios = <0xb 0x5 0x2>; + irq-flags = <0x2>; + touchscreen-max-id = <0x5>; + touchscreen-size-x = <0x320>; + touchscreen-size-y = <0x1e0>; + touchscreen-max-w = <0x400>; + touchscreen-max-p = <0x400>; + goodix,type-a-report = <0x0>; + goodix,driver-send-cfg = <0x0>; + goodix,create-wr-node = <0x1>; + goodix,wakeup-with-reset = <0x0>; + goodix,resume-in-workqueue = <0x0>; + goodix,int-sync = <0x0>; + goodix,swap-x2y = <0x0>; + goodix,esd-protect = <0x0>; + goodix,pen-suppress-finger = <0x0>; + goodix,auto-update = <0x0>; + goodix,auto-update-cfg = <0x0>; + goodix,power-off-sleep = <0x0>; + goodix,cfg-group0 = [6b 00 04 58 02 05 0d 00 01 0f 28 0f 50 32 03 05 00 00 00 00 00 00 00 00 00 00 00 8a 2a 0c 45 47 0c 08 00 00 00 40 03 2c 00 01 00 00 00 03 64 32 00 00 00 28 64 94 d5 02 07 00 00 04 95 2c 00 8b 34 00 82 3f 00 7d 4c 00 7a 5b 00 7a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 18 16 14 12 10 0e 0c 0a 08 06 04 02 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 18 1c 1d 1e 1f 20 21 22 24 13 12 10 0f 0a 08 06 04 02 00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 79 01]; + goodix,cfg-group1 = [97 e0 01 10 01 05 0d 00 01 00 00 05 5a 46 53 11 00 00 11 11 14 14 14 22 0a 04 00 00 00 00 00 00 53 00 14 00 00 84 00 00 3c 00 00 64 1e 28 87 27 08 32 34 05 0d 20 33 60 11 02 24 00 00 64 80 80 14 02 00 00 54 89 68 85 6d 82 72 80 76 7d 7b 7b 00 00 00 00 00 00 00 f0 50 3c ff ff 07 00 00 00 02 14 14 03 04 00 21 64 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 20 50 3c 3c 00 00 00 00 00 0d 06 0c 05 0b 04 0a 03 ff ff ff ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3c 00 05 1e 00 02 2a 1e 19 14 02 00 03 0a 05 00 00 00 00 00 00 00 01 ff ff 86 22 03 00 00 33 00 0f 00 00 00 50 3c 50 00 00 00 00 2a 01]; + goodix,cfg-group2 = [00 20 03 e0 01 05 3c 00 01 08 28 0c 50 32 03 05 00 00 00 00 00 00 00 17 19 1e 14 8b 2b 0d 33 35 0c 08 00 00 00 9a 03 11 00 01 00 00 00 00 00 32 00 00 00 20 58 94 c5 02 00 00 00 04 b0 23 00 93 2b 00 7b 35 00 69 41 00 5b 4f 00 5b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0f 10 12 13 16 18 1c 1d 1e 1f 20 21 22 24 26 ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff 48 01]; + }; + }; + + i2c@021a8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a8000 0x4000>; + interrupts = <0x0 0x26 0x4>; + clocks = <0x1 0x9e>; + status = "disabled"; + }; + + romcp@021ac000 { + compatible = "fsl,imx6ul-romcp", "syscon"; + reg = <0x21ac000 0x4000>; + }; + + mmdc@021b0000 { + compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; + reg = <0x21b0000 0x4000>; + }; + + weim@021b8000 { + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; + reg = <0x21b8000 0x4000>; + interrupts = <0x0 0xe 0x4>; + clocks = <0x1 0x0>; + }; + + ocotp-ctrl@021bc000 { + compatible = "fsl,imx6ull-ocotp", "syscon"; + reg = <0x21bc000 0x4000>; + clocks = <0x1 0xa5>; + linux,phandle = <0x1c>; + phandle = <0x1c>; + }; + + csu@021c0000 { + compatible = "fsl,imx6ul-csu"; + reg = <0x21c0000 0x4000>; + interrupts = <0x0 0x15 0x4>; + status = "disabled"; + }; + + csi@021c4000 { + compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi"; + reg = <0x21c4000 0x4000>; + interrupts = <0x0 0x7 0x4>; + clocks = <0x1 0x0 0x1 0x8a 0x1 0x0>; + clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + status = "disabled"; + }; + + lcdif@021c8000 { + compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; + reg = <0x21c8000 0x4000>; + interrupts = <0x0 0x5 0x4>; + clocks = <0x1 0xa2 0x1 0xa1 0x1 0x0>; + clock-names = "pix", "axi", "disp_axi"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x2e 0x2f 0x30>; + display = <0x31>; + reset-gpios = <0x32 0x4 0x1>; + + display { + bits-per-pixel = <0x18>; + bus-width = <0x18>; + linux,phandle = <0x31>; + phandle = <0x31>; + + display-timings { + native-mode = <0x33>; + + timing0_1024x768 { + clock-frequency = <0x2faf080>; + hactive = <0x400>; + vactive = <0x258>; + hfront-porch = <0xa0>; + hback-porch = <0x8c>; + hsync-len = <0x14>; + vback-porch = <0x14>; + vfront-porch = <0xc>; + vsync-len = <0x3>; + hsync-active = <0x0>; + vsync-active = <0x0>; + de-active = <0x1>; + pixelclk-active = <0x0>; + linux,phandle = <0x33>; + phandle = <0x33>; + }; + }; + }; + }; + + pxp@021cc000 { + compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma"; + reg = <0x21cc000 0x4000>; + interrupts = <0x0 0x8 0x4 0x0 0x12 0x4>; + clocks = <0x1 0x0 0x1 0xaf>; + clock-names = "pxp_ipg", "pxp_axi"; + status = "okay"; + }; + + qspi@021e0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; + reg = <0x21e0000 0x4000 0x60000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0x0 0x6b 0x4>; + clocks = <0x1 0xb0 0x1 0xb0>; + clock-names = "qspi_en", "qspi"; + status = "disabled"; + }; + + serial@021e8000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21e8000 0x4000>; + interrupts = <0x0 0x1b 0x4>; + clocks = <0x1 0xbf 0x1 0xc0>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1b 0x4 0x0 0x7 0x1c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021ec000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21ec000 0x4000>; + interrupts = <0x0 0x1c 0x4>; + clocks = <0x1 0xc1 0x1 0xc2>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1d 0x4 0x0 0x7 0x1e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x34 0x35>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <0x64 0x64>; + linux,rs485-enabled-at-boot-time; + }; + + serial@021f0000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f0000 0x4000>; + interrupts = <0x0 0x1d 0x4>; + clocks = <0x1 0xc3 0x1 0xc4>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1f 0x4 0x0 0x7 0x20 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021f4000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f4000 0x4000>; + interrupts = <0x0 0x1e 0x4>; + clocks = <0x1 0xc5 0x1 0xc6>; + clock-names = "ipg", "per"; + dmas = <0x7 0x21 0x4 0x0 0x7 0x22 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c@021f8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21f8000 0x4000>; + interrupts = <0x0 0x23 0x4>; + clocks = <0x1 0x9f>; + status = "disabled"; + }; + + serial@021fc000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21fc000 0x4000>; + interrupts = <0x0 0x11 0x4>; + clocks = <0x1 0xc7 0x1 0xc8>; + clock-names = "ipg", "per"; + dmas = <0x7 0x0 0x4 0x0 0x7 0x2f 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x36>; + }; + }; + + aips-bus@02200000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2200000 0x100000>; + ranges; + + dcp@02280000 { + compatible = "fsl,imx6sl-dcp"; + reg = <0x2280000 0x4000>; + interrupts = <0x0 0x2e 0x4 0x0 0x2f 0x4 0x0 0x30 0x4>; + clocks = <0x1 0xe7>; + clock-names = "dcp"; + }; + + rngb@02284000 { + compatible = "fsl,imx6sl-rng", "fsl,imx-rng", "imx-rng"; + reg = <0x2284000 0x4000>; + interrupts = <0x0 0x6 0x4>; + clocks = <0x1 0x0>; + }; + + serial@02288000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2288000 0x4000>; + interrupts = <0x0 0x28 0x4>; + clocks = <0x1 0xcb 0x1 0xcc>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2d 0x4 0x0 0x7 0x2e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + epdc@0228c000 { + compatible = "fsl,imx7d-epdc"; + interrupts = <0x0 0x70 0x4>; + reg = <0x228c000 0x4000>; + clocks = <0x1 0xeb 0x1 0xec>; + clock-names = "epdc_axi", "epdc_pix"; + status = "disabled"; + }; + + iomuxc-snvs@02290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x2290000 0x10000>; + pinctrl-names = "default_snvs"; + pinctrl-0 = <0x37>; + + imx6ul-evk { + + hoggrp-2 { + fsl,pins = <0x2c 0x70 0x0 0x5 0x0 0x1b0b0 0x20 0x64 0x0 0x5 0x0 0x1b0b0 0xc 0x50 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x37>; + phandle = <0x37>; + }; + + tscresetgrp { + fsl,pins = <0x10 0x54 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x2c>; + phandle = <0x2c>; + }; + + spi4grp { + fsl,pins = <0x0 0x44 0x0 0x5 0x0 0x70a1 0x4 0x48 0x0 0x5 0x0 0x70a1 0x24 0x68 0x0 0x5 0x0 0x70a1 0x28 0x6c 0x0 0x5 0x0 0x80000000>; + linux,phandle = <0x3d>; + phandle = <0x3d>; + }; + + ledgrp { + fsl,pins = <0x14 0x58 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x39>; + phandle = <0x39>; + }; + + uart3_rs485 { + fsl,pins = <0x8 0x4c 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x35>; + phandle = <0x35>; + }; + }; + }; + + snvs-gpr@0x02294000 { + compatible = "fsl, imx6ull-snvs-gpr"; + reg = <0x2294000 0x10000>; + }; + }; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <0x38 0x0 0x3e8>; + brightness-levels = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x8 0xa>; + default-brightness-level = <0x8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + regulator@0 { + compatible = "regulator-fixed"; + reg = <0x0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + linux,phandle = <0x12>; + phandle = <0x12>; + }; + + regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <0x39fbc0>; + regulator-max-microvolt = <0x39fbc0>; + gpios = <0x15 0x5 0x0>; + enable-active-high; + regulator-boot-on; + }; + + regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + gpios = <0xb 0xa 0x1>; + regulator-boot-on; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <0x39>; + status = "disabled"; + + cpu { + label = "cpu"; + gpios = <0x15 0x3 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <0x15 0x1 0x1>; + gpio-key,wakeup; + linux,code = <0x2>; + }; + + user2 { + label = "User2 Button"; + gpios = <0x9 0xe 0x1>; + gpio-key,wakeup; + linux,code = <0x3>; + }; + }; + + sound { + compatible = "fsl,imx6ul-evk-wm8960", "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <0x3a>; + audio-codec = <0x3b>; + asrc-controller = <0x3c>; + codec-master; + gpr = <0xd 0x4 0x100000 0x100000>; + hp-det = <0x3 0x0>; + audio-routing = "Headphone Jack", "HP_L", "Headphone Jack", "HP_R", "Ext Spk", "SPK_LP", "Ext Spk", "SPK_LN", "Ext Spk", "SPK_RP", "Ext Spk", "SPK_RN", "LINPUT2", "Mic Jack", "LINPUT3", "Mic Jack", "RINPUT1", "Main MIC", "RINPUT2", "Main MIC", "Mic Jack", "MICB", "Main MIC", "MICB", "CPU-Playback", "ASRC-Playback", "Playback", "CPU-Playback", "ASRC-Capture", "CPU-Capture", "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <0x3d>; + pinctrl-assert-gpios = <0x15 0x8 0x1>; + status = "okay"; + gpio-sck = <0x15 0xb 0x0>; + gpio-mosi = <0x15 0xa 0x0>; + cs-gpios = <0x15 0x7 0x0>; + num-chipselects = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <0x2>; + reg = <0x0>; + registers-number = <0x1>; + registers-default = [57]; + spi-max-frequency = <0x2710>; + linux,phandle = <0x3e>; + phandle = <0x3e>; + }; + }; + + sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <0x3e 0x1 0x1>; + reset-delay-us = <0x186a0>; + #reset-cells = <0x0>; + status = "okay"; + linux,phandle = <0x2b>; + phandle = <0x2b>; + }; +}; diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts new file mode 100644 index 0000000..4e58b1b --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts @@ -0,0 +1,937 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include +#include "imx6ull.dtsi" + +/ { + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 1000>; + brightness-levels = <0 1 2 3 4 5 6 8 10>; + default-brightness-level = <8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_can_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_ltemodule: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + reg_gpio_wifi: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + status = "disabled"; + + led0: cpu { + label = "cpu"; + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + + user2 { + label = "User2 Button"; + gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + }; + sound { + compatible = "fsl,imx6ul-evk-wm8960", + "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <&sai2>; + audio-codec = <&codec>; + asrc-controller = <&asrc>; + codec-master; + gpr = <&gpr 4 0x100000 0x100000>; + hp-det = <3 0>; + /*hp-det-gpios = <&gpio5 4 0>; + mic-det-gpios = <&gpio5 4 0>;*/ + audio-routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Ext Spk", "SPK_LP", + "Ext Spk", "SPK_LN", + "Ext Spk", "SPK_RP", + "Ext Spk", "SPK_RN", + "LINPUT2", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Main MIC", + "RINPUT2", "Main MIC", + "Mic Jack", "MICB", + "Main MIC", "MICB", + "CPU-Playback", "ASRC-Playback", + "Playback", "CPU-Playback", + "ASRC-Capture", "CPU-Capture", + "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + status = "okay"; + gpio-sck = <&gpio5 11 0>; + gpio-mosi = <&gpio5 10 0>; + cs-gpios = <&gpio5 7 0>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + gpio_spi: gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <1>; + registers-default = /bits/ 8 <0x57>; + spi-max-frequency = <10000>; + }; + }; + + sii902x_reset: sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + #reset-cells = <0>; + status = "okay"; + }; + +}; + +&gpmi{ + status = "disabled"; +}; +&cpu0 { + arm-supply = <®_arm>; + soc-supply = <®_soc>; +}; + +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0>; + }; + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <1>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; +&gpc { + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks IMX6UL_CLK_SAI2>; + clock-names = "mclk"; + wlf,shared-lrclk; + }; + sii902x: sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names="sii902x"; + pinctrl-0 = <&pinctrl_sii902x>; + resets = <&sii902x_reset>; + interrupt-parent = <&gpio1>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + mode_str ="1280x720M@60"; + bits-per-pixel = <16>; + reg = <0x39>; + status = "okay"; + }; + + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>; + /*pinctrl-1 = <&pinctrl_tsc_irq>;*/ + /*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input"; + pinctrl-0 = <&ts_int_default>; + pinctrl-1 = <&ts_int_output_low>; + pinctrl-2 = <&ts_int_output_high>; + pinctrl-3 = <&ts_int_input>; + */ + reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>; + irq-flags = <2>; /*1:rising 2: falling*/ + + touchscreen-max-id = <5>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-max-w = <1024>; + touchscreen-max-p = <1024>; + /*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/ + + goodix,type-a-report = <0>; + goodix,driver-send-cfg = <0>; + goodix,create-wr-node = <1>; + goodix,wakeup-with-reset = <0>; + goodix,resume-in-workqueue = <0>; + goodix,int-sync = <0>; + goodix,swap-x2y = <0>; + goodix,esd-protect = <0>; + goodix,pen-suppress-finger = <0>; + goodix,auto-update = <0>; + goodix,auto-update-cfg = <0>; + goodix,power-off-sleep = <0>; + + /*7*/ + goodix,cfg-group0 = [ + 6b 00 04 58 02 05 0d 00 01 0f + 28 0f 50 32 03 05 00 00 00 00 + 00 00 00 00 00 00 00 8a 2a 0c + 45 47 0c 08 00 00 00 40 03 2c + 00 01 00 00 00 03 64 32 00 00 + 00 28 64 94 d5 02 07 00 00 04 + 95 2c 00 8b 34 00 82 3f 00 7d + 4c 00 7a 5b 00 7a 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 18 16 14 12 10 0e 0c 0a + 08 06 04 02 ff ff 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 16 18 1c 1d 1e 1f 20 21 + 22 24 13 12 10 0f 0a 08 06 04 + 02 00 ff ff ff ff ff ff 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 79 01 + ]; + + /*4.3*/ + goodix,cfg-group1 = [ + 97 E0 01 10 01 05 0D 00 01 00 + 00 05 5A 46 53 11 00 00 11 11 + 14 14 14 22 0A 04 00 00 00 00 + 00 00 53 00 14 00 00 84 00 00 + 3C 00 00 64 1E 28 87 27 08 32 + 34 05 0D 20 33 60 11 02 24 00 + 00 64 80 80 14 02 00 00 54 89 + 68 85 6D 82 72 80 76 7D 7B 7B + 00 00 00 00 00 00 00 F0 50 3C + FF FF 07 00 00 00 02 14 14 03 + 04 00 21 64 0A 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 32 20 50 3C 3C 00 00 00 00 00 + 0D 06 0C 05 0B 04 0A 03 FF FF + FF FF FF FF 00 01 02 03 04 05 + 06 07 08 09 0A 0B 0C 0D FF FF + FF FF FF FF FF FF FF FF FF FF + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 3C 00 05 1E 00 02 + 2A 1E 19 14 02 00 03 0A 05 00 + 00 00 00 00 00 00 01 FF FF 86 + 22 03 00 00 33 00 0F 00 00 00 + 50 3C 50 00 00 00 00 2A 01 + ]; + + /*5*/ + goodix,cfg-group2 = [ + 00 20 03 E0 01 05 3C 00 01 08 + 28 0C 50 32 03 05 00 00 00 00 + 00 00 00 17 19 1E 14 8B 2B 0D + 33 35 0C 08 00 00 00 9A 03 11 + 00 01 00 00 00 00 00 32 00 00 + 00 20 58 94 C5 02 00 00 00 04 + B0 23 00 93 2B 00 7B 35 00 69 + 41 00 5B 4F 00 5B 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 02 04 06 08 0A 0C 0E 10 + 12 14 16 18 1A FF 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 02 04 06 08 0A 0C 0F + 10 12 13 16 18 1C 1D 1E 1F 20 + 21 22 24 26 FF FF FF FF 00 00 + 00 FF FF FF FF FF FF FF FF FF + FF FF FF FF 48 01 + ]; + + }; + + +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>; + imx6ul-evk { + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 /* USB OTG1 ID */ + // MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x000010B0 + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110A0 + >; + }; + pinctrl_sii902x: hdmigrp { + fsl,pins = < + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59 + >; + }; + pinctrl_touchscreen_int: lcdif_tsc_int { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0 + >; + }; + pinctrl_enet1: enet1grp { + fsl,pins = < + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x000010B0 + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x000010B0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_ecspi3: ecspi3 { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x000010B0 + MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x000010B0 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x000010B0 + //MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x000010B0 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x000010B0 + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x000010B0 + >; + }; + + pinctrl_ecspi1: ecspi1 { + fsl,pins = < + MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x000010B0 + MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x000010B0 + MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x000010B0 + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x000010B0 + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x000010B0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + >; + }; + + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2_8bit: usdhc2grp_8bit { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + pinctrl_lcdif_reset: lcdifresetgrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0 + >; + }; + + pinctrl_adc1: adc1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x000010B1 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x000010B1 + >; + }; + + }; +}; + +&iomuxc_snvs { + pinctrl-names = "default_snvs"; + pinctrl-0 = <&pinctrl_hog_2>; + imx6ul-evk { + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 /* enet1 reset */ + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0 /* enet2 reset */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110A0 /*key 1*/ + >; + }; + + pinctrl_tsc_reset: tscresetgrp { /*!< Function assigned for the core: Cortex-A7[ca7] */ + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x000110A0 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 + MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 + >; + }; + + pinctrl_leds: ledgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0 + >; + }; + + pinctrl_485_ctl: uart3_rs485 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 + >; + }; + + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl + &pinctrl_lcdif_reset>; + display = <&display0>; + status = "okay"; + reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 100ask */ + + display0: display { + bits-per-pixel = <24>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0_1024x768 { + clock-frequency = <50000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <160>; + hback-porch = <140>; + hsync-len = <20>; + vback-porch = <20>; + vfront-porch = <12>; + vsync-len = <3>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pxp { + status = "okay"; +}; +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + status = "okay"; + + + spidev: icm20608@0{ + compatible = "invensense,icm20608"; + interrupt-parent = <&gpio1>; + interrupts = <1 1>; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3 + &pinctrl_485_ctl>; + //pinctrl-0 = <&pinctrl_uart3>; + //fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>; + //rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + //rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <100 100>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + status = "okay"; +}; + + +&usbotg1 { + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphy1 { + tx-d-cal = <0x5>; +}; + +&usbphy2 { + tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_8bit>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + status = "okay"; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc1>; + num-channels = <5>; + vref-supply = <®_can_3v3>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + /* + spidev0: spi@0 { + compatible = "rohm,dh2228fv"; + reg = <0>; + spi-max-frequency = <5000000>; + }; + + spidev1: spi@1 { + compatible = "rohm,dh2228fv"; + reg = <1>; + spi-max-frequency = <5000000>; + }; + */ + +}; + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile new file mode 100644 index 0000000..ff7f97f --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile @@ -0,0 +1,12 @@ + +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +obj-m += led_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c new file mode 100644 index 0000000..1708a67 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c @@ -0,0 +1,198 @@ +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + + +#define LED_MAX_CNT 10 + +struct led_desc { + int pin; + int minor; +}; + +/* 1. 确定主设备号 */ +static int major = 0; +static struct class *led_class; + +static int g_ledcnt = 0; +static struct led_desc leds_desc[LED_MAX_CNT]; + + + +/* 3. 实现对应的open/read/write等函数，填入file_operations结构体 */ +static ssize_t led_drv_write (struct file *file, const char __user *buf, size_t size, loff_t *offset) +{ + int err; + char status; + struct inode *inode = file_inode(file); + int minor = iminor(inode); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + err = copy_from_user(&status, buf, 1); + + /* 根据次设备号和status控制LED */ + printk("set led pin 0x%x as %d\n", leds_desc[minor].pin, status); + + return 1; +} + +static int led_drv_open (struct inode *node, struct file *file) +{ + int minor = iminor(node); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* 根据次设备号初始化LED */ + printk("init led pin 0x%x as output\n", leds_desc[minor].pin); + + return 0; +} + + +/* 2. 定义自己的file_operations结构体 */ +static struct file_operations led_drv = { + .owner = THIS_MODULE, + .open = led_drv_open, + .write = led_drv_write, +}; + +/* B.1 实现platform_driver的probe函数 */ +static int led_probe(struct platform_device *pdev) +{ + int minor; + int i = 0; + const char *tmp_str; + + struct resource *res; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + if (!pdev->dev.of_node) /* 普通的platform_device */ + { + res = platform_get_resource(pdev, IORESOURCE_IRQ, i++); + if (!res) + return -EINVAL; + minor = g_ledcnt; + leds_desc[minor].pin = res->start; + } + else + { + of_property_read_string(pdev->dev.of_node, "pin", &tmp_str); + printk("pin = %s\n", tmp_str); + minor = g_ledcnt; + leds_desc[minor].pin = tmp_str[6] - '0'; + } + + /* 记录引脚 */ + leds_desc[minor].minor = minor; + + /* 7.2 辅助信息 */ + /* 创建设备节点 */ + device_create(led_class, NULL, MKDEV(major, minor), NULL, "100ask_led%d", minor); /* /dev/100ask_led0,1,... */ + + platform_set_drvdata(pdev, &leds_desc[minor]); + + g_ledcnt++; + + return 0; +} + +/* B.2 实现platform_driver的remove函数 */ +static int led_remove(struct platform_device *pdev) +{ + struct led_desc *led = platform_get_drvdata(pdev); + + device_destroy(led_class, MKDEV(major, led->minor)); /* /dev/100ask_led0,1,... */ + + return 0; +} + +static const struct platform_device_id led_id_table[] = { + {"100ask_led", 1}, + {"100ask_led_3", 2}, + {"100ask_led_4", 3}, + { }, +}; + +static const struct of_device_id dts_device_ids[] = { + { .compatible = "100ask,led", }, + {/* sentinel */} +}; + + +/* A. 实现platform_driver */ +static struct platform_driver led_driver = { + .probe = led_probe, + .remove = led_remove, + .driver = { + .name = "100ask_led", + .of_match_table = dts_device_ids, + }, + .id_table = led_id_table, +}; + + + +/* 4. 把file_operations结构体告诉内核：注册驱动程序register_chrdev */ +/* 5. 谁来注册驱动程序啊？得有一个入口函数：安装驱动程序时，就会去调用这个入口函数 */ +static int __init led_init(void) +{ + int err; + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + major = register_chrdev(0, "100ask_led", &led_drv); /* /dev/led */ + + + /* 7.1 辅助信息 */ + led_class = class_create(THIS_MODULE, "100ask_led_class"); + err = PTR_ERR(led_class); + if (IS_ERR(led_class)) { + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + unregister_chrdev(major, "led"); + return -1; + } + + /* C. 注册platform_driver */ + err = platform_driver_register(&led_driver); + + return err; +} + +/* 6. 有入口函数就应该有出口函数：卸载驱动程序时，就会去调用这个出口函数 */ +static void __exit led_exit(void) +{ + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* C. 反注册platform_driver */ + platform_driver_unregister(&led_driver); + + class_destroy(led_class); + unregister_chrdev(major, "100ask_led"); +} + + +/* 7. 其他完善：提供设备信息，自动创建设备节点 */ + +module_init(led_init); +module_exit(led_exit); + +MODULE_LICENSE("GPL"); + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c new file mode 100644 index 0000000..099eb11 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c @@ -0,0 +1,50 @@ + +#include +#include +#include +#include +#include +#include + +/* + * ./ledtest /dev/100ask_led0 on + * ./ledtest /dev/100ask_led0 off + */ +int main(int argc, char **argv) +{ + int fd; + char status; + + /* 1. 判断参数 */ + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + /* 2. 打开文件 */ + fd = open(argv[1], O_RDWR); + if (fd == -1) + { + printf("can not open file %s\n", argv[1]); + return -1; + } + + /* 3. 写文件 */ + if (0 == strcmp(argv[2], "on")) + { + status = 1; + write(fd, &status, 1); + } + else + { + status = 0; + write(fd, &status, 1); + } + + close(fd); + + return 0; +} + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md new file mode 100644 index 0000000..d5a4e52 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md @@ -0,0 +1,69 @@ +# SPI设备驱动开发1_OLED屏幕硬件操作 + + + +## 1. SPI总线设备驱动模型 + + + +![image-20220118192410328](pic/spi/01_spi_bus_dev_drv.png) + + + +## 2. 分析 + +![image-20220118204447939](pic/spi/02_device_tree_err.png) + + + +## 3. 调试DAC驱动 + +### 3.1 思路 + +使用逻辑分析仪：发现CS信号没有变化 + +查看内核调试信息：cat /sys/kernel/debug/gpio, 发现引脚为input： + +![image-20220122195532597](pic/spi/03_cs_gpio_input.png) + + + +在内核SPI控制器驱动中添加打印，发现GPIO 122确实被配置为output： + +```c +static int spi_imx_setup(struct spi_device *spi) +{ + int err; + + dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, + spi->mode, spi->bits_per_word, spi->max_speed_hz); + + if (gpio_is_valid(spi->cs_gpio)) + { + err = gpio_direction_output(spi->cs_gpio, + spi->mode & SPI_CS_HIGH ? 0 : 1); + + printk("%s %s %d, spi->cs_gpio = %d, gpio_direction_output, err = %d\n", __FILE__, __FUNCTION__, __LINE__, spi->cs_gpio, err); + } + + spi_imx_chipselect(spi, BITBANG_CS_INACTIVE); + + return 0; +} +``` + + + +怀疑： + +* 这个驱动的后续代码再次把GPIO配置成立input +* 其他驱动把GPIO也配置成了input：把spi-imx.ko最后手动加载，发现问题依旧，排除其他驱动的影响。 + + + +解决办法： + +![image-20220122202505579](pic/spi/04_fix_code.png) + + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif new file mode 100644 index 0000000..f534a48 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png new file mode 100644 index 0000000..b4c06ab Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png new file mode 100644 index 0000000..6155b72 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png new file mode 100644 index 0000000..544941e Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png new file mode 100644 index 0000000..ca92956 Binary files /dev/null and b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png differ diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c new file mode 100644 index 0000000..0ad17ba --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c new file mode 100644 index 0000000..8970a09 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct spi_device *oled_dev; + +static int major; +static struct class *oled_class; + +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + struct spi_message msg; + struct spi_transfer trans[3]; + + trans[0].tx_buf = buf0; + trans[0].len = len0; + + trans[1].rx_buf = buf1; + trans[1].len = len1; + + trans[2].tx_buf = buf2; + trans[2].rx_buf = buf3; + trans[2].len = len2; + + spi_message_init(&msg); + spi_message_add_tail(&trans[0], &msg); + spi_message_add_tail(&trans[1], &msg); + spi_message_add_tail(&trans[2], &msg); + + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts new file mode 100644 index 0000000..a0f85fa --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts @@ -0,0 +1,16 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + oled: oled { + compatible = "100ask,oled"; + reg = <0>; + spi-max-frequency = <1000000>; + dc-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; + }; + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c new file mode 100644 index 0000000..3e50b79 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c @@ -0,0 +1,231 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//为0 表示命令，为1表示数据 +#define OLED_CMD 0 +#define OLED_DATA 1 + +struct spi_device *oled_dev; +static struct gpio_desc *oled_dc; +static int major; +static struct class *oled_class; + +/********************************************************************** + * 函数名称： oled_write_cmd + * 功能描述： oled向特定地址写入数据或者命令 + * 输入参数：@uc_data :要写入的数据 + @uc_cmd:为1则表示写入数据，为0表示写入命令 + * 输出参数：无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/04 V1.0 芯晓 创建 + ***********************************************************************/ +static void oled_write_cmd_data(unsigned char uc_data,unsigned char uc_cmd) +{ + if(uc_cmd==0) + { + //*GPIO4_DR_s &= ~(1<<20);//拉低，表示写入指令 + gpiod_set_value(oled_dc, 0); + } + else + { + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + } + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, &uc_data, 1); +} + + +/********************************************************************** + * 函数名称： oled_init + * 功能描述： oled_init的初始化，包括SPI控制器得初始化 + * 输入参数：无 + * 输出参数： 初始化的结果 + * 返 回 值： 成功则返回0，否则返回-1 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static int oled_hardware_init(void) +{ + unsigned char uc_dev_id = 0; + + oled_write_cmd_data(0xae,OLED_CMD);//关闭显示 + + oled_write_cmd_data(0x00,OLED_CMD);//设置 lower column address + oled_write_cmd_data(0x10,OLED_CMD);//设置 higher column address + + oled_write_cmd_data(0x40,OLED_CMD);//设置 display start line + + oled_write_cmd_data(0xB0,OLED_CMD);//设置page address + + oled_write_cmd_data(0x81,OLED_CMD);// contract control + oled_write_cmd_data(0x66,OLED_CMD);//128 + + oled_write_cmd_data(0xa1,OLED_CMD);//设置 segment remap + + oled_write_cmd_data(0xa6,OLED_CMD);//normal /reverse + + oled_write_cmd_data(0xa8,OLED_CMD);//multiple ratio + oled_write_cmd_data(0x3f,OLED_CMD);//duty = 1/64 + + oled_write_cmd_data(0xc8,OLED_CMD);//com scan direction + + oled_write_cmd_data(0xd3,OLED_CMD);//set displat offset + oled_write_cmd_data(0x00,OLED_CMD);// + + oled_write_cmd_data(0xd5,OLED_CMD);//set osc division + oled_write_cmd_data(0x80,OLED_CMD);// + + oled_write_cmd_data(0xd9,OLED_CMD);//ser pre-charge period + oled_write_cmd_data(0x1f,OLED_CMD);// + + oled_write_cmd_data(0xda,OLED_CMD);//set com pins + oled_write_cmd_data(0x12,OLED_CMD);// + + oled_write_cmd_data(0xdb,OLED_CMD);//set vcomh + oled_write_cmd_data(0x30,OLED_CMD);// + + oled_write_cmd_data(0x8d,OLED_CMD);//set charge pump disable + oled_write_cmd_data(0x14,OLED_CMD);// + + oled_write_cmd_data(0xaf,OLED_CMD);//set dispkay on + + return 0; +} + +//坐标设置 +/********************************************************************** + * 函数名称： OLED_DIsp_Set_Pos + * 功能描述：设置要显示的位置 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Set_Pos(int x, int y) +{ oled_write_cmd_data(0xb0+y,OLED_CMD); + oled_write_cmd_data((x&0x0f),OLED_CMD); + oled_write_cmd_data(((x&0xf0)>>4)|0x10,OLED_CMD); +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Clear + * 功能描述： 整个屏幕显示数据清0 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static void OLED_DIsp_Clear(void) +{ + unsigned char x, y; + for (y = 0; y < 8; y++) + { + OLED_DIsp_Set_Pos(0, y); + for (x = 0; x < 128; x++) + oled_write_cmd_data((y < 4)? 0 : 0xff, OLED_DATA); /* 清零 */ + } +} + + +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + /* spi oled init */ + oled_dc = gpiod_get(&spi->dev, "dc", GPIOD_OUT_HIGH); + + oled_hardware_init(); + + OLED_DIsp_Clear(); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile new file mode 100644 index 0000000..185f06f --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + $(CROSS_COMPILE)gcc -o oled_test oled_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order oled_test + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h new file mode 100644 index 0000000..5698917 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h @@ -0,0 +1,106 @@ +#ifndef _FONT_H_ +#define _FONT_H_ +const unsigned char oled_asc2_8x16[95][16]= +{ + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},// 0 + {0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x30,0x00,0x00,0x00},//!1 + {0x00,0x10,0x0C,0x06,0x10,0x0C,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//"2 + {0x40,0xC0,0x78,0x40,0xC0,0x78,0x40,0x00,0x04,0x3F,0x04,0x04,0x3F,0x04,0x04,0x00},//#3 + {0x00,0x70,0x88,0xFC,0x08,0x30,0x00,0x00,0x00,0x18,0x20,0xFF,0x21,0x1E,0x00,0x00},//$4 + {0xF0,0x08,0xF0,0x00,0xE0,0x18,0x00,0x00,0x00,0x21,0x1C,0x03,0x1E,0x21,0x1E,0x00},//%5 + {0x00,0xF0,0x08,0x88,0x70,0x00,0x00,0x00,0x1E,0x21,0x23,0x24,0x19,0x27,0x21,0x10},//&6 + {0x10,0x16,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//'7 + {0x00,0x00,0x00,0xE0,0x18,0x04,0x02,0x00,0x00,0x00,0x00,0x07,0x18,0x20,0x40,0x00},//(8 + {0x00,0x02,0x04,0x18,0xE0,0x00,0x00,0x00,0x00,0x40,0x20,0x18,0x07,0x00,0x00,0x00},//)9 + {0x40,0x40,0x80,0xF0,0x80,0x40,0x40,0x00,0x02,0x02,0x01,0x0F,0x01,0x02,0x02,0x00},//*10 + {0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x1F,0x01,0x01,0x01,0x00},//+11 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xB0,0x70,0x00,0x00,0x00,0x00,0x00},//,12 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01},//-13 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x00},//.14 + {0x00,0x00,0x00,0x00,0x80,0x60,0x18,0x04,0x00,0x60,0x18,0x06,0x01,0x00,0x00,0x00},///15 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x0F,0x10,0x20,0x20,0x10,0x0F,0x00},//016 + {0x00,0x10,0x10,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//117 + {0x00,0x70,0x08,0x08,0x08,0x88,0x70,0x00,0x00,0x30,0x28,0x24,0x22,0x21,0x30,0x00},//218 + {0x00,0x30,0x08,0x88,0x88,0x48,0x30,0x00,0x00,0x18,0x20,0x20,0x20,0x11,0x0E,0x00},//319 + {0x00,0x00,0xC0,0x20,0x10,0xF8,0x00,0x00,0x00,0x07,0x04,0x24,0x24,0x3F,0x24,0x00},//420 + {0x00,0xF8,0x08,0x88,0x88,0x08,0x08,0x00,0x00,0x19,0x21,0x20,0x20,0x11,0x0E,0x00},//521 + {0x00,0xE0,0x10,0x88,0x88,0x18,0x00,0x00,0x00,0x0F,0x11,0x20,0x20,0x11,0x0E,0x00},//622 + {0x00,0x38,0x08,0x08,0xC8,0x38,0x08,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00},//723 + {0x00,0x70,0x88,0x08,0x08,0x88,0x70,0x00,0x00,0x1C,0x22,0x21,0x21,0x22,0x1C,0x00},//824 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x00,0x31,0x22,0x22,0x11,0x0F,0x00},//925 + {0x00,0x00,0x00,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00},//:26 + {0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x00,0x00,0x00,0x00},//;27 + {0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x00},//<28 + {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x00},//=29 + {0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,0x20,0x10,0x08,0x04,0x02,0x01,0x00},//>30 + {0x00,0x70,0x48,0x08,0x08,0x08,0xF0,0x00,0x00,0x00,0x00,0x30,0x36,0x01,0x00,0x00},//?31 + {0xC0,0x30,0xC8,0x28,0xE8,0x10,0xE0,0x00,0x07,0x18,0x27,0x24,0x23,0x14,0x0B,0x00},//@32 + {0x00,0x00,0xC0,0x38,0xE0,0x00,0x00,0x00,0x20,0x3C,0x23,0x02,0x02,0x27,0x38,0x20},//A33 + {0x08,0xF8,0x88,0x88,0x88,0x70,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x11,0x0E,0x00},//B34 + {0xC0,0x30,0x08,0x08,0x08,0x08,0x38,0x00,0x07,0x18,0x20,0x20,0x20,0x10,0x08,0x00},//C35 + {0x08,0xF8,0x08,0x08,0x08,0x10,0xE0,0x00,0x20,0x3F,0x20,0x20,0x20,0x10,0x0F,0x00},//D36 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x20,0x23,0x20,0x18,0x00},//E37 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x00,0x03,0x00,0x00,0x00},//F38 + {0xC0,0x30,0x08,0x08,0x08,0x38,0x00,0x00,0x07,0x18,0x20,0x20,0x22,0x1E,0x02,0x00},//G39 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x20,0x3F,0x21,0x01,0x01,0x21,0x3F,0x20},//H40 + {0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//I41 + {0x00,0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00,0x00},//J42 + {0x08,0xF8,0x88,0xC0,0x28,0x18,0x08,0x00,0x20,0x3F,0x20,0x01,0x26,0x38,0x20,0x00},//K43 + {0x08,0xF8,0x08,0x00,0x00,0x00,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x20,0x30,0x00},//L44 + {0x08,0xF8,0xF8,0x00,0xF8,0xF8,0x08,0x00,0x20,0x3F,0x00,0x3F,0x00,0x3F,0x20,0x00},//M45 + {0x08,0xF8,0x30,0xC0,0x00,0x08,0xF8,0x08,0x20,0x3F,0x20,0x00,0x07,0x18,0x3F,0x00},//N46 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x10,0x20,0x20,0x20,0x10,0x0F,0x00},//O47 + {0x08,0xF8,0x08,0x08,0x08,0x08,0xF0,0x00,0x20,0x3F,0x21,0x01,0x01,0x01,0x00,0x00},//P48 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x18,0x24,0x24,0x38,0x50,0x4F,0x00},//Q49 + {0x08,0xF8,0x88,0x88,0x88,0x88,0x70,0x00,0x20,0x3F,0x20,0x00,0x03,0x0C,0x30,0x20},//R50 + {0x00,0x70,0x88,0x08,0x08,0x08,0x38,0x00,0x00,0x38,0x20,0x21,0x21,0x22,0x1C,0x00},//S51 + {0x18,0x08,0x08,0xF8,0x08,0x08,0x18,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//T52 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//U53 + {0x08,0x78,0x88,0x00,0x00,0xC8,0x38,0x08,0x00,0x00,0x07,0x38,0x0E,0x01,0x00,0x00},//V54 + {0xF8,0x08,0x00,0xF8,0x00,0x08,0xF8,0x00,0x03,0x3C,0x07,0x00,0x07,0x3C,0x03,0x00},//W55 + {0x08,0x18,0x68,0x80,0x80,0x68,0x18,0x08,0x20,0x30,0x2C,0x03,0x03,0x2C,0x30,0x20},//X56 + {0x08,0x38,0xC8,0x00,0xC8,0x38,0x08,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//Y57 + {0x10,0x08,0x08,0x08,0xC8,0x38,0x08,0x00,0x20,0x38,0x26,0x21,0x20,0x20,0x18,0x00},//Z58 + {0x00,0x00,0x00,0xFE,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x00},//[59 + {0x00,0x0C,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x06,0x38,0xC0,0x00},//\60 + {0x00,0x02,0x02,0x02,0xFE,0x00,0x00,0x00,0x00,0x40,0x40,0x40,0x7F,0x00,0x00,0x00},//]61 + {0x00,0x00,0x04,0x02,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//^62 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80},//_63 + {0x00,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//`64 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x19,0x24,0x22,0x22,0x22,0x3F,0x20},//a65 + {0x08,0xF8,0x00,0x80,0x80,0x00,0x00,0x00,0x00,0x3F,0x11,0x20,0x20,0x11,0x0E,0x00},//b66 + {0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x0E,0x11,0x20,0x20,0x20,0x11,0x00},//c67 + {0x00,0x00,0x00,0x80,0x80,0x88,0xF8,0x00,0x00,0x0E,0x11,0x20,0x20,0x10,0x3F,0x20},//d68 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x22,0x22,0x22,0x22,0x13,0x00},//e69 + {0x00,0x80,0x80,0xF0,0x88,0x88,0x88,0x18,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//f70 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x6B,0x94,0x94,0x94,0x93,0x60,0x00},//g71 + {0x08,0xF8,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//h72 + {0x00,0x80,0x98,0x98,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//i73 + {0x00,0x00,0x00,0x80,0x98,0x98,0x00,0x00,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00},//j74 + {0x08,0xF8,0x00,0x00,0x80,0x80,0x80,0x00,0x20,0x3F,0x24,0x02,0x2D,0x30,0x20,0x00},//k75 + {0x00,0x08,0x08,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//l76 + {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x20,0x3F,0x20,0x00,0x3F,0x20,0x00,0x3F},//m77 + {0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//n78 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//o79 + {0x80,0x80,0x00,0x80,0x80,0x00,0x00,0x00,0x80,0xFF,0xA1,0x20,0x20,0x11,0x0E,0x00},//p80 + {0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x0E,0x11,0x20,0x20,0xA0,0xFF,0x80},//q81 + {0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x20,0x20,0x3F,0x21,0x20,0x00,0x01,0x00},//r82 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x33,0x24,0x24,0x24,0x24,0x19,0x00},//s83 + {0x00,0x80,0x80,0xE0,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x1F,0x20,0x20,0x00,0x00},//t84 + {0x80,0x80,0x00,0x00,0x00,0x80,0x80,0x00,0x00,0x1F,0x20,0x20,0x20,0x10,0x3F,0x20},//u85 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x00,0x01,0x0E,0x30,0x08,0x06,0x01,0x00},//v86 + {0x80,0x80,0x00,0x80,0x00,0x80,0x80,0x80,0x0F,0x30,0x0C,0x03,0x0C,0x30,0x0F,0x00},//w87 + {0x00,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x31,0x2E,0x0E,0x31,0x20,0x00},//x88 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x80,0x81,0x8E,0x70,0x18,0x06,0x01,0x00},//y89 + {0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x21,0x30,0x2C,0x22,0x21,0x30,0x00},//z90 + {0x00,0x00,0x00,0x00,0x80,0x7C,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x3F,0x40,0x40},//{91 + {0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00},//|92 + {0x00,0x02,0x02,0x7C,0x80,0x00,0x00,0x00,0x00,0x40,0x40,0x3F,0x00,0x00,0x00,0x00},//}93 + {0x00,0x06,0x01,0x01,0x02,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//~94 +}; +const unsigned char hz_1616[][32]={ +{0x02,0x00,0x02,0x00,0xE2,0xFF,0x22,0x42,0x22,0x42,0x32,0x42,0x2A,0x42,0x26,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0xE2,0xFF,0x02,0x00,0x02,0x00,0x00,0x00},/*"百",0*/ +{0x00,0x00,0xF8,0xFF,0x01,0x00,0x02,0x00,0x00,0x00,0xE2,0x1F,0x22,0x08,0x22,0x08,0x22,0x08,0xE2,0x1F,0x02,0x00,0x02,0x40,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"问",1*/ +{0x00,0x00,0xFE,0xFF,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x0E,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x4E,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"网",2*/ +}; +#endif diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts new file mode 100644 index 0000000..a0f85fa --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts @@ -0,0 +1,16 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + oled: oled { + compatible = "100ask,oled"; + reg = <0>; + spi-max-frequency = <1000000>; + dc-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; + }; + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c new file mode 100644 index 0000000..ca0d42a --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c @@ -0,0 +1,290 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OLED_SET_XY 99 +#define OLED_SET_XY_WRITE_DATA 100 +#define OLED_SET_XY_WRITE_DATAS 101 +#define OLED_SET_DATAS 102 /* 102为低8位, 高16位用来表示长度 */ + +//为0 表示命令，为1表示数据 +#define OLED_CMD 0 +#define OLED_DATA 1 + +struct spi_device *oled_dev; +static struct gpio_desc *oled_dc; +static int major; +static struct class *oled_class; +static char data_buf[1024]; + +/********************************************************************** + * 函数名称： oled_write_cmd + * 功能描述： oled向特定地址写入数据或者命令 + * 输入参数：@uc_data :要写入的数据 + @uc_cmd:为1则表示写入数据，为0表示写入命令 + * 输出参数：无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/04 V1.0 芯晓 创建 + ***********************************************************************/ +static void oled_write_cmd_data(unsigned char uc_data,unsigned char uc_cmd) +{ + if(uc_cmd==0) + { + //*GPIO4_DR_s &= ~(1<<20);//拉低，表示写入指令 + gpiod_set_value(oled_dc, 0); + } + else + { + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + } + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, &uc_data, 1); +} + +static void oled_write_datas(unsigned char *buf, int len) +{ + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, buf, len); +} + + + +/********************************************************************** + * 函数名称： oled_init + * 功能描述： oled_init的初始化，包括SPI控制器得初始化 + * 输入参数：无 + * 输出参数： 初始化的结果 + * 返 回 值： 成功则返回0，否则返回-1 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static int oled_hardware_init(void) +{ + oled_write_cmd_data(0xae,OLED_CMD);//关闭显示 + + oled_write_cmd_data(0x00,OLED_CMD);//设置 lower column address + oled_write_cmd_data(0x10,OLED_CMD);//设置 higher column address + + oled_write_cmd_data(0x40,OLED_CMD);//设置 display start line + + oled_write_cmd_data(0xB0,OLED_CMD);//设置page address + + oled_write_cmd_data(0x81,OLED_CMD);// contract control + oled_write_cmd_data(0x66,OLED_CMD);//128 + + oled_write_cmd_data(0xa1,OLED_CMD);//设置 segment remap + + oled_write_cmd_data(0xa6,OLED_CMD);//normal /reverse + + oled_write_cmd_data(0xa8,OLED_CMD);//multiple ratio + oled_write_cmd_data(0x3f,OLED_CMD);//duty = 1/64 + + oled_write_cmd_data(0xc8,OLED_CMD);//com scan direction + + oled_write_cmd_data(0xd3,OLED_CMD);//set displat offset + oled_write_cmd_data(0x00,OLED_CMD);// + + oled_write_cmd_data(0xd5,OLED_CMD);//set osc division + oled_write_cmd_data(0x80,OLED_CMD);// + + oled_write_cmd_data(0xd9,OLED_CMD);//ser pre-charge period + oled_write_cmd_data(0x1f,OLED_CMD);// + + oled_write_cmd_data(0xda,OLED_CMD);//set com pins + oled_write_cmd_data(0x12,OLED_CMD);// + + oled_write_cmd_data(0xdb,OLED_CMD);//set vcomh + oled_write_cmd_data(0x30,OLED_CMD);// + + oled_write_cmd_data(0x8d,OLED_CMD);//set charge pump disable + oled_write_cmd_data(0x14,OLED_CMD);// + + oled_write_cmd_data(0xaf,OLED_CMD);//set dispkay on + + return 0; +} + +//坐标设置 +/********************************************************************** + * 函数名称： OLED_DIsp_Set_Pos + * 功能描述：设置要显示的位置 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Set_Pos(int x, int y) +{ oled_write_cmd_data(0xb0+y,OLED_CMD); + oled_write_cmd_data((x&0x0f),OLED_CMD); + oled_write_cmd_data(((x&0xf0)>>4)|0x10,OLED_CMD); +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Clear + * 功能描述： 整个屏幕显示数据清0 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static void OLED_DIsp_Clear(void) +{ + unsigned char x, y; + for (y = 0; y < 8; y++) + { + OLED_DIsp_Set_Pos(0, y); + for (x = 0; x < 128; x++) + oled_write_cmd_data(0, OLED_DATA); /* 清零 */ + } +} + + +/* cmd = OLED_SET_XY_WRITE_DATA, buf[0] = x, buf[1] = y, buf[2] = data + * cmd = OLED_SET_XY_WRITE_DATAS, buf[0] = x, buf[1] = y, buf[2] = len, buf[3...] = datas + */ +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + const void __user *from = (const void __user *)arg; + char param_buf[3]; + int size; + int err; + + + switch (cmd & 0xff) + { + case OLED_SET_XY: + { + err = copy_from_user(param_buf, from, 2); + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + break; + } + case OLED_SET_XY_WRITE_DATA: + { + err = copy_from_user(param_buf, from, 3); + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + oled_write_cmd_data(param_buf[2], OLED_DATA); + break; + } + + case OLED_SET_XY_WRITE_DATAS: + { + err = copy_from_user(param_buf, from, 3); + size = param_buf[2]; + err = copy_from_user(data_buf, from+3, size); + + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + oled_write_datas(data_buf, size); + + break; + } + + case OLED_SET_DATAS: + { + size = cmd >> 8; + err = copy_from_user(data_buf, from, size); + oled_write_datas(data_buf, size); + break; + } + } + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + /* spi oled init */ + oled_dc = gpiod_get(&spi->dev, "dc", GPIOD_OUT_HIGH); + + oled_hardware_init(); + + OLED_DIsp_Clear(); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + gpiod_put(oled_dc); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c new file mode 100644 index 0000000..8d7388a --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c @@ -0,0 +1,186 @@ +#include +#include +#include +#include +#include +#include +#include "font.h" + +#define OLED_SET_XY 99 +#define OLED_SET_XY_WRITE_DATA 100 +#define OLED_SET_XY_WRITE_DATAS 101 +#define OLED_SET_DATAS 102 /* 102为低8位, 高16位用来表示长度 */ + +int fd; + +/********************************************************************** + * 函数名称： OLED_DIsp_Char + * 功能描述：在某个位置显示字符 1-9 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @c ：要显示的字符的ascii码 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 +***********************************************************************/ +void OLED_DIsp_Char(int x, int y, unsigned char c) +{ + int i = 0; + /* 得到字模 */ + const unsigned char *dots = oled_asc2_8x16[c - ' ']; + char pos[2]; +#if 0 + /* 发给OLED */ + OLED_DIsp_Set_Pos(x, y); + /* 发出8字节数据 */ + for (i = 0; i < 8; i++) + oled_write_cmd_data(dots[i], OLED_DATA); +#endif + pos[0] = x; + pos[1] = y; + + ioctl(fd, OLED_SET_XY, pos); + ioctl(fd, OLED_SET_DATAS | (8<<8), dots); + +#if 0 + OLED_DIsp_Set_Pos(x, y+1); + /* 发出8字节数据 */ + for (i = 0; i < 8; i++) + oled_write_cmd_data(dots[i+8], OLED_DATA); +#endif + pos[0] = x; + pos[1] = y+1; + + ioctl(fd, OLED_SET_XY, pos); + ioctl(fd, OLED_SET_DATAS | (8<<8), &dots[8]); + +} + + + +/********************************************************************** + * 函数名称： OLED_DIsp_String + * 功能描述： 在指定位置显示字符串 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @str ：要显示的字符串 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 +***********************************************************************/ +void OLED_DIsp_String(int x, int y, char *str) +{ + unsigned char j=0; + while (str[j]) + { + OLED_DIsp_Char(x, y, str[j]);//显示单个字符 + x += 8; + if(x > 127) + { + x = 0; + y += 2; + }//移动显示位置 + j++; + } +} + +/********************************************************************** + * 函数名称： OLED_DIsp_CHinese + * 功能描述：在指定位置显示汉字 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @chr ：要显示的汉字，三个汉字“百问网”中选择一个 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_CHinese(unsigned char x,unsigned char y,unsigned char no) +{ + unsigned char t, adder=0; + char pos[2]; + + pos[0] = x; + pos[1] = y; + + ioctl(fd, OLED_SET_XY, pos); + + for(t=0;t<16;t++) + {//显示上半截字符 + //oled_write_cmd_data(hz_1616[no][t*2],OLED_DATA); + ioctl(fd, OLED_SET_DATAS | (1<<8), &hz_1616[no][t*2]); + + adder+=1; + } + + pos[0] = x; + pos[1] = y+1; + + ioctl(fd, OLED_SET_XY, pos); + + for(t=0;t<16;t++) + {//显示下半截字符 + //oled_write_cmd_data(hz_1616[no][t*2+1],OLED_DATA); + ioctl(fd, OLED_SET_DATAS | (1<<8), &hz_1616[no][t*2+1]); + + adder+=1; + } +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Test + * 功能描述： 整个屏幕显示测试 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Test(void) +{ + int i; + + OLED_DIsp_String(0, 0, "wiki.100ask.net"); + OLED_DIsp_String(0, 2, "book.100ask.net"); + OLED_DIsp_String(0, 4, "bbs.100ask.net"); + + for(i = 0; i < 3; i++) + { //显示汉字 百问网 + OLED_DIsp_CHinese(32+i*16, 6, i); + } +} + + +/* + * oled_test /dev/myoled + */ + +int main(int argc, char **argv) +{ + int buf[2]; + + if (argc != 2) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + fd = open(argv[1], O_RDWR); + if (fd < 0) + { + printf(" can not open %s\n", argv[1]); + return -1; + } + + OLED_DIsp_Test(); + + return 0; +} + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile new file mode 100644 index 0000000..bde0d9b --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + $(CROSS_COMPILE)gcc -o dac_test dac_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order dac_test + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += dac_drv.o + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts new file mode 100644 index 0000000..039c2bf --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts @@ -0,0 +1,15 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + dac: dac { + compatible = "100ask,dac"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c new file mode 100644 index 0000000..256117f --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c @@ -0,0 +1,116 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +struct spi_device *dac_dev; +static int major; +static struct class *dac_class; + +static ssize_t dac_write(struct file *file, const char __user *buf, size_t size, loff_t * offset) +{ + unsigned short val = 0; + unsigned char ker_buf[4]; + int err; + + if (size != 2) + return -EINVAL; + + copy_from_user(&val, buf, 2); + + //val = 0x554; + val <<= 2; + val = val & 0x0fff; /* DAC数据格式: 高4位、低2位为0 */ + + ker_buf[0] = val >> 8; + ker_buf[1] = val; + + err = spi_write(dac_dev, ker_buf, 2); + + //spi_write(dac_dev, &val, 2); + + //printk("dac_write err = %d, val = 0x%x, %d, ker_buf[0] = 0x%x, ker_buf[1] = 0x%x\n", err, val, val, ker_buf[0], ker_buf[1]); + + return 2; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations dac_fops = { + .owner = THIS_MODULE, + .write = dac_write, +}; + +static int dac_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + dac_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "dac", &dac_fops); + + /* class_create */ + dac_class = class_create(THIS_MODULE, "dac_class"); + + /* device_create */ + device_create(dac_class, NULL, MKDEV(major, 0), NULL, "mydac"); + + return 0; +} + +static int dac_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(dac_class, MKDEV(major, 0)); + class_destroy(dac_class); + unregister_chrdev(major, "dac"); + + return 0; +} + +//static const struct spi_device_id dac_spi_ids[] = { +// {"100ask,dac", }, +// {} +//}; + +static const struct of_device_id dac_of_match[] = { + {.compatible = "100ask,dac"}, + {} +}; + +static struct spi_driver dac_driver = { + .driver = { + .name = "dac", + .of_match_table = dac_of_match, + }, + .probe = dac_probe, + .remove = dac_remove, + //.id_table = dac_spi_ids, +}; + +int dac_init(void) +{ + return spi_register_driver(&dac_driver); +} + +static void dac_exit(void) +{ + spi_unregister_driver(&dac_driver); +} + +module_init(dac_init); +module_exit(dac_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c new file mode 100644 index 0000000..f74e56f --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c @@ -0,0 +1,43 @@ +#include +#include +#include +#include +#include +#include +#include + +/* + * dac_test /dev/mydac + */ + +int main(int argc, char **argv) +{ + int fd; + int buf[2]; + unsigned short dac_val = 0; + + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + fd = open(argv[1], O_RDWR); + if (fd < 0) + { + printf(" can not open %s\n", argv[1]); + return -1; + } + + dac_val = strtoul(argv[2], NULL, 0); + + //while (1) + { + write(fd, &dac_val, 2); + // dac_val += 50; + } + + return 0; +} + + diff --git a/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h new file mode 100644 index 0000000..5698917 --- /dev/null +++ b/IMX6ULL/source/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h @@ -0,0 +1,106 @@ +#ifndef _FONT_H_ +#define _FONT_H_ +const unsigned char oled_asc2_8x16[95][16]= +{ + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},// 0 + {0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x30,0x00,0x00,0x00},//!1 + {0x00,0x10,0x0C,0x06,0x10,0x0C,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//"2 + {0x40,0xC0,0x78,0x40,0xC0,0x78,0x40,0x00,0x04,0x3F,0x04,0x04,0x3F,0x04,0x04,0x00},//#3 + {0x00,0x70,0x88,0xFC,0x08,0x30,0x00,0x00,0x00,0x18,0x20,0xFF,0x21,0x1E,0x00,0x00},//$4 + {0xF0,0x08,0xF0,0x00,0xE0,0x18,0x00,0x00,0x00,0x21,0x1C,0x03,0x1E,0x21,0x1E,0x00},//%5 + {0x00,0xF0,0x08,0x88,0x70,0x00,0x00,0x00,0x1E,0x21,0x23,0x24,0x19,0x27,0x21,0x10},//&6 + {0x10,0x16,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//'7 + {0x00,0x00,0x00,0xE0,0x18,0x04,0x02,0x00,0x00,0x00,0x00,0x07,0x18,0x20,0x40,0x00},//(8 + {0x00,0x02,0x04,0x18,0xE0,0x00,0x00,0x00,0x00,0x40,0x20,0x18,0x07,0x00,0x00,0x00},//)9 + {0x40,0x40,0x80,0xF0,0x80,0x40,0x40,0x00,0x02,0x02,0x01,0x0F,0x01,0x02,0x02,0x00},//*10 + {0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x1F,0x01,0x01,0x01,0x00},//+11 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xB0,0x70,0x00,0x00,0x00,0x00,0x00},//,12 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01},//-13 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x00},//.14 + {0x00,0x00,0x00,0x00,0x80,0x60,0x18,0x04,0x00,0x60,0x18,0x06,0x01,0x00,0x00,0x00},///15 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x0F,0x10,0x20,0x20,0x10,0x0F,0x00},//016 + {0x00,0x10,0x10,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//117 + {0x00,0x70,0x08,0x08,0x08,0x88,0x70,0x00,0x00,0x30,0x28,0x24,0x22,0x21,0x30,0x00},//218 + {0x00,0x30,0x08,0x88,0x88,0x48,0x30,0x00,0x00,0x18,0x20,0x20,0x20,0x11,0x0E,0x00},//319 + {0x00,0x00,0xC0,0x20,0x10,0xF8,0x00,0x00,0x00,0x07,0x04,0x24,0x24,0x3F,0x24,0x00},//420 + {0x00,0xF8,0x08,0x88,0x88,0x08,0x08,0x00,0x00,0x19,0x21,0x20,0x20,0x11,0x0E,0x00},//521 + {0x00,0xE0,0x10,0x88,0x88,0x18,0x00,0x00,0x00,0x0F,0x11,0x20,0x20,0x11,0x0E,0x00},//622 + {0x00,0x38,0x08,0x08,0xC8,0x38,0x08,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00},//723 + {0x00,0x70,0x88,0x08,0x08,0x88,0x70,0x00,0x00,0x1C,0x22,0x21,0x21,0x22,0x1C,0x00},//824 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x00,0x31,0x22,0x22,0x11,0x0F,0x00},//925 + {0x00,0x00,0x00,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00},//:26 + {0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x00,0x00,0x00,0x00},//;27 + {0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x00},//<28 + {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x00},//=29 + {0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,0x20,0x10,0x08,0x04,0x02,0x01,0x00},//>30 + {0x00,0x70,0x48,0x08,0x08,0x08,0xF0,0x00,0x00,0x00,0x00,0x30,0x36,0x01,0x00,0x00},//?31 + {0xC0,0x30,0xC8,0x28,0xE8,0x10,0xE0,0x00,0x07,0x18,0x27,0x24,0x23,0x14,0x0B,0x00},//@32 + {0x00,0x00,0xC0,0x38,0xE0,0x00,0x00,0x00,0x20,0x3C,0x23,0x02,0x02,0x27,0x38,0x20},//A33 + {0x08,0xF8,0x88,0x88,0x88,0x70,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x11,0x0E,0x00},//B34 + {0xC0,0x30,0x08,0x08,0x08,0x08,0x38,0x00,0x07,0x18,0x20,0x20,0x20,0x10,0x08,0x00},//C35 + {0x08,0xF8,0x08,0x08,0x08,0x10,0xE0,0x00,0x20,0x3F,0x20,0x20,0x20,0x10,0x0F,0x00},//D36 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x20,0x23,0x20,0x18,0x00},//E37 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x00,0x03,0x00,0x00,0x00},//F38 + {0xC0,0x30,0x08,0x08,0x08,0x38,0x00,0x00,0x07,0x18,0x20,0x20,0x22,0x1E,0x02,0x00},//G39 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x20,0x3F,0x21,0x01,0x01,0x21,0x3F,0x20},//H40 + {0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//I41 + {0x00,0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00,0x00},//J42 + {0x08,0xF8,0x88,0xC0,0x28,0x18,0x08,0x00,0x20,0x3F,0x20,0x01,0x26,0x38,0x20,0x00},//K43 + {0x08,0xF8,0x08,0x00,0x00,0x00,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x20,0x30,0x00},//L44 + {0x08,0xF8,0xF8,0x00,0xF8,0xF8,0x08,0x00,0x20,0x3F,0x00,0x3F,0x00,0x3F,0x20,0x00},//M45 + {0x08,0xF8,0x30,0xC0,0x00,0x08,0xF8,0x08,0x20,0x3F,0x20,0x00,0x07,0x18,0x3F,0x00},//N46 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x10,0x20,0x20,0x20,0x10,0x0F,0x00},//O47 + {0x08,0xF8,0x08,0x08,0x08,0x08,0xF0,0x00,0x20,0x3F,0x21,0x01,0x01,0x01,0x00,0x00},//P48 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x18,0x24,0x24,0x38,0x50,0x4F,0x00},//Q49 + {0x08,0xF8,0x88,0x88,0x88,0x88,0x70,0x00,0x20,0x3F,0x20,0x00,0x03,0x0C,0x30,0x20},//R50 + {0x00,0x70,0x88,0x08,0x08,0x08,0x38,0x00,0x00,0x38,0x20,0x21,0x21,0x22,0x1C,0x00},//S51 + {0x18,0x08,0x08,0xF8,0x08,0x08,0x18,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//T52 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//U53 + {0x08,0x78,0x88,0x00,0x00,0xC8,0x38,0x08,0x00,0x00,0x07,0x38,0x0E,0x01,0x00,0x00},//V54 + {0xF8,0x08,0x00,0xF8,0x00,0x08,0xF8,0x00,0x03,0x3C,0x07,0x00,0x07,0x3C,0x03,0x00},//W55 + {0x08,0x18,0x68,0x80,0x80,0x68,0x18,0x08,0x20,0x30,0x2C,0x03,0x03,0x2C,0x30,0x20},//X56 + {0x08,0x38,0xC8,0x00,0xC8,0x38,0x08,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//Y57 + {0x10,0x08,0x08,0x08,0xC8,0x38,0x08,0x00,0x20,0x38,0x26,0x21,0x20,0x20,0x18,0x00},//Z58 + {0x00,0x00,0x00,0xFE,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x00},//[59 + {0x00,0x0C,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x06,0x38,0xC0,0x00},//\60 + {0x00,0x02,0x02,0x02,0xFE,0x00,0x00,0x00,0x00,0x40,0x40,0x40,0x7F,0x00,0x00,0x00},//]61 + {0x00,0x00,0x04,0x02,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//^62 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80},//_63 + {0x00,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//`64 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x19,0x24,0x22,0x22,0x22,0x3F,0x20},//a65 + {0x08,0xF8,0x00,0x80,0x80,0x00,0x00,0x00,0x00,0x3F,0x11,0x20,0x20,0x11,0x0E,0x00},//b66 + {0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x0E,0x11,0x20,0x20,0x20,0x11,0x00},//c67 + {0x00,0x00,0x00,0x80,0x80,0x88,0xF8,0x00,0x00,0x0E,0x11,0x20,0x20,0x10,0x3F,0x20},//d68 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x22,0x22,0x22,0x22,0x13,0x00},//e69 + {0x00,0x80,0x80,0xF0,0x88,0x88,0x88,0x18,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//f70 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x6B,0x94,0x94,0x94,0x93,0x60,0x00},//g71 + {0x08,0xF8,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//h72 + {0x00,0x80,0x98,0x98,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//i73 + {0x00,0x00,0x00,0x80,0x98,0x98,0x00,0x00,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00},//j74 + {0x08,0xF8,0x00,0x00,0x80,0x80,0x80,0x00,0x20,0x3F,0x24,0x02,0x2D,0x30,0x20,0x00},//k75 + {0x00,0x08,0x08,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//l76 + {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x20,0x3F,0x20,0x00,0x3F,0x20,0x00,0x3F},//m77 + {0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//n78 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//o79 + {0x80,0x80,0x00,0x80,0x80,0x00,0x00,0x00,0x80,0xFF,0xA1,0x20,0x20,0x11,0x0E,0x00},//p80 + {0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x0E,0x11,0x20,0x20,0xA0,0xFF,0x80},//q81 + {0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x20,0x20,0x3F,0x21,0x20,0x00,0x01,0x00},//r82 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x33,0x24,0x24,0x24,0x24,0x19,0x00},//s83 + {0x00,0x80,0x80,0xE0,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x1F,0x20,0x20,0x00,0x00},//t84 + {0x80,0x80,0x00,0x00,0x00,0x80,0x80,0x00,0x00,0x1F,0x20,0x20,0x20,0x10,0x3F,0x20},//u85 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x00,0x01,0x0E,0x30,0x08,0x06,0x01,0x00},//v86 + {0x80,0x80,0x00,0x80,0x00,0x80,0x80,0x80,0x0F,0x30,0x0C,0x03,0x0C,0x30,0x0F,0x00},//w87 + {0x00,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x31,0x2E,0x0E,0x31,0x20,0x00},//x88 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x80,0x81,0x8E,0x70,0x18,0x06,0x01,0x00},//y89 + {0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x21,0x30,0x2C,0x22,0x21,0x30,0x00},//z90 + {0x00,0x00,0x00,0x00,0x80,0x7C,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x3F,0x40,0x40},//{91 + {0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00},//|92 + {0x00,0x02,0x02,0x7C,0x80,0x00,0x00,0x00,0x00,0x40,0x40,0x3F,0x00,0x00,0x00,0x00},//}93 + {0x00,0x06,0x01,0x01,0x02,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//~94 +}; +const unsigned char hz_1616[][32]={ +{0x02,0x00,0x02,0x00,0xE2,0xFF,0x22,0x42,0x22,0x42,0x32,0x42,0x2A,0x42,0x26,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0xE2,0xFF,0x02,0x00,0x02,0x00,0x00,0x00},/*"百",0*/ +{0x00,0x00,0xF8,0xFF,0x01,0x00,0x02,0x00,0x00,0x00,0xE2,0x1F,0x22,0x08,0x22,0x08,0x22,0x08,0xE2,0x1F,0x02,0x00,0x02,0x40,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"问",1*/ +{0x00,0x00,0xFE,0xFF,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x0E,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x4E,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"网",2*/ +}; +#endif diff --git a/README.md b/README.md index 45913aa..028f6af 100644 --- a/README.md +++ b/README.md @@ -491,8 +491,14 @@ git clone https://e.coding.net/weidongshan/linux/doc_and_source_for_drivers.git 01_SPI视频概述 02_SPI协议介绍 ``` - +* 2021.02.24 发布"SPI子系统"： + + ```shell + 03_SPI总线设备驱动模型 + ``` + + ## 6. 联系方式 @@ -509,3 +515,7 @@ git clone https://e.coding.net/weidongshan/linux/doc_and_source_for_drivers.git + +``` + +``` \ No newline at end of file diff --git a/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.md b/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.md new file mode 100644 index 0000000..cb6cf51 --- /dev/null +++ b/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.md @@ -0,0 +1,102 @@ +# SPI总线设备驱动模型 # + +参考资料： + +* 内核头文件：`include\linux\spi\spi.h` + +* 百问网驱动直播课里对应的源码 + * GIT仓库：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git + * 源码位置： + ![image-20220217163558763](pic/10_ref_code.png) + +* 上述源码也放到了驱动大全的GIT仓库里，位置如下： + ![image-20220224174405587](pic/16_ref_code.png) + + + +## 1. 回顾平台总线设备驱动模型 + +Linux驱动程序开始基于"平台总线设备驱动"模型，把驱动程序分成2边： + +* 左边注册一个platform_driver结构体，里面是比较固定的、通用的代码 + +* 右边注册一个platform_device结构体，里面是硬件资源 + + * 可以在C文件中注册platform_device + * 也可以使用设备树创建一个节点，内核解析设备树时注册platform_device + + + +![image-20220217150949592](pic/05_platform_bus_dev_drv.png) + + + +## 2. 数据结构 + +SPI子系统中涉及2类硬件：SPI控制器、SPI设备。 + +![](pic/01_hardware_block.jpg) + + + +SPI控制器有驱动程序，提供SPI的传输能力。 + +SPI设备也有自己的驱动程序，提供SPI设备的访问能力： + +* 它知道怎么访问这个设备，它知道这个设备的数据含义是什么 +* 它会调用SPI控制器的函数来收发数据。 + + + +### 2.1 SPI控制器数据结构 + +参考内核文件：`include\linux\spi\spi.h` + +Linux中使用spi_master结构体描述SPI控制器，里面最重要的成员就是`transfer`函数指针： + +![image-20220217152328571](pic/06_spi_master.png) + +### 2.2 SPI设备数据结构 + +参考内核文件：`include\linux\spi\spi.h` + +Linux中使用spi_device结构体描述SPI设备，里面记录有设备的片选引脚、频率、挂在哪个SPI控制器下面： + +![image-20220217154345923](pic/07_spi_device.png) + +### 2.3 SPI设备驱动 + +参考内核文件：`include\linux\spi\spi.h` + +Linux中使用spi_driver结构体描述SPI设备驱动： + +![image-20220217160607732](pic/08_spi_driver.png) + + + +## 3. SPI驱动框架 + +![image-20220217163316229](pic/09_spi_drv_frame.png) + + + +### 3.1 SPI控制器驱动程序 + +SPI控制器的驱动程序可以基于"平台总线设备驱动"模型来实现： + +* 在设备树里描述SPI控制器的硬件信息，在设备树子节点里描述挂在下面的SPI设备的信息 +* 在platform_driver中提供一个probe函数 + * 它会注册一个spi_master + * 还会解析设备树子节点，创建spi_device结构体 + + + +### 3.2 SPI设备驱动程序 + +跟"平台总线设备驱动模型"类似，Linux中也有一个"SPI总线设备驱动模型"： + +* 左边是spi_driver，使用C文件实现，里面有id_table表示能支持哪些SPI设备，有probe函数 +* 右边是spi_device，用来描述SPI设备，比如它的片选引脚、频率 + * 可以来自设备树：比如由SPI控制器驱动程序解析设备树后创建、注册spi_device + * 可以来自C文件：比如使用`spi_register_board_info`创建、注册spi_device + diff --git a/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif b/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif new file mode 100644 index 0000000..7310944 Binary files /dev/null and b/STM32MP157/doc_pic/11_SPI/03_SPI总线设备驱动模型.tif differ diff --git a/STM32MP157/doc_pic/11_SPI/04_SPI设备树处理过程.md b/STM32MP157/doc_pic/11_SPI/04_SPI设备树处理过程.md new file mode 100644 index 0000000..1b2c305 --- /dev/null +++ b/STM32MP157/doc_pic/11_SPI/04_SPI设备树处理过程.md @@ -0,0 +1,52 @@ +# SPI设备树处理过程 # + +参考资料： + +* 内核头文件：`include\linux\spi\spi.h` + + + +## 1. 设备树示例 + +在设备树里，会有一个节点用来表示SPI控制器。 + +在这个SPI控制器下面，连接有哪些SPI设备？会在设备树里使用子节点来描述SPI设备。 + +### 1.1 使用GPIO模拟的SPI控制器 + +![image-20220217181848873](pic/11_spi_master_device_tree.png) + + + + + +### 1.2 IMX6ULL SPI控制器 + +内核文件：arch/arm/boot/dts/imx6ull.dtsi + +![image-20220218101204976](pic/12_imx6ull_spi_master_dts.png) + +内核文件：arch/arm/boot/dts/100ask_imx6ull-14x14.dts + +![image-20220218103739627](pic/13_imx6ull_spi_dev_dts.png) + + + +### 1.3 STM32MP157 SPI控制器 + +内核文件：arch/arm/boot/dts/stm32mp151.dtsi + +![image-20220218104433011](pic/14_stm32mp157_spi_master_dts.png) + +内核文件：arch/arm/boot/dts/stm32mp157c-100ask-512d-lcd-v1.dts + +![image-20220218104519443](pic/15_stm32mp157_spi_dev_dts.png) + + + +## 2. 设备树处理过程 + + + + + diff --git a/STM32MP157/doc_pic/11_SPI/pic/05_platform_bus_dev_drv.png b/STM32MP157/doc_pic/11_SPI/pic/05_platform_bus_dev_drv.png new file mode 100644 index 0000000..9b45086 Binary files /dev/null and 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b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.md new file mode 100644 index 0000000..c319480 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.md @@ -0,0 +1,34 @@ +## 总线设备驱动模型彻底分析 + +Linux在线培训班的预习资料等，放在GIT仓库里。 + +GIT仓库地址：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git + +GIT使用说明：https://download.100ask.org/tools/Software/git/how_to_use_git.html + +**注意**：GIT仓库地址无法在浏览器中直接访问，必须使用GIT工具。 + + + +### 1. 预习视频 + +跟上次课的视频一样： + +![image-20211119234511274](pic/06_platform_detail/01_driver_video.png) + +![image-20211119234645373](pic/06_platform_detail/02_vides.png) + + + +### 2. 示例代码 + +代码在GIT仓库中： + +![image-20211123153247720](pic/06_platform_detail/03_source.png) + + + +### 3. 详细分析 + +详细分析led_dev.c, led_drv.c中的代码。 + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/doc_pic/06_总线设备驱动模型彻底分析.pdf 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0000000..61281a4 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/Makefile @@ -0,0 +1,17 @@ +ARCH=x86 +CROSS_COMPILE= + +KVERSION = $(shell uname -r) +KERN_DIR = /lib/modules/$(KVERSION)/build + +all: + make -C $(KERN_DIR) M=`pwd` modules + +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +obj-m += led_drv.o +obj-m += led_dev.o +obj-m += led_dev2.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c new file mode 100644 index 0000000..f0036db --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev.c @@ -0,0 +1,63 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(1), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c new file mode 100644 index 0000000..1e655c7 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev2.c @@ -0,0 +1,64 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(2), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led_second", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, + .driver_override = "100ask_led", +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c new file mode 100644 index 0000000..f890022 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_dev3.c @@ -0,0 +1,63 @@ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource resources[] = { + { + .start = (3<<8)|(3), + .flags = IORESOURCE_IRQ, + }, +}; + + +static void led_dev_release(struct device *dev) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); +} + + +static struct platform_device led_dev = { + .name = "100ask_led_3", + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .release = led_dev_release, + }, +}; + +static int __init led_dev_init(void) +{ + int err; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + err = platform_device_register(&led_dev); + + return err; +} + +static void __exit led_dev_exit(void) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + platform_device_unregister(&led_dev); +} + +module_init(led_dev_init); +module_exit(led_dev_exit); + +MODULE_LICENSE("GPL"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c new file mode 100644 index 0000000..8ee1628 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/led_drv.c @@ -0,0 +1,180 @@ +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +#define LED_MAX_CNT 10 + +struct led_desc { + int pin; + int minor; +}; + +/* 1. 确定主设备号 */ +static int major = 0; +static struct class *led_class; + +static int g_ledcnt = 0; +static struct led_desc leds_desc[LED_MAX_CNT]; + + + +/* 3. 实现对应的open/read/write等函数，填入file_operations结构体 */ +static ssize_t led_drv_write (struct file *file, const char __user *buf, size_t size, loff_t *offset) +{ + int err; + char status; + struct inode *inode = file_inode(file); + int minor = iminor(inode); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + err = copy_from_user(&status, buf, 1); + + /* 根据次设备号和status控制LED */ + printk("set led pin 0x%x as %d\n", leds_desc[minor].pin, status); + + return 1; +} + +static int led_drv_open (struct inode *node, struct file *file) +{ + int minor = iminor(node); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* 根据次设备号初始化LED */ + printk("init led pin 0x%x as output\n", leds_desc[minor].pin); + + return 0; +} + + +/* 2. 定义自己的file_operations结构体 */ +static struct file_operations led_drv = { + .owner = THIS_MODULE, + .open = led_drv_open, + .write = led_drv_write, +}; + +/* B.1 实现platform_driver的probe函数 */ +static int led_probe(struct platform_device *pdev) +{ + int minor; + int i = 0; + + struct resource *res; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + res = platform_get_resource(pdev, IORESOURCE_IRQ, i++); + if (!res) + return -EINVAL; + + /* 记录引脚 */ + minor = g_ledcnt; + leds_desc[minor].pin = res->start; + leds_desc[minor].minor = minor; + + /* 7.2 辅助信息 */ + /* 创建设备节点 */ + device_create(led_class, NULL, MKDEV(major, minor), NULL, "100ask_led%d", minor); /* /dev/100ask_led0,1,... */ + + platform_set_drvdata(pdev, &leds_desc[minor]); + + g_ledcnt++; + + return 0; +} + +/* B.2 实现platform_driver的remove函数 */ +static int led_remove(struct platform_device *pdev) +{ + struct led_desc *led = platform_get_drvdata(pdev); + + device_destroy(led_class, MKDEV(major, led->minor)); /* /dev/100ask_led0,1,... */ + + return 0; +} + +static const struct platform_device_id led_id_table[] = { + {"100ask_led", 1}, + {"100ask_led_3", 2}, + {"100ask_led_4", 3}, + { }, +}; + + +/* A. 实现platform_driver */ +static struct platform_driver led_driver = { + .probe = led_probe, + .remove = led_remove, + .driver = { + .name = "100ask_led", + }, + .id_table = led_id_table, +}; + + + +/* 4. 把file_operations结构体告诉内核：注册驱动程序register_chrdev */ +/* 5. 谁来注册驱动程序啊？得有一个入口函数：安装驱动程序时，就会去调用这个入口函数 */ +static int __init led_init(void) +{ + int err; + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + major = register_chrdev(0, "100ask_led", &led_drv); /* /dev/led */ + + + /* 7.1 辅助信息 */ + led_class = class_create(THIS_MODULE, "100ask_led_class"); + err = PTR_ERR(led_class); + if (IS_ERR(led_class)) { + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + unregister_chrdev(major, "led"); + return -1; + } + + /* C. 注册platform_driver */ + err = platform_driver_register(&led_driver); + + return err; +} + +/* 6. 有入口函数就应该有出口函数：卸载驱动程序时，就会去调用这个出口函数 */ +static void __exit led_exit(void) +{ + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* C. 反注册platform_driver */ + platform_driver_unregister(&led_driver); + + class_destroy(led_class); + unregister_chrdev(major, "100ask_led"); +} + + +/* 7. 其他完善：提供设备信息，自动创建设备节点 */ + +module_init(led_init); +module_exit(led_exit); + +MODULE_LICENSE("GPL"); + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c new file mode 100644 index 0000000..099eb11 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/06_总线设备驱动模型彻底分析/source/06_bus_dev_drv_detail/ledtest.c @@ -0,0 +1,50 @@ + +#include +#include +#include +#include +#include +#include + +/* + * ./ledtest /dev/100ask_led0 on + * ./ledtest /dev/100ask_led0 off + */ +int main(int argc, char **argv) +{ + int fd; + char status; + + /* 1. 判断参数 */ + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + /* 2. 打开文件 */ + fd = open(argv[1], O_RDWR); + if (fd == -1) + { + printf("can not open file %s\n", argv[1]); + return -1; + } + + /* 3. 写文件 */ + if (0 == strcmp(argv[2], "on")) + { + status = 1; + write(fd, &status, 1); + } + else + { + status = 0; + write(fd, &status, 1); + } + + close(fd); + + return 0; +} + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md new file mode 100644 index 0000000..5f6ea12 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.md @@ -0,0 +1,22 @@ +## 07_设备树入门 + +Linux在线培训班的预习资料等，放在GIT仓库里。 + +GIT仓库地址：https://e.coding.net/weidongshan/livestream/doc_and_source_for_livestream.git + +GIT使用说明：https://download.100ask.org/tools/Software/git/how_to_use_git.html + +**注意**：GIT仓库地址无法在浏览器中直接访问，必须使用GIT工具。 + + + +### 1. 预习视频 + +跟上次课的视频一样： + +![image-20211119234511274](pic/07_device_tree/01_driver_video.png) + +![image-20211125145343625](pic/07_device_tree/02_videos.png) + + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf new file mode 100644 index 0000000..f0365a1 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.pdf differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif new file mode 100644 index 0000000..effefd0 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/07_设备树入门.tif differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts new file mode 100644 index 0000000..fca4d1e --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/1.dts @@ -0,0 +1,1625 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + chosen { + stdout-path = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + }; + + aliases { + can0 = "/soc/aips-bus@02000000/can@02090000"; + can1 = "/soc/aips-bus@02000000/can@02094000"; + ethernet0 = "/soc/aips-bus@02100000/ethernet@02188000"; + ethernet1 = "/soc/aips-bus@02000000/ethernet@020b4000"; + gpio0 = "/soc/aips-bus@02000000/gpio@0209c000"; + gpio1 = "/soc/aips-bus@02000000/gpio@020a0000"; + gpio2 = "/soc/aips-bus@02000000/gpio@020a4000"; + gpio3 = "/soc/aips-bus@02000000/gpio@020a8000"; + gpio4 = "/soc/aips-bus@02000000/gpio@020ac000"; + i2c0 = "/soc/aips-bus@02100000/i2c@021a0000"; + i2c1 = "/soc/aips-bus@02100000/i2c@021a4000"; + i2c2 = "/soc/aips-bus@02100000/i2c@021a8000"; + i2c3 = "/soc/aips-bus@02100000/i2c@021f8000"; + mmc0 = "/soc/aips-bus@02100000/usdhc@02190000"; + mmc1 = "/soc/aips-bus@02100000/usdhc@02194000"; + serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + serial1 = "/soc/aips-bus@02100000/serial@021e8000"; + serial2 = "/soc/aips-bus@02100000/serial@021ec000"; + serial3 = "/soc/aips-bus@02100000/serial@021f0000"; + serial4 = "/soc/aips-bus@02100000/serial@021f4000"; + serial5 = "/soc/aips-bus@02100000/serial@021fc000"; + serial6 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000"; + serial7 = "/soc/aips-bus@02200000/serial@02288000"; + spi0 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02008000"; + spi1 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c000"; + spi2 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000"; + spi3 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000"; + usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000"; + usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + clock-latency = <0xee6c>; + operating-points = <0xdbba0 0x137478 0xc15c0 0x12b128 0x80e80 0x11edd8 0x60ae0 0xfa3e8 0x30570 0xe7ef0>; + fsl,soc-operating-points = <0xdbba0 0x11edd8 0xc15c0 0x11edd8 0x80e80 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>; + fsl,low-power-run; + clocks = <0x1 0x5d 0x1 0x1a 0x1 0x26 0x1 0xdb 0x1 0x38 0x1 0x39 0x1 0x19 0x1 0x12 0x1 0xb 0x1 0x4 0x1 0x3>; + clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc"; + arm-supply = <0x2>; + soc-supply = <0x3>; + }; + }; + + interrupt-controller@00a01000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <0x3>; + interrupt-controller; + reg = <0xa01000 0x1000 0xa02000 0x100>; + linux,phandle = <0x1e>; + phandle = <0x1e>; + }; + + clocks { + #address-cells = <0x1>; + #size-cells = <0x0>; + + clock@0 { + compatible = "fixed-clock"; + reg = <0x0>; + #clock-cells = <0x0>; + clock-frequency = <0x8000>; + clock-output-names = "ckil"; + linux,phandle = <0x16>; + phandle = <0x16>; + }; + + clock@1 { + compatible = "fixed-clock"; + reg = <0x1>; + #clock-cells = <0x0>; + clock-frequency = <0x16e3600>; + clock-output-names = "osc"; + linux,phandle = <0x17>; + phandle = <0x17>; + }; + + clock@2 { + compatible = "fixed-clock"; + reg = <0x2>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di0"; + linux,phandle = <0x18>; + phandle = <0x18>; + }; + + clock@3 { + compatible = "fixed-clock"; + reg = <0x3>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di1"; + linux,phandle = <0x19>; + phandle = <0x19>; + }; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "simple-bus"; + interrupt-parent = <0x4>; + ranges; + + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <0x1 0x26 0x1 0x35 0x1 0x1a 0x1 0x5d 0x1 0x1b 0x1 0x55 0x1 0x3c 0x1 0x5e 0x1 0x3e 0x1 0x3 0x1 0x60 0x1 0xd4 0x1 0x56 0x1 0x3d 0x1 0x5f 0x1 0x3f 0x1 0x38 0x1 0xa3 0x1 0x4 0x1 0x12 0x1 0x19 0x1 0x39 0x1 0xb>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; + fsl,max_ddr_freq = <0x17d78400>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <0x0 0x5e 0x4>; + status = "disabled"; + }; + + sram@00900000 { + compatible = "fsl,lpm-sram"; + reg = <0x900000 0x4000>; + }; + + sram@00904000 { + compatible = "fsl,ddr-lpm-sram"; + reg = <0x904000 0x1000>; + }; + + sram@00905000 { + compatible = "mmio-sram"; + reg = <0x905000 0x1b000>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x918000 0x8000>; + overw_reg = <0x5 0x905000 0x13000>; + }; + + dma-apbh@01804000 { + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x1804000 0x2000>; + interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <0x1>; + dma-channels = <0x4>; + clocks = <0x1 0x80>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + gpmi-nand@01806000 { + compatible = "fsl,imx6ull-gpmi-nand", "fsl, imx6ul-gpmi-nand"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1806000 0x2000 0x1808000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0x0 0xf 0x4>; + interrupt-names = "bch"; + clocks = <0x1 0x85 0x1 0x86 0x1 0x84 0x1 0x83 0x1 0xdc>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; + dmas = <0x6 0x0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + + aips-bus@02000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x100000>; + ranges; + + spba-bus@02000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x40000>; + ranges; + + spdif@02004000 { + compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif"; + reg = <0x2004000 0x4000>; + interrupts = <0x0 0x34 0x4>; + dmas = <0x7 0x29 0x12 0x0 0x7 0x2a 0x12 0x0>; + dma-names = "rx", "tx"; + clocks = <0x1 0xd5 0x1 0x3 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x64 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba"; + status = "disabled"; + }; + + ecspi@02008000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2008000 0x4000>; + interrupts = <0x0 0x1f 0x4>; + clocks = <0x1 0x8b 0x1 0x8b>; + clock-names = "ipg", "per"; + dmas = <0x7 0x3 0x7 0x1 0x7 0x4 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x8>; + fsl,spi-num-chipselects = <0x2>; + cs-gpios = <0x9 0x1a 0x1 0x9 0x18 0x1>; + }; + + ecspi@0200c000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x200c000 0x4000>; + interrupts = <0x0 0x20 0x4>; + clocks = <0x1 0x8c 0x1 0x8c>; + clock-names = "ipg", "per"; + dmas = <0x7 0x5 0x7 0x1 0x7 0x6 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi@02010000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2010000 0x4000>; + interrupts = <0x0 0x21 0x4>; + clocks = <0x1 0x8d 0x1 0x8d>; + clock-names = "ipg", "per"; + dmas = <0x7 0x7 0x7 0x1 0x7 0x8 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xa>; + cs-gpios = <0xb 0x14 0x1>; + + icm20608@0 { + compatible = "invensense,icm20608"; + interrupt-parent = <0xb>; + interrupts = <0x1 0x1>; + spi-max-frequency = <0x7a1200>; + reg = <0x0>; + }; + }; + + ecspi@02014000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2014000 0x4000>; + interrupts = <0x0 0x22 0x4>; + clocks = <0x1 0x8e 0x1 0x8e>; + clock-names = "ipg", "per"; + dmas = <0x7 0x9 0x7 0x1 0x7 0xa 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02018000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2018000 0x4000>; + interrupts = <0x0 0x27 0x4>; + clocks = <0x1 0xc9 0x1 0xca>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2b 0x4 0x0 0x7 0x2c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02020000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2020000 0x4000>; + interrupts = <0x0 0x1a 0x4>; + clocks = <0x1 0xbd 0x1 0xbe>; + clock-names = "ipg", "per"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xc>; + }; + + esai@02024000 { + compatible = "fsl,imx6ull-esai"; + reg = <0x2024000 0x4000>; + interrupts = <0x0 0x33 0x4>; + clocks = <0x1 0xe6 0x1 0xe5 0x1 0xe4 0x1 0xe6 0x1 0xbb>; + clock-names = "core", "mem", "extal", "fsys", "spba"; + dmas = <0x7 0x0 0x15 0x0 0x7 0x2f 0x15 0x0>; + dma-names = "rx", "tx"; + dma-source = <0xd 0x0 0xe 0x0 0xf>; + status = "disabled"; + }; + + sai@02028000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2028000 0x4000>; + interrupts = <0x0 0x61 0x4>; + clocks = <0x1 0xb3 0x1 0x0 0x1 0xb2 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x23 0x18 0x0 0x7 0x24 0x18 0x0>; + status = "disabled"; + }; + + sai@0202c000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x202c000 0x4000>; + interrupts = <0x0 0x62 0x4>; + clocks = <0x1 0xb5 0x1 0x0 0x1 0xb4 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x25 0x18 0x0 0x7 0x26 0x18 0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xe>; + assigned-clocks = <0x1 0x47 0x1 0xb4>; + assigned-clock-parents = <0x1 0x32>; + assigned-clock-rates = <0x0 0xbb8000>; + linux,phandle = <0x3a>; + phandle = <0x3a>; + }; + + sai@02030000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2030000 0x4000>; + interrupts = <0x0 0x18 0x4>; + clocks = <0x1 0xb7 0x1 0x0 0x1 0xb6 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x27 0x18 0x0 0x7 0x28 0x18 0x0>; + status = "disabled"; + }; + + asrc@02034000 { + compatible = "fsl,imx53-asrc"; + reg = <0x2034000 0x4000>; + interrupts = <0x0 0x32 0x4>; + clocks = <0x1 0x81 0x1 0x82 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas = <0x7 0x11 0x17 0x1 0x7 0x12 0x17 0x1 0x7 0x13 0x17 0x1 0x7 0x14 0x17 0x1 0x7 0x15 0x17 0x1 0x7 0x16 0x17 0x1>; + dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; + fsl,asrc-rate = <0xbb80>; + fsl,asrc-width = <0x10>; + status = "okay"; + linux,phandle = <0x3c>; + phandle = <0x3c>; + }; + }; + + tsc@02040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x2040000 0x4000 0x219c000 0x4000>; + interrupts = <0x0 0x3 0x4 0x0 0x65 0x4>; + clocks = <0x1 0x64 0x1 0x7c>; + clock-names = "tsc", "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xf>; + xnur-gpio = <0xb 0x3 0x1>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + }; + + pwm@02080000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2080000 0x4000>; + interrupts = <0x0 0x53 0x4>; + clocks = <0x1 0xa7 0x1 0xa7>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x10>; + status = "okay"; + linux,phandle = <0x38>; + phandle = <0x38>; + }; + + pwm@02084000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2084000 0x4000>; + interrupts = <0x0 0x54 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@02088000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2088000 0x4000>; + interrupts = <0x0 0x55 0x4>; + clocks = <0x1 0xa9 0x1 0xa9>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@0208c000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x208c000 0x4000>; + interrupts = <0x0 0x56 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + can@02090000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2090000 0x4000>; + interrupts = <0x0 0x6e 0x4>; + clocks = <0x1 0x94 0x1 0x95>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x1 0x10 0x11>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x11>; + xceiver-supply = <0x12>; + }; + + can@02094000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2094000 0x4000>; + interrupts = <0x0 0x6f 0x4>; + clocks = <0x1 0x96 0x1 0x97>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x2 0x10 0x12>; + status = "disabled"; + }; + + gpt@02098000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x2098000 0x4000>; + interrupts = <0x0 0x37 0x4>; + clocks = <0x1 0x98 0x1 0xd6>; + clock-names = "ipg", "osc_per"; + }; + + gpio@0209c000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x209c000 0x4000>; + interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + gpio@020a0000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a0000 0x4000>; + interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + }; + + gpio@020a4000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a4000 0x4000>; + interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x32>; + phandle = <0x32>; + }; + + gpio@020a8000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a8000 0x4000>; + interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + gpio@020ac000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20ac000 0x4000>; + interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x15>; + phandle = <0x15>; + }; + + snvs@020b0000 { + compatible = "fsl,imx6ul-snvs"; + reg = <0x20b0000 0x4000>; + interrupts = <0x0 0x4 0x4>; + }; + + ethernet@020b4000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x20b4000 0x4000>; + interrupts = <0x0 0x78 0x4 0x0 0x79 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2e 0x1 0x2e>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x4>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x13>; + phy-mode = "rmii"; + phy-handle = <0x14>; + phy-reset-gpios = <0x15 0x6 0x1>; + phy-reset-duration = <0x1a>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x0>; + linux,phandle = <0x24>; + phandle = <0x24>; + }; + + ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x1>; + linux,phandle = <0x14>; + phandle = <0x14>; + }; + }; + }; + + kpp@020b8000 { + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; + reg = <0x20b8000 0x4000>; + interrupts = <0x0 0x52 0x4>; + clocks = <0x1 0x0>; + status = "disabled"; + }; + + wdog@020bc000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20bc000 0x4000>; + interrupts = <0x0 0x50 0x4>; + clocks = <0x1 0xd0>; + status = "okay"; + }; + + wdog@020c0000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20c0000 0x4000>; + interrupts = <0x0 0x51 0x4>; + clocks = <0x1 0xd1>; + status = "disabled"; + }; + + ccm@020c4000 { + compatible = "fsl,imx6ul-ccm"; + reg = <0x20c4000 0x4000>; + interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>; + #clock-cells = <0x1>; + clocks = <0x16 0x17 0x18 0x19>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; + assigned-clocks = <0x1 0x32>; + assigned-clock-rates = <0x2ee00000>; + linux,phandle = <0x1>; + phandle = <0x1>; + }; + + anatop@020c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus"; + reg = <0x20c8000 0x1000>; + interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>; + linux,phandle = <0x1b>; + phandle = <0x1b>; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <0x280de8>; + regulator-max-microvolt = <0x33e140>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <0x8>; + anatop-vol-bit-width = <0x5>; + anatop-min-bit-val = <0x0>; + anatop-min-voltage = <0x280de8>; + anatop-max-voltage = <0x33e140>; + anatop-enable-bit = <0x0>; + linux,phandle = <0x1a>; + phandle = <0x1a>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x0>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x18>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x12>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x1c>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + }; + + usbphy@020c9000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20c9000 0x1000>; + interrupts = <0x0 0x2c 0x4>; + clocks = <0x1 0x20>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x20>; + phandle = <0x20>; + }; + + usbphy@020ca000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20ca000 0x1000>; + interrupts = <0x0 0x2d 0x4>; + clocks = <0x1 0x21>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x22>; + phandle = <0x22>; + }; + + tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupts = <0x0 0x31 0x4>; + fsl,tempmon = <0x1b>; + fsl,tempmon-data = <0x1c>; + clocks = <0x1 0x1b>; + }; + + snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + linux,phandle = <0x1d>; + phandle = <0x1d>; + + snvs-rtc-lp { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <0x1d>; + offset = <0x34>; + interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>; + }; + + snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <0x1d>; + offset = <0x38>; + mask = <0x61>; + }; + + snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <0x1d>; + interrupts = <0x0 0x4 0x4>; + linux,keycode = <0x74>; + wakeup-source; + }; + }; + + epit@020d0000 { + reg = <0x20d0000 0x4000>; + interrupts = <0x0 0x38 0x4>; + }; + + epit@020d4000 { + reg = <0x20d4000 0x4000>; + interrupts = <0x0 0x39 0x4>; + }; + + src@020d8000 { + compatible = "fsl,imx6ul-src", "fsl,imx51-src"; + reg = <0x20d8000 0x4000>; + interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>; + #reset-cells = <0x1>; + }; + + gpc@020dc000 { + compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; + reg = <0x20dc000 0x4000>; + interrupt-controller; + #interrupt-cells = <0x3>; + interrupts = <0x0 0x59 0x4>; + interrupt-parent = <0x1e>; + fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>; + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0x0>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + + iomuxc@020e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x20e0000 0x4000>; + pinctrl-names = "default"; + pinctrl-0 = <0x1f>; + + imx6ul-evk { + + hoggrp-1 { + fsl,pins = <0x90 0x31c 0x0 0x5 0x0 0x17059 0x5c 0x2e8 0x4b8 0x2 0x0 0x17059 0x1c 0x60 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x1f>; + phandle = <0x1f>; + }; + + hdmigrp { + fsl,pins = <0x8c 0x318 0x0 0x5 0x0 0x59>; + linux,phandle = <0x2a>; + phandle = <0x2a>; + }; + + lcdif_tsc_int { + fsl,pins = <0x70 0x2fc 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x2d>; + phandle = <0x2d>; + }; + + enet1grp { + fsl,pins; + linux,phandle = <0x23>; + phandle = <0x23>; + }; + + enet2grp { + fsl,pins = <0x74 0x300 0x580 0x1 0x0 0x1b0b0 0x78 0x304 0x0 0x1 0x0 0x1b0b0 0xec 0x378 0x0 0x0 0x0 0x1b0b0 0x100 0x38c 0x0 0x0 0x0 0x1b0b0 0xe4 0x370 0x0 0x0 0x0 0x1b0b0 0xe8 0x374 0x0 0x0 0x0 0x1b0b0 0xf8 0x384 0x0 0x0 0x0 0x1b0b0 0xf0 0x37c 0x0 0x0 0x0 0x1b0b0 0xf4 0x380 0x0 0x0 0x0 0x1b0b0 0xfc 0x388 0x57c 0x4 0x2 0x4001b031 0xcc 0x358 0x0 0x0 0x0 0x1b0b0 0xe0 0x36c 0x0 0x0 0x0 0x1b0b0 0xc4 0x350 0x0 0x0 0x0 0x1b0b0 0xc8 0x354 0x0 0x0 0x0 0x1b0b0 0xd8 0x364 0x0 0x0 0x0 0x1b0b0 0xd0 0x35c 0x0 0x0 0x0 0x1b0b0 0xd4 0x360 0x0 0x0 0x0 0x1b0b0 0xdc 0x368 0x574 0x4 0x2 0x4001b031>; + linux,phandle = <0x13>; + phandle = <0x13>; + }; + + flexcan1grp { + fsl,pins = <0xac 0x338 0x0 0x2 0x0 0x10b0 0xb0 0x33c 0x584 0x2 0x0 0x10b0>; + linux,phandle = <0x11>; + phandle = <0x11>; + }; + + i2c1grp { + fsl,pins = <0xb4 0x340 0x5a4 0x2 0x1 0x4001b8b0 0xb8 0x344 0x5a8 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x28>; + phandle = <0x28>; + }; + + i2c2grp { + fsl,pins = <0xbc 0x348 0x5ac 0x2 0x2 0x4001b8b0 0xc0 0x34c 0x5b0 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x29>; + phandle = <0x29>; + }; + + ecspi3 { + fsl,pins = <0x9c 0x328 0x55c 0x8 0x0 0x10b0 0xa0 0x32c 0x558 0x8 0x0 0x10b0 0x98 0x324 0x554 0x8 0x0 0x10b0 0x94 0x320 0x0 0x5 0x0 0x10b0 0x60 0x2ec 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + ecspi1 { + fsl,pins = <0x1f4 0x480 0x534 0x3 0x1 0x10b0 0x1fc 0x488 0x53c 0x3 0x1 0x10b0 0x200 0x48c 0x538 0x3 0x1 0x10b0 0x1f8 0x484 0x0 0x5 0x0 0x10b0 0x1f0 0x47c 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + uart3grp { + fsl,pins = <0xa4 0x330 0x0 0x0 0x0 0x1b0b1 0xa8 0x334 0x634 0x0 0x1 0x1b0b1>; + linux,phandle = <0x34>; + phandle = <0x34>; + }; + + uart1grp { + fsl,pins = <0x84 0x310 0x0 0x0 0x0 0x1b0b1 0x88 0x314 0x624 0x0 0x3 0x1b0b1>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + + uart6grp { + fsl,pins = <0x1d4 0x460 0x0 0x8 0x0 0x1b0b1 0x1d8 0x464 0x64c 0x8 0x3 0x1b0b1>; + linux,phandle = <0x36>; + phandle = <0x36>; + }; + + sai2grp { + fsl,pins = <0x50 0x2dc 0x5f8 0x2 0x0 0x17088 0x4c 0x2d8 0x5fc 0x2 0x0 0x17088 0x58 0x2e4 0x0 0x2 0x0 0x11088 0x54 0x2e0 0x5f4 0x2 0x0 0x11088 0x48 0x2d4 0x5f0 0x2 0x0 0x17088>; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + tscgrp { + fsl,pins = <0x60 0x2ec 0x0 0x5 0x0 0xb0 0x64 0x2f0 0x0 0x5 0x0 0xb0 0x68 0x2f4 0x0 0x5 0x0 0xb0 0x6c 0x2f8 0x0 0x5 0x0 0xb0>; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + usdhc1grp { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x17059 0x1c0 0x44c 0x0 0x0 0x0 0x10071 0x1c4 0x450 0x0 0x0 0x0 0x17059 0x1c8 0x454 0x0 0x0 0x0 0x17059 0x1cc 0x458 0x0 0x0 0x0 0x17059 0x1d0 0x45c 0x0 0x0 0x0 0x17059>; + linux,phandle = <0x25>; + phandle = <0x25>; + }; + + usdhc1grp100mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170b9 0x1c0 0x44c 0x0 0x0 0x0 0x100b9 0x1c4 0x450 0x0 0x0 0x0 0x170b9 0x1c8 0x454 0x0 0x0 0x0 0x170b9 0x1cc 0x458 0x0 0x0 0x0 0x170b9 0x1d0 0x45c 0x0 0x0 0x0 0x170b9>; + }; + + usdhc1grp200mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170f9 0x1c0 0x44c 0x0 0x0 0x0 0x100f9 0x1c4 0x450 0x0 0x0 0x0 0x170f9 0x1c8 0x454 0x0 0x0 0x0 0x170f9 0x1cc 0x458 0x0 0x0 0x0 0x170f9 0x1d0 0x45c 0x0 0x0 0x0 0x170f9>; + }; + + usdhc2grp { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059>; + }; + + usdhc2grp_8bit { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059 0x190 0x41c 0x68c 0x1 0x1 0x17059 0x194 0x420 0x690 0x1 0x1 0x17059 0x198 0x424 0x694 0x1 0x1 0x17059 0x19c 0x428 0x698 0x1 0x1 0x17059>; + linux,phandle = <0x26>; + phandle = <0x26>; + }; + + usdhc2grp_8bit_100mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100b9 0x17c 0x408 0x678 0x1 0x2 0x170b9 0x180 0x40c 0x67c 0x1 0x2 0x170b9 0x184 0x410 0x680 0x1 0x2 0x170b9 0x188 0x414 0x684 0x1 0x1 0x170b9 0x18c 0x418 0x688 0x1 0x2 0x170b9 0x190 0x41c 0x68c 0x1 0x1 0x170b9 0x194 0x420 0x690 0x1 0x1 0x170b9 0x198 0x424 0x694 0x1 0x1 0x170b9 0x19c 0x428 0x698 0x1 0x1 0x170b9>; + }; + + usdhc2grp_8bit_200mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100f9 0x17c 0x408 0x678 0x1 0x2 0x170f9 0x180 0x40c 0x67c 0x1 0x2 0x170f9 0x184 0x410 0x680 0x1 0x2 0x170f9 0x188 0x414 0x684 0x1 0x1 0x170f9 0x18c 0x418 0x688 0x1 0x2 0x170f9 0x190 0x41c 0x68c 0x1 0x1 0x170f9 0x194 0x420 0x690 0x1 0x1 0x170f9 0x198 0x424 0x694 0x1 0x1 0x170f9 0x19c 0x428 0x698 0x1 0x1 0x170f9>; + }; + + lcdifdatgrp { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79 0x158 0x3e4 0x0 0x0 0x0 0x79 0x15c 0x3e8 0x0 0x0 0x0 0x79 0x160 0x3ec 0x0 0x0 0x0 0x79 0x164 0x3f0 0x0 0x0 0x0 0x79 0x168 0x3f4 0x0 0x0 0x0 0x79 0x16c 0x3f8 0x0 0x0 0x0 0x79 0x170 0x3fc 0x0 0x0 0x0 0x79 0x174 0x400 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2e>; + phandle = <0x2e>; + }; + + lcdifdatgrp_16bits { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79>; + }; + + lcdifctrlgrp { + fsl,pins = <0x104 0x390 0x0 0x0 0x0 0x79 0x108 0x394 0x0 0x0 0x0 0x79 0x10c 0x398 0x5dc 0x0 0x0 0x79 0x110 0x39c 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2f>; + phandle = <0x2f>; + }; + + pwm1grp { + fsl,pins = <0x7c 0x308 0x0 0x0 0x0 0x110b0>; + linux,phandle = <0x10>; + phandle = <0x10>; + }; + + lcdifresetgrp { + fsl,pins = <0x114 0x3a0 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x30>; + phandle = <0x30>; + }; + + adc1grp { + fsl,pins = <0x68 0x2f4 0x0 0x5 0x0 0x10b1 0x6c 0x2f8 0x0 0x5 0x0 0x10b1>; + linux,phandle = <0x27>; + phandle = <0x27>; + }; + }; + }; + + iomuxc-gpr@020e4000 { + compatible = "fsl,imx6ul-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; + reg = <0x20e4000 0x4000>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + + mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <0xd>; + status = "disabled"; + }; + + gpt@020e8000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x20e8000 0x4000>; + interrupts = <0x0 0x6d 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + }; + + sdma@020ec000 { + compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; + reg = <0x20ec000 0x4000>; + interrupts = <0x0 0x2 0x4>; + clocks = <0x1 0xb8 0x1 0xb8>; + clock-names = "ipg", "ahb"; + #dma-cells = <0x3>; + iram = <0x5>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + pwm@020f0000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f0000 0x4000>; + interrupts = <0x0 0x72 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f4000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f4000 0x4000>; + interrupts = <0x0 0x73 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f8000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f8000 0x4000>; + interrupts = <0x0 0x74 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020fc000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20fc000 0x4000>; + interrupts = <0x0 0x75 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + }; + + aips-bus@02100000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2100000 0x100000>; + ranges; + + usb@02184000 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184000 0x200>; + interrupts = <0x0 0x2b 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x20>; + fsl,usbmisc = <0x21 0x0>; + fsl,anatop = <0x1b>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + }; + + usb@02184200 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184200 0x200>; + interrupts = <0x0 0x2a 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x22>; + fsl,usbmisc = <0x21 0x1>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "host"; + disable-over-current; + }; + + usbmisc@02184800 { + #index-cells = <0x1>; + compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; + reg = <0x2184800 0x200>; + linux,phandle = <0x21>; + phandle = <0x21>; + }; + + ethernet@02188000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x2188000 0x4000>; + interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2c 0x1 0x2c>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x3>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x23>; + phy-mode = "rmii"; + phy-handle = <0x24>; + phy-reset-gpios = <0x15 0x9 0x1>; + phy-reset-duration = <0x1a>; + }; + + usdhc@02190000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2190000 0x4000>; + interrupts = <0x0 0x16 0x4>; + clocks = <0x1 0xce 0x1 0xce 0x1 0xce>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x40 0x1 0xce>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x4>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x25>; + cd-gpios = <0xb 0x13 0x1>; + keep-power-in-suspend; + enable-sdio-wakeup; + }; + + usdhc@02194000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2194000 0x4000>; + interrupts = <0x0 0x17 0x4>; + clocks = <0x1 0xcf 0x1 0xcf 0x1 0xcf>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x41 0x1 0xcf>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x8>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x26>; + non-removable; + }; + + adc@02198000 { + compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; + reg = <0x2198000 0x4000>; + interrupts = <0x0 0x64 0x4>; + clocks = <0x1 0x7b>; + num-channels = <0x5>; + clock-names = "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x27>; + vref-supply = <0x12>; + }; + + i2c@021a0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a0000 0x4000>; + interrupts = <0x0 0x24 0x4>; + clocks = <0x1 0x9c>; + status = "okay"; + clock-frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x28>; + }; + + i2c@021a4000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a4000 0x4000>; + interrupts = <0x0 0x25 0x4>; + clocks = <0x1 0x9d>; + status = "okay"; + clock_frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x29>; + + wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <0x1 0xb4>; + clock-names = "mclk"; + wlf,shared-lrclk; + linux,phandle = <0x3b>; + phandle = <0x3b>; + }; + + sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names = "sii902x"; + pinctrl-0 = <0x2a>; + resets = <0x2b>; + interrupt-parent = <0xb>; + interrupts = <0x12 0x2>; + mode_str = "1280x720M@60"; + bits-per-pixel = <0x10>; + reg = <0x39>; + status = "okay"; + }; + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <0xb>; + interrupts = <0x5 0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x2c 0x2d>; + reset-gpios = <0x15 0x2 0x1>; + irq-gpios = <0xb 0x5 0x2>; + irq-flags = <0x2>; + touchscreen-max-id = <0x5>; + touchscreen-size-x = <0x320>; + touchscreen-size-y = <0x1e0>; + touchscreen-max-w = <0x400>; + touchscreen-max-p = <0x400>; + goodix,type-a-report = <0x0>; + goodix,driver-send-cfg = <0x0>; + goodix,create-wr-node = <0x1>; + goodix,wakeup-with-reset = <0x0>; + goodix,resume-in-workqueue = <0x0>; + goodix,int-sync = <0x0>; + goodix,swap-x2y = <0x0>; + goodix,esd-protect = <0x0>; + goodix,pen-suppress-finger = <0x0>; + goodix,auto-update = <0x0>; + goodix,auto-update-cfg = <0x0>; + goodix,power-off-sleep = <0x0>; + goodix,cfg-group0 = [6b 00 04 58 02 05 0d 00 01 0f 28 0f 50 32 03 05 00 00 00 00 00 00 00 00 00 00 00 8a 2a 0c 45 47 0c 08 00 00 00 40 03 2c 00 01 00 00 00 03 64 32 00 00 00 28 64 94 d5 02 07 00 00 04 95 2c 00 8b 34 00 82 3f 00 7d 4c 00 7a 5b 00 7a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 18 16 14 12 10 0e 0c 0a 08 06 04 02 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 18 1c 1d 1e 1f 20 21 22 24 13 12 10 0f 0a 08 06 04 02 00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 79 01]; + goodix,cfg-group1 = [97 e0 01 10 01 05 0d 00 01 00 00 05 5a 46 53 11 00 00 11 11 14 14 14 22 0a 04 00 00 00 00 00 00 53 00 14 00 00 84 00 00 3c 00 00 64 1e 28 87 27 08 32 34 05 0d 20 33 60 11 02 24 00 00 64 80 80 14 02 00 00 54 89 68 85 6d 82 72 80 76 7d 7b 7b 00 00 00 00 00 00 00 f0 50 3c ff ff 07 00 00 00 02 14 14 03 04 00 21 64 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 20 50 3c 3c 00 00 00 00 00 0d 06 0c 05 0b 04 0a 03 ff ff ff ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3c 00 05 1e 00 02 2a 1e 19 14 02 00 03 0a 05 00 00 00 00 00 00 00 01 ff ff 86 22 03 00 00 33 00 0f 00 00 00 50 3c 50 00 00 00 00 2a 01]; + goodix,cfg-group2 = [00 20 03 e0 01 05 3c 00 01 08 28 0c 50 32 03 05 00 00 00 00 00 00 00 17 19 1e 14 8b 2b 0d 33 35 0c 08 00 00 00 9a 03 11 00 01 00 00 00 00 00 32 00 00 00 20 58 94 c5 02 00 00 00 04 b0 23 00 93 2b 00 7b 35 00 69 41 00 5b 4f 00 5b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0f 10 12 13 16 18 1c 1d 1e 1f 20 21 22 24 26 ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff 48 01]; + }; + }; + + i2c@021a8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a8000 0x4000>; + interrupts = <0x0 0x26 0x4>; + clocks = <0x1 0x9e>; + status = "disabled"; + }; + + romcp@021ac000 { + compatible = "fsl,imx6ul-romcp", "syscon"; + reg = <0x21ac000 0x4000>; + }; + + mmdc@021b0000 { + compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; + reg = <0x21b0000 0x4000>; + }; + + weim@021b8000 { + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; + reg = <0x21b8000 0x4000>; + interrupts = <0x0 0xe 0x4>; + clocks = <0x1 0x0>; + }; + + ocotp-ctrl@021bc000 { + compatible = "fsl,imx6ull-ocotp", "syscon"; + reg = <0x21bc000 0x4000>; + clocks = <0x1 0xa5>; + linux,phandle = <0x1c>; + phandle = <0x1c>; + }; + + csu@021c0000 { + compatible = "fsl,imx6ul-csu"; + reg = <0x21c0000 0x4000>; + interrupts = <0x0 0x15 0x4>; + status = "disabled"; + }; + + csi@021c4000 { + compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi"; + reg = <0x21c4000 0x4000>; + interrupts = <0x0 0x7 0x4>; + clocks = <0x1 0x0 0x1 0x8a 0x1 0x0>; + clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + status = "disabled"; + }; + + lcdif@021c8000 { + compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; + reg = <0x21c8000 0x4000>; + interrupts = <0x0 0x5 0x4>; + clocks = <0x1 0xa2 0x1 0xa1 0x1 0x0>; + clock-names = "pix", "axi", "disp_axi"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x2e 0x2f 0x30>; + display = <0x31>; + reset-gpios = <0x32 0x4 0x1>; + + display { + bits-per-pixel = <0x18>; + bus-width = <0x18>; + linux,phandle = <0x31>; + phandle = <0x31>; + + display-timings { + native-mode = <0x33>; + + timing0_1024x768 { + clock-frequency = <0x2faf080>; + hactive = <0x400>; + vactive = <0x258>; + hfront-porch = <0xa0>; + hback-porch = <0x8c>; + hsync-len = <0x14>; + vback-porch = <0x14>; + vfront-porch = <0xc>; + vsync-len = <0x3>; + hsync-active = <0x0>; + vsync-active = <0x0>; + de-active = <0x1>; + pixelclk-active = <0x0>; + linux,phandle = <0x33>; + phandle = <0x33>; + }; + }; + }; + }; + + pxp@021cc000 { + compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma"; + reg = <0x21cc000 0x4000>; + interrupts = <0x0 0x8 0x4 0x0 0x12 0x4>; + clocks = <0x1 0x0 0x1 0xaf>; + clock-names = "pxp_ipg", "pxp_axi"; + status = "okay"; + }; + + qspi@021e0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; + reg = <0x21e0000 0x4000 0x60000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0x0 0x6b 0x4>; + clocks = <0x1 0xb0 0x1 0xb0>; + clock-names = "qspi_en", "qspi"; + status = "disabled"; + }; + + serial@021e8000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21e8000 0x4000>; + interrupts = <0x0 0x1b 0x4>; + clocks = <0x1 0xbf 0x1 0xc0>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1b 0x4 0x0 0x7 0x1c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021ec000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21ec000 0x4000>; + interrupts = <0x0 0x1c 0x4>; + clocks = <0x1 0xc1 0x1 0xc2>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1d 0x4 0x0 0x7 0x1e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x34 0x35>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <0x64 0x64>; + linux,rs485-enabled-at-boot-time; + }; + + serial@021f0000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f0000 0x4000>; + interrupts = <0x0 0x1d 0x4>; + clocks = <0x1 0xc3 0x1 0xc4>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1f 0x4 0x0 0x7 0x20 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021f4000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f4000 0x4000>; + interrupts = <0x0 0x1e 0x4>; + clocks = <0x1 0xc5 0x1 0xc6>; + clock-names = "ipg", "per"; + dmas = <0x7 0x21 0x4 0x0 0x7 0x22 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c@021f8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21f8000 0x4000>; + interrupts = <0x0 0x23 0x4>; + clocks = <0x1 0x9f>; + status = "disabled"; + }; + + serial@021fc000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21fc000 0x4000>; + interrupts = <0x0 0x11 0x4>; + clocks = <0x1 0xc7 0x1 0xc8>; + clock-names = "ipg", "per"; + dmas = <0x7 0x0 0x4 0x0 0x7 0x2f 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x36>; + }; + }; + + aips-bus@02200000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2200000 0x100000>; + ranges; + + dcp@02280000 { + compatible = "fsl,imx6sl-dcp"; + reg = <0x2280000 0x4000>; + interrupts = <0x0 0x2e 0x4 0x0 0x2f 0x4 0x0 0x30 0x4>; + clocks = <0x1 0xe7>; + clock-names = "dcp"; + }; + + rngb@02284000 { + compatible = "fsl,imx6sl-rng", "fsl,imx-rng", "imx-rng"; + reg = <0x2284000 0x4000>; + interrupts = <0x0 0x6 0x4>; + clocks = <0x1 0x0>; + }; + + serial@02288000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2288000 0x4000>; + interrupts = <0x0 0x28 0x4>; + clocks = <0x1 0xcb 0x1 0xcc>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2d 0x4 0x0 0x7 0x2e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + epdc@0228c000 { + compatible = "fsl,imx7d-epdc"; + interrupts = <0x0 0x70 0x4>; + reg = <0x228c000 0x4000>; + clocks = <0x1 0xeb 0x1 0xec>; + clock-names = "epdc_axi", "epdc_pix"; + status = "disabled"; + }; + + iomuxc-snvs@02290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x2290000 0x10000>; + pinctrl-names = "default_snvs"; + pinctrl-0 = <0x37>; + + imx6ul-evk { + + hoggrp-2 { + fsl,pins = <0x2c 0x70 0x0 0x5 0x0 0x1b0b0 0x20 0x64 0x0 0x5 0x0 0x1b0b0 0xc 0x50 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x37>; + phandle = <0x37>; + }; + + tscresetgrp { + fsl,pins = <0x10 0x54 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x2c>; + phandle = <0x2c>; + }; + + spi4grp { + fsl,pins = <0x0 0x44 0x0 0x5 0x0 0x70a1 0x4 0x48 0x0 0x5 0x0 0x70a1 0x24 0x68 0x0 0x5 0x0 0x70a1 0x28 0x6c 0x0 0x5 0x0 0x80000000>; + linux,phandle = <0x3d>; + phandle = <0x3d>; + }; + + ledgrp { + fsl,pins = <0x14 0x58 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x39>; + phandle = <0x39>; + }; + + uart3_rs485 { + fsl,pins = <0x8 0x4c 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x35>; + phandle = <0x35>; + }; + }; + }; + + snvs-gpr@0x02294000 { + compatible = "fsl, imx6ull-snvs-gpr"; + reg = <0x2294000 0x10000>; + }; + }; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <0x38 0x0 0x3e8>; + brightness-levels = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x8 0xa>; + default-brightness-level = <0x8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + regulator@0 { + compatible = "regulator-fixed"; + reg = <0x0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + linux,phandle = <0x12>; + phandle = <0x12>; + }; + + regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <0x39fbc0>; + regulator-max-microvolt = <0x39fbc0>; + gpios = <0x15 0x5 0x0>; + enable-active-high; + regulator-boot-on; + }; + + regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + gpios = <0xb 0xa 0x1>; + regulator-boot-on; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <0x39>; + status = "disabled"; + + cpu { + label = "cpu"; + gpios = <0x15 0x3 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <0x15 0x1 0x1>; + gpio-key,wakeup; + linux,code = <0x2>; + }; + + user2 { + label = "User2 Button"; + gpios = <0x9 0xe 0x1>; + gpio-key,wakeup; + linux,code = <0x3>; + }; + }; + + sound { + compatible = "fsl,imx6ul-evk-wm8960", "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <0x3a>; + audio-codec = <0x3b>; + asrc-controller = <0x3c>; + codec-master; + gpr = <0xd 0x4 0x100000 0x100000>; + hp-det = <0x3 0x0>; + audio-routing = "Headphone Jack", "HP_L", "Headphone Jack", "HP_R", "Ext Spk", "SPK_LP", "Ext Spk", "SPK_LN", "Ext Spk", "SPK_RP", "Ext Spk", "SPK_RN", "LINPUT2", "Mic Jack", "LINPUT3", "Mic Jack", "RINPUT1", "Main MIC", "RINPUT2", "Main MIC", "Mic Jack", "MICB", "Main MIC", "MICB", "CPU-Playback", "ASRC-Playback", "Playback", "CPU-Playback", "ASRC-Capture", "CPU-Capture", "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <0x3d>; + pinctrl-assert-gpios = <0x15 0x8 0x1>; + status = "okay"; + gpio-sck = <0x15 0xb 0x0>; + gpio-mosi = <0x15 0xa 0x0>; + cs-gpios = <0x15 0x7 0x0>; + num-chipselects = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <0x2>; + reg = <0x0>; + registers-number = <0x1>; + registers-default = [57]; + spi-max-frequency = <0x2710>; + linux,phandle = <0x3e>; + phandle = <0x3e>; + }; + }; + + sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <0x3e 0x1 0x1>; + reset-delay-us = <0x186a0>; + #reset-cells = <0x0>; + status = "okay"; + linux,phandle = <0x2b>; + phandle = <0x2b>; + }; +}; diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts new file mode 100644 index 0000000..4e58b1b --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/100ask_imx6ull-14x14.dts @@ -0,0 +1,937 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include +#include "imx6ull.dtsi" + +/ { + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 1000>; + brightness-levels = <0 1 2 3 4 5 6 8 10>; + default-brightness-level = <8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_can_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_ltemodule: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + reg_gpio_wifi: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + status = "disabled"; + + led0: cpu { + label = "cpu"; + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + + user2 { + label = "User2 Button"; + gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + }; + sound { + compatible = "fsl,imx6ul-evk-wm8960", + "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <&sai2>; + audio-codec = <&codec>; + asrc-controller = <&asrc>; + codec-master; + gpr = <&gpr 4 0x100000 0x100000>; + hp-det = <3 0>; + /*hp-det-gpios = <&gpio5 4 0>; + mic-det-gpios = <&gpio5 4 0>;*/ + audio-routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Ext Spk", "SPK_LP", + "Ext Spk", "SPK_LN", + "Ext Spk", "SPK_RP", + "Ext Spk", "SPK_RN", + "LINPUT2", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Main MIC", + "RINPUT2", "Main MIC", + "Mic Jack", "MICB", + "Main MIC", "MICB", + "CPU-Playback", "ASRC-Playback", + "Playback", "CPU-Playback", + "ASRC-Capture", "CPU-Capture", + "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + status = "okay"; + gpio-sck = <&gpio5 11 0>; + gpio-mosi = <&gpio5 10 0>; + cs-gpios = <&gpio5 7 0>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + gpio_spi: gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <1>; + registers-default = /bits/ 8 <0x57>; + spi-max-frequency = <10000>; + }; + }; + + sii902x_reset: sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + #reset-cells = <0>; + status = "okay"; + }; + +}; + +&gpmi{ + status = "disabled"; +}; +&cpu0 { + arm-supply = <®_arm>; + soc-supply = <®_soc>; +}; + +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0>; + }; + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <1>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; +&gpc { + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks IMX6UL_CLK_SAI2>; + clock-names = "mclk"; + wlf,shared-lrclk; + }; + sii902x: sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names="sii902x"; + pinctrl-0 = <&pinctrl_sii902x>; + resets = <&sii902x_reset>; + interrupt-parent = <&gpio1>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + mode_str ="1280x720M@60"; + bits-per-pixel = <16>; + reg = <0x39>; + status = "okay"; + }; + + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>; + /*pinctrl-1 = <&pinctrl_tsc_irq>;*/ + /*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input"; + pinctrl-0 = <&ts_int_default>; + pinctrl-1 = <&ts_int_output_low>; + pinctrl-2 = <&ts_int_output_high>; + pinctrl-3 = <&ts_int_input>; + */ + reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>; + irq-flags = <2>; /*1:rising 2: falling*/ + + touchscreen-max-id = <5>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-max-w = <1024>; + touchscreen-max-p = <1024>; + /*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/ + + goodix,type-a-report = <0>; + goodix,driver-send-cfg = <0>; + goodix,create-wr-node = <1>; + goodix,wakeup-with-reset = <0>; + goodix,resume-in-workqueue = <0>; + goodix,int-sync = <0>; + goodix,swap-x2y = <0>; + goodix,esd-protect = <0>; + goodix,pen-suppress-finger = <0>; + goodix,auto-update = <0>; + goodix,auto-update-cfg = <0>; + goodix,power-off-sleep = <0>; + + /*7*/ + goodix,cfg-group0 = [ + 6b 00 04 58 02 05 0d 00 01 0f + 28 0f 50 32 03 05 00 00 00 00 + 00 00 00 00 00 00 00 8a 2a 0c + 45 47 0c 08 00 00 00 40 03 2c + 00 01 00 00 00 03 64 32 00 00 + 00 28 64 94 d5 02 07 00 00 04 + 95 2c 00 8b 34 00 82 3f 00 7d + 4c 00 7a 5b 00 7a 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 18 16 14 12 10 0e 0c 0a + 08 06 04 02 ff ff 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 16 18 1c 1d 1e 1f 20 21 + 22 24 13 12 10 0f 0a 08 06 04 + 02 00 ff ff ff ff ff ff 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 79 01 + ]; + + /*4.3*/ + goodix,cfg-group1 = [ + 97 E0 01 10 01 05 0D 00 01 00 + 00 05 5A 46 53 11 00 00 11 11 + 14 14 14 22 0A 04 00 00 00 00 + 00 00 53 00 14 00 00 84 00 00 + 3C 00 00 64 1E 28 87 27 08 32 + 34 05 0D 20 33 60 11 02 24 00 + 00 64 80 80 14 02 00 00 54 89 + 68 85 6D 82 72 80 76 7D 7B 7B + 00 00 00 00 00 00 00 F0 50 3C + FF FF 07 00 00 00 02 14 14 03 + 04 00 21 64 0A 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 32 20 50 3C 3C 00 00 00 00 00 + 0D 06 0C 05 0B 04 0A 03 FF FF + FF FF FF FF 00 01 02 03 04 05 + 06 07 08 09 0A 0B 0C 0D FF FF + FF FF FF FF FF FF FF FF FF FF + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 3C 00 05 1E 00 02 + 2A 1E 19 14 02 00 03 0A 05 00 + 00 00 00 00 00 00 01 FF FF 86 + 22 03 00 00 33 00 0F 00 00 00 + 50 3C 50 00 00 00 00 2A 01 + ]; + + /*5*/ + goodix,cfg-group2 = [ + 00 20 03 E0 01 05 3C 00 01 08 + 28 0C 50 32 03 05 00 00 00 00 + 00 00 00 17 19 1E 14 8B 2B 0D + 33 35 0C 08 00 00 00 9A 03 11 + 00 01 00 00 00 00 00 32 00 00 + 00 20 58 94 C5 02 00 00 00 04 + B0 23 00 93 2B 00 7B 35 00 69 + 41 00 5B 4F 00 5B 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 02 04 06 08 0A 0C 0E 10 + 12 14 16 18 1A FF 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 02 04 06 08 0A 0C 0F + 10 12 13 16 18 1C 1D 1E 1F 20 + 21 22 24 26 FF FF FF FF 00 00 + 00 FF FF FF FF FF FF FF FF FF + FF FF FF FF 48 01 + ]; + + }; + + +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>; + imx6ul-evk { + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 /* USB OTG1 ID */ + // MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x000010B0 + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110A0 + >; + }; + pinctrl_sii902x: hdmigrp { + fsl,pins = < + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59 + >; + }; + pinctrl_touchscreen_int: lcdif_tsc_int { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0 + >; + }; + pinctrl_enet1: enet1grp { + fsl,pins = < + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x000010B0 + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x000010B0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_ecspi3: ecspi3 { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x000010B0 + MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x000010B0 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x000010B0 + //MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x000010B0 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x000010B0 + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x000010B0 + >; + }; + + pinctrl_ecspi1: ecspi1 { + fsl,pins = < + MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x000010B0 + MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x000010B0 + MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x000010B0 + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x000010B0 + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x000010B0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + >; + }; + + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2_8bit: usdhc2grp_8bit { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + pinctrl_lcdif_reset: lcdifresetgrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0 + >; + }; + + pinctrl_adc1: adc1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x000010B1 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x000010B1 + >; + }; + + }; +}; + +&iomuxc_snvs { + pinctrl-names = "default_snvs"; + pinctrl-0 = <&pinctrl_hog_2>; + imx6ul-evk { + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 /* enet1 reset */ + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0 /* enet2 reset */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110A0 /*key 1*/ + >; + }; + + pinctrl_tsc_reset: tscresetgrp { /*!< Function assigned for the core: Cortex-A7[ca7] */ + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x000110A0 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 + MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 + >; + }; + + pinctrl_leds: ledgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0 + >; + }; + + pinctrl_485_ctl: uart3_rs485 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 + >; + }; + + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl + &pinctrl_lcdif_reset>; + display = <&display0>; + status = "okay"; + reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 100ask */ + + display0: display { + bits-per-pixel = <24>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0_1024x768 { + clock-frequency = <50000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <160>; + hback-porch = <140>; + hsync-len = <20>; + vback-porch = <20>; + vfront-porch = <12>; + vsync-len = <3>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pxp { + status = "okay"; +}; +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + status = "okay"; + + + spidev: icm20608@0{ + compatible = "invensense,icm20608"; + interrupt-parent = <&gpio1>; + interrupts = <1 1>; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3 + &pinctrl_485_ctl>; + //pinctrl-0 = <&pinctrl_uart3>; + //fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>; + //rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + //rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <100 100>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + status = "okay"; +}; + + +&usbotg1 { + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphy1 { + tx-d-cal = <0x5>; +}; + +&usbphy2 { + tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_8bit>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + status = "okay"; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc1>; + num-channels = <5>; + vref-supply = <®_can_3v3>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + /* + spidev0: spi@0 { + compatible = "rohm,dh2228fv"; + reg = <0>; + spi-max-frequency = <5000000>; + }; + + spidev1: spi@1 { + compatible = "rohm,dh2228fv"; + reg = <1>; + spi-max-frequency = <5000000>; + }; + */ + +}; + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png new file mode 100644 index 0000000..92b5e0c Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/01_driver_video.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png new file mode 100644 index 0000000..27c19a9 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/doc_pic/pic/07_device_tree/02_videos.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts new file mode 100644 index 0000000..fca4d1e --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/1.dts @@ -0,0 +1,1625 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + chosen { + stdout-path = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + }; + + aliases { + can0 = "/soc/aips-bus@02000000/can@02090000"; + can1 = "/soc/aips-bus@02000000/can@02094000"; + ethernet0 = "/soc/aips-bus@02100000/ethernet@02188000"; + ethernet1 = "/soc/aips-bus@02000000/ethernet@020b4000"; + gpio0 = "/soc/aips-bus@02000000/gpio@0209c000"; + gpio1 = "/soc/aips-bus@02000000/gpio@020a0000"; + gpio2 = "/soc/aips-bus@02000000/gpio@020a4000"; + gpio3 = "/soc/aips-bus@02000000/gpio@020a8000"; + gpio4 = "/soc/aips-bus@02000000/gpio@020ac000"; + i2c0 = "/soc/aips-bus@02100000/i2c@021a0000"; + i2c1 = "/soc/aips-bus@02100000/i2c@021a4000"; + i2c2 = "/soc/aips-bus@02100000/i2c@021a8000"; + i2c3 = "/soc/aips-bus@02100000/i2c@021f8000"; + mmc0 = "/soc/aips-bus@02100000/usdhc@02190000"; + mmc1 = "/soc/aips-bus@02100000/usdhc@02194000"; + serial0 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"; + serial1 = "/soc/aips-bus@02100000/serial@021e8000"; + serial2 = "/soc/aips-bus@02100000/serial@021ec000"; + serial3 = "/soc/aips-bus@02100000/serial@021f0000"; + serial4 = "/soc/aips-bus@02100000/serial@021f4000"; + serial5 = "/soc/aips-bus@02100000/serial@021fc000"; + serial6 = "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000"; + serial7 = "/soc/aips-bus@02200000/serial@02288000"; + spi0 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02008000"; + spi1 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c000"; + spi2 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000"; + spi3 = "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000"; + usbphy0 = "/soc/aips-bus@02000000/usbphy@020c9000"; + usbphy1 = "/soc/aips-bus@02000000/usbphy@020ca000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + clock-latency = <0xee6c>; + operating-points = <0xdbba0 0x137478 0xc15c0 0x12b128 0x80e80 0x11edd8 0x60ae0 0xfa3e8 0x30570 0xe7ef0>; + fsl,soc-operating-points = <0xdbba0 0x11edd8 0xc15c0 0x11edd8 0x80e80 0x11edd8 0x60ae0 0x11edd8 0x30570 0x11edd8>; + fsl,low-power-run; + clocks = <0x1 0x5d 0x1 0x1a 0x1 0x26 0x1 0xdb 0x1 0x38 0x1 0x39 0x1 0x19 0x1 0x12 0x1 0xb 0x1 0x4 0x1 0x3>; + clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc"; + arm-supply = <0x2>; + soc-supply = <0x3>; + }; + }; + + interrupt-controller@00a01000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <0x3>; + interrupt-controller; + reg = <0xa01000 0x1000 0xa02000 0x100>; + linux,phandle = <0x1e>; + phandle = <0x1e>; + }; + + clocks { + #address-cells = <0x1>; + #size-cells = <0x0>; + + clock@0 { + compatible = "fixed-clock"; + reg = <0x0>; + #clock-cells = <0x0>; + clock-frequency = <0x8000>; + clock-output-names = "ckil"; + linux,phandle = <0x16>; + phandle = <0x16>; + }; + + clock@1 { + compatible = "fixed-clock"; + reg = <0x1>; + #clock-cells = <0x0>; + clock-frequency = <0x16e3600>; + clock-output-names = "osc"; + linux,phandle = <0x17>; + phandle = <0x17>; + }; + + clock@2 { + compatible = "fixed-clock"; + reg = <0x2>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di0"; + linux,phandle = <0x18>; + phandle = <0x18>; + }; + + clock@3 { + compatible = "fixed-clock"; + reg = <0x3>; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + clock-output-names = "ipp_di1"; + linux,phandle = <0x19>; + phandle = <0x19>; + }; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "simple-bus"; + interrupt-parent = <0x4>; + ranges; + + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <0x1 0x26 0x1 0x35 0x1 0x1a 0x1 0x5d 0x1 0x1b 0x1 0x55 0x1 0x3c 0x1 0x5e 0x1 0x3e 0x1 0x3 0x1 0x60 0x1 0xd4 0x1 0x56 0x1 0x3d 0x1 0x5f 0x1 0x3f 0x1 0x38 0x1 0xa3 0x1 0x4 0x1 0x12 0x1 0x19 0x1 0x39 0x1 0xb>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; + fsl,max_ddr_freq = <0x17d78400>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <0x0 0x5e 0x4>; + status = "disabled"; + }; + + sram@00900000 { + compatible = "fsl,lpm-sram"; + reg = <0x900000 0x4000>; + }; + + sram@00904000 { + compatible = "fsl,ddr-lpm-sram"; + reg = <0x904000 0x1000>; + }; + + sram@00905000 { + compatible = "mmio-sram"; + reg = <0x905000 0x1b000>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x918000 0x8000>; + overw_reg = <0x5 0x905000 0x13000>; + }; + + dma-apbh@01804000 { + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x1804000 0x2000>; + interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <0x1>; + dma-channels = <0x4>; + clocks = <0x1 0x80>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + gpmi-nand@01806000 { + compatible = "fsl,imx6ull-gpmi-nand", "fsl, imx6ul-gpmi-nand"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1806000 0x2000 0x1808000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0x0 0xf 0x4>; + interrupt-names = "bch"; + clocks = <0x1 0x85 0x1 0x86 0x1 0x84 0x1 0x83 0x1 0xdc>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; + dmas = <0x6 0x0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + + aips-bus@02000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x100000>; + ranges; + + spba-bus@02000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2000000 0x40000>; + ranges; + + spdif@02004000 { + compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif"; + reg = <0x2004000 0x4000>; + interrupts = <0x0 0x34 0x4>; + dmas = <0x7 0x29 0x12 0x0 0x7 0x2a 0x12 0x0>; + dma-names = "rx", "tx"; + clocks = <0x1 0xd5 0x1 0x3 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x64 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba"; + status = "disabled"; + }; + + ecspi@02008000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2008000 0x4000>; + interrupts = <0x0 0x1f 0x4>; + clocks = <0x1 0x8b 0x1 0x8b>; + clock-names = "ipg", "per"; + dmas = <0x7 0x3 0x7 0x1 0x7 0x4 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x8>; + fsl,spi-num-chipselects = <0x2>; + cs-gpios = <0x9 0x1a 0x1 0x9 0x18 0x1>; + }; + + ecspi@0200c000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x200c000 0x4000>; + interrupts = <0x0 0x20 0x4>; + clocks = <0x1 0x8c 0x1 0x8c>; + clock-names = "ipg", "per"; + dmas = <0x7 0x5 0x7 0x1 0x7 0x6 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi@02010000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2010000 0x4000>; + interrupts = <0x0 0x21 0x4>; + clocks = <0x1 0x8d 0x1 0x8d>; + clock-names = "ipg", "per"; + dmas = <0x7 0x7 0x7 0x1 0x7 0x8 0x7 0x2>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xa>; + cs-gpios = <0xb 0x14 0x1>; + + icm20608@0 { + compatible = "invensense,icm20608"; + interrupt-parent = <0xb>; + interrupts = <0x1 0x1>; + spi-max-frequency = <0x7a1200>; + reg = <0x0>; + }; + }; + + ecspi@02014000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + reg = <0x2014000 0x4000>; + interrupts = <0x0 0x22 0x4>; + clocks = <0x1 0x8e 0x1 0x8e>; + clock-names = "ipg", "per"; + dmas = <0x7 0x9 0x7 0x1 0x7 0xa 0x7 0x2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02018000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2018000 0x4000>; + interrupts = <0x0 0x27 0x4>; + clocks = <0x1 0xc9 0x1 0xca>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2b 0x4 0x0 0x7 0x2c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@02020000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2020000 0x4000>; + interrupts = <0x0 0x1a 0x4>; + clocks = <0x1 0xbd 0x1 0xbe>; + clock-names = "ipg", "per"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xc>; + }; + + esai@02024000 { + compatible = "fsl,imx6ull-esai"; + reg = <0x2024000 0x4000>; + interrupts = <0x0 0x33 0x4>; + clocks = <0x1 0xe6 0x1 0xe5 0x1 0xe4 0x1 0xe6 0x1 0xbb>; + clock-names = "core", "mem", "extal", "fsys", "spba"; + dmas = <0x7 0x0 0x15 0x0 0x7 0x2f 0x15 0x0>; + dma-names = "rx", "tx"; + dma-source = <0xd 0x0 0xe 0x0 0xf>; + status = "disabled"; + }; + + sai@02028000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2028000 0x4000>; + interrupts = <0x0 0x61 0x4>; + clocks = <0x1 0xb3 0x1 0x0 0x1 0xb2 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x23 0x18 0x0 0x7 0x24 0x18 0x0>; + status = "disabled"; + }; + + sai@0202c000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x202c000 0x4000>; + interrupts = <0x0 0x62 0x4>; + clocks = <0x1 0xb5 0x1 0x0 0x1 0xb4 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x25 0x18 0x0 0x7 0x26 0x18 0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xe>; + assigned-clocks = <0x1 0x47 0x1 0xb4>; + assigned-clock-parents = <0x1 0x32>; + assigned-clock-rates = <0x0 0xbb8000>; + linux,phandle = <0x3a>; + phandle = <0x3a>; + }; + + sai@02030000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x2030000 0x4000>; + interrupts = <0x0 0x18 0x4>; + clocks = <0x1 0xb7 0x1 0x0 0x1 0xb6 0x1 0x0 0x1 0x0>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <0x7 0x27 0x18 0x0 0x7 0x28 0x18 0x0>; + status = "disabled"; + }; + + asrc@02034000 { + compatible = "fsl,imx53-asrc"; + reg = <0x2034000 0x4000>; + interrupts = <0x0 0x32 0x4>; + clocks = <0x1 0x81 0x1 0x82 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0xbc 0x1 0x0 0x1 0x0 0x1 0xbb>; + clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas = <0x7 0x11 0x17 0x1 0x7 0x12 0x17 0x1 0x7 0x13 0x17 0x1 0x7 0x14 0x17 0x1 0x7 0x15 0x17 0x1 0x7 0x16 0x17 0x1>; + dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; + fsl,asrc-rate = <0xbb80>; + fsl,asrc-width = <0x10>; + status = "okay"; + linux,phandle = <0x3c>; + phandle = <0x3c>; + }; + }; + + tsc@02040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x2040000 0x4000 0x219c000 0x4000>; + interrupts = <0x0 0x3 0x4 0x0 0x65 0x4>; + clocks = <0x1 0x64 0x1 0x7c>; + clock-names = "tsc", "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0xf>; + xnur-gpio = <0xb 0x3 0x1>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + }; + + pwm@02080000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2080000 0x4000>; + interrupts = <0x0 0x53 0x4>; + clocks = <0x1 0xa7 0x1 0xa7>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x10>; + status = "okay"; + linux,phandle = <0x38>; + phandle = <0x38>; + }; + + pwm@02084000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2084000 0x4000>; + interrupts = <0x0 0x54 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@02088000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x2088000 0x4000>; + interrupts = <0x0 0x55 0x4>; + clocks = <0x1 0xa9 0x1 0xa9>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@0208c000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x208c000 0x4000>; + interrupts = <0x0 0x56 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + can@02090000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2090000 0x4000>; + interrupts = <0x0 0x6e 0x4>; + clocks = <0x1 0x94 0x1 0x95>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x1 0x10 0x11>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x11>; + xceiver-supply = <0x12>; + }; + + can@02094000 { + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; + reg = <0x2094000 0x4000>; + interrupts = <0x0 0x6f 0x4>; + clocks = <0x1 0x96 0x1 0x97>; + clock-names = "ipg", "per"; + stop-mode = <0xd 0x10 0x2 0x10 0x12>; + status = "disabled"; + }; + + gpt@02098000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x2098000 0x4000>; + interrupts = <0x0 0x37 0x4>; + clocks = <0x1 0x98 0x1 0xd6>; + clock-names = "ipg", "osc_per"; + }; + + gpio@0209c000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x209c000 0x4000>; + interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + gpio@020a0000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a0000 0x4000>; + interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + }; + + gpio@020a4000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a4000 0x4000>; + interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x32>; + phandle = <0x32>; + }; + + gpio@020a8000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20a8000 0x4000>; + interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + gpio@020ac000 { + compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; + reg = <0x20ac000 0x4000>; + interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + linux,phandle = <0x15>; + phandle = <0x15>; + }; + + snvs@020b0000 { + compatible = "fsl,imx6ul-snvs"; + reg = <0x20b0000 0x4000>; + interrupts = <0x0 0x4 0x4>; + }; + + ethernet@020b4000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x20b4000 0x4000>; + interrupts = <0x0 0x78 0x4 0x0 0x79 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2e 0x1 0x2e>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x4>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x13>; + phy-mode = "rmii"; + phy-handle = <0x14>; + phy-reset-gpios = <0x15 0x6 0x1>; + phy-reset-duration = <0x1a>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x0>; + linux,phandle = <0x24>; + phandle = <0x24>; + }; + + ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0x1>; + linux,phandle = <0x14>; + phandle = <0x14>; + }; + }; + }; + + kpp@020b8000 { + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; + reg = <0x20b8000 0x4000>; + interrupts = <0x0 0x52 0x4>; + clocks = <0x1 0x0>; + status = "disabled"; + }; + + wdog@020bc000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20bc000 0x4000>; + interrupts = <0x0 0x50 0x4>; + clocks = <0x1 0xd0>; + status = "okay"; + }; + + wdog@020c0000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x20c0000 0x4000>; + interrupts = <0x0 0x51 0x4>; + clocks = <0x1 0xd1>; + status = "disabled"; + }; + + ccm@020c4000 { + compatible = "fsl,imx6ul-ccm"; + reg = <0x20c4000 0x4000>; + interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>; + #clock-cells = <0x1>; + clocks = <0x16 0x17 0x18 0x19>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; + assigned-clocks = <0x1 0x32>; + assigned-clock-rates = <0x2ee00000>; + linux,phandle = <0x1>; + phandle = <0x1>; + }; + + anatop@020c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus"; + reg = <0x20c8000 0x1000>; + interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>; + linux,phandle = <0x1b>; + phandle = <0x1b>; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <0x280de8>; + regulator-max-microvolt = <0x33e140>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <0x8>; + anatop-vol-bit-width = <0x5>; + anatop-min-bit-val = <0x0>; + anatop-min-voltage = <0x280de8>; + anatop-max-voltage = <0x33e140>; + anatop-enable-bit = <0x0>; + linux,phandle = <0x1a>; + phandle = <0x1a>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x0>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x18>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <0xb1008>; + regulator-max-microvolt = <0x162010>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0x12>; + anatop-vol-bit-width = <0x5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <0x1c>; + anatop-delay-bit-width = <0x2>; + anatop-min-bit-val = <0x1>; + anatop-min-voltage = <0xb1008>; + anatop-max-voltage = <0x162010>; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + }; + + usbphy@020c9000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20c9000 0x1000>; + interrupts = <0x0 0x2c 0x4>; + clocks = <0x1 0x20>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x20>; + phandle = <0x20>; + }; + + usbphy@020ca000 { + compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x20ca000 0x1000>; + interrupts = <0x0 0x2d 0x4>; + clocks = <0x1 0x21>; + phy-3p0-supply = <0x1a>; + fsl,anatop = <0x1b>; + tx-d-cal = <0x5>; + linux,phandle = <0x22>; + phandle = <0x22>; + }; + + tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupts = <0x0 0x31 0x4>; + fsl,tempmon = <0x1b>; + fsl,tempmon-data = <0x1c>; + clocks = <0x1 0x1b>; + }; + + snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + linux,phandle = <0x1d>; + phandle = <0x1d>; + + snvs-rtc-lp { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <0x1d>; + offset = <0x34>; + interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>; + }; + + snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <0x1d>; + offset = <0x38>; + mask = <0x61>; + }; + + snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <0x1d>; + interrupts = <0x0 0x4 0x4>; + linux,keycode = <0x74>; + wakeup-source; + }; + }; + + epit@020d0000 { + reg = <0x20d0000 0x4000>; + interrupts = <0x0 0x38 0x4>; + }; + + epit@020d4000 { + reg = <0x20d4000 0x4000>; + interrupts = <0x0 0x39 0x4>; + }; + + src@020d8000 { + compatible = "fsl,imx6ul-src", "fsl,imx51-src"; + reg = <0x20d8000 0x4000>; + interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>; + #reset-cells = <0x1>; + }; + + gpc@020dc000 { + compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; + reg = <0x20dc000 0x4000>; + interrupt-controller; + #interrupt-cells = <0x3>; + interrupts = <0x0 0x59 0x4>; + interrupt-parent = <0x1e>; + fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>; + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0x0>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + + iomuxc@020e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x20e0000 0x4000>; + pinctrl-names = "default"; + pinctrl-0 = <0x1f>; + + imx6ul-evk { + + hoggrp-1 { + fsl,pins = <0x90 0x31c 0x0 0x5 0x0 0x17059 0x5c 0x2e8 0x4b8 0x2 0x0 0x17059 0x1c 0x60 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x1f>; + phandle = <0x1f>; + }; + + hdmigrp { + fsl,pins = <0x8c 0x318 0x0 0x5 0x0 0x59>; + linux,phandle = <0x2a>; + phandle = <0x2a>; + }; + + lcdif_tsc_int { + fsl,pins = <0x70 0x2fc 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x2d>; + phandle = <0x2d>; + }; + + enet1grp { + fsl,pins; + linux,phandle = <0x23>; + phandle = <0x23>; + }; + + enet2grp { + fsl,pins = <0x74 0x300 0x580 0x1 0x0 0x1b0b0 0x78 0x304 0x0 0x1 0x0 0x1b0b0 0xec 0x378 0x0 0x0 0x0 0x1b0b0 0x100 0x38c 0x0 0x0 0x0 0x1b0b0 0xe4 0x370 0x0 0x0 0x0 0x1b0b0 0xe8 0x374 0x0 0x0 0x0 0x1b0b0 0xf8 0x384 0x0 0x0 0x0 0x1b0b0 0xf0 0x37c 0x0 0x0 0x0 0x1b0b0 0xf4 0x380 0x0 0x0 0x0 0x1b0b0 0xfc 0x388 0x57c 0x4 0x2 0x4001b031 0xcc 0x358 0x0 0x0 0x0 0x1b0b0 0xe0 0x36c 0x0 0x0 0x0 0x1b0b0 0xc4 0x350 0x0 0x0 0x0 0x1b0b0 0xc8 0x354 0x0 0x0 0x0 0x1b0b0 0xd8 0x364 0x0 0x0 0x0 0x1b0b0 0xd0 0x35c 0x0 0x0 0x0 0x1b0b0 0xd4 0x360 0x0 0x0 0x0 0x1b0b0 0xdc 0x368 0x574 0x4 0x2 0x4001b031>; + linux,phandle = <0x13>; + phandle = <0x13>; + }; + + flexcan1grp { + fsl,pins = <0xac 0x338 0x0 0x2 0x0 0x10b0 0xb0 0x33c 0x584 0x2 0x0 0x10b0>; + linux,phandle = <0x11>; + phandle = <0x11>; + }; + + i2c1grp { + fsl,pins = <0xb4 0x340 0x5a4 0x2 0x1 0x4001b8b0 0xb8 0x344 0x5a8 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x28>; + phandle = <0x28>; + }; + + i2c2grp { + fsl,pins = <0xbc 0x348 0x5ac 0x2 0x2 0x4001b8b0 0xc0 0x34c 0x5b0 0x2 0x2 0x4001b8b0>; + linux,phandle = <0x29>; + phandle = <0x29>; + }; + + ecspi3 { + fsl,pins = <0x9c 0x328 0x55c 0x8 0x0 0x10b0 0xa0 0x32c 0x558 0x8 0x0 0x10b0 0x98 0x324 0x554 0x8 0x0 0x10b0 0x94 0x320 0x0 0x5 0x0 0x10b0 0x60 0x2ec 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + ecspi1 { + fsl,pins = <0x1f4 0x480 0x534 0x3 0x1 0x10b0 0x1fc 0x488 0x53c 0x3 0x1 0x10b0 0x200 0x48c 0x538 0x3 0x1 0x10b0 0x1f8 0x484 0x0 0x5 0x0 0x10b0 0x1f0 0x47c 0x0 0x5 0x0 0x10b0>; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + uart3grp { + fsl,pins = <0xa4 0x330 0x0 0x0 0x0 0x1b0b1 0xa8 0x334 0x634 0x0 0x1 0x1b0b1>; + linux,phandle = <0x34>; + phandle = <0x34>; + }; + + uart1grp { + fsl,pins = <0x84 0x310 0x0 0x0 0x0 0x1b0b1 0x88 0x314 0x624 0x0 0x3 0x1b0b1>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + + uart6grp { + fsl,pins = <0x1d4 0x460 0x0 0x8 0x0 0x1b0b1 0x1d8 0x464 0x64c 0x8 0x3 0x1b0b1>; + linux,phandle = <0x36>; + phandle = <0x36>; + }; + + sai2grp { + fsl,pins = <0x50 0x2dc 0x5f8 0x2 0x0 0x17088 0x4c 0x2d8 0x5fc 0x2 0x0 0x17088 0x58 0x2e4 0x0 0x2 0x0 0x11088 0x54 0x2e0 0x5f4 0x2 0x0 0x11088 0x48 0x2d4 0x5f0 0x2 0x0 0x17088>; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + tscgrp { + fsl,pins = <0x60 0x2ec 0x0 0x5 0x0 0xb0 0x64 0x2f0 0x0 0x5 0x0 0xb0 0x68 0x2f4 0x0 0x5 0x0 0xb0 0x6c 0x2f8 0x0 0x5 0x0 0xb0>; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + usdhc1grp { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x17059 0x1c0 0x44c 0x0 0x0 0x0 0x10071 0x1c4 0x450 0x0 0x0 0x0 0x17059 0x1c8 0x454 0x0 0x0 0x0 0x17059 0x1cc 0x458 0x0 0x0 0x0 0x17059 0x1d0 0x45c 0x0 0x0 0x0 0x17059>; + linux,phandle = <0x25>; + phandle = <0x25>; + }; + + usdhc1grp100mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170b9 0x1c0 0x44c 0x0 0x0 0x0 0x100b9 0x1c4 0x450 0x0 0x0 0x0 0x170b9 0x1c8 0x454 0x0 0x0 0x0 0x170b9 0x1cc 0x458 0x0 0x0 0x0 0x170b9 0x1d0 0x45c 0x0 0x0 0x0 0x170b9>; + }; + + usdhc1grp200mhz { + fsl,pins = <0x1bc 0x448 0x0 0x0 0x0 0x170f9 0x1c0 0x44c 0x0 0x0 0x0 0x100f9 0x1c4 0x450 0x0 0x0 0x0 0x170f9 0x1c8 0x454 0x0 0x0 0x0 0x170f9 0x1cc 0x458 0x0 0x0 0x0 0x170f9 0x1d0 0x45c 0x0 0x0 0x0 0x170f9>; + }; + + usdhc2grp { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059>; + }; + + usdhc2grp_8bit { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x10069 0x17c 0x408 0x678 0x1 0x2 0x17059 0x180 0x40c 0x67c 0x1 0x2 0x17059 0x184 0x410 0x680 0x1 0x2 0x17059 0x188 0x414 0x684 0x1 0x1 0x17059 0x18c 0x418 0x688 0x1 0x2 0x17059 0x190 0x41c 0x68c 0x1 0x1 0x17059 0x194 0x420 0x690 0x1 0x1 0x17059 0x198 0x424 0x694 0x1 0x1 0x17059 0x19c 0x428 0x698 0x1 0x1 0x17059>; + linux,phandle = <0x26>; + phandle = <0x26>; + }; + + usdhc2grp_8bit_100mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100b9 0x17c 0x408 0x678 0x1 0x2 0x170b9 0x180 0x40c 0x67c 0x1 0x2 0x170b9 0x184 0x410 0x680 0x1 0x2 0x170b9 0x188 0x414 0x684 0x1 0x1 0x170b9 0x18c 0x418 0x688 0x1 0x2 0x170b9 0x190 0x41c 0x68c 0x1 0x1 0x170b9 0x194 0x420 0x690 0x1 0x1 0x170b9 0x198 0x424 0x694 0x1 0x1 0x170b9 0x19c 0x428 0x698 0x1 0x1 0x170b9>; + }; + + usdhc2grp_8bit_200mhz { + fsl,pins = <0x178 0x404 0x670 0x1 0x2 0x100f9 0x17c 0x408 0x678 0x1 0x2 0x170f9 0x180 0x40c 0x67c 0x1 0x2 0x170f9 0x184 0x410 0x680 0x1 0x2 0x170f9 0x188 0x414 0x684 0x1 0x1 0x170f9 0x18c 0x418 0x688 0x1 0x2 0x170f9 0x190 0x41c 0x68c 0x1 0x1 0x170f9 0x194 0x420 0x690 0x1 0x1 0x170f9 0x198 0x424 0x694 0x1 0x1 0x170f9 0x19c 0x428 0x698 0x1 0x1 0x170f9>; + }; + + lcdifdatgrp { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79 0x158 0x3e4 0x0 0x0 0x0 0x79 0x15c 0x3e8 0x0 0x0 0x0 0x79 0x160 0x3ec 0x0 0x0 0x0 0x79 0x164 0x3f0 0x0 0x0 0x0 0x79 0x168 0x3f4 0x0 0x0 0x0 0x79 0x16c 0x3f8 0x0 0x0 0x0 0x79 0x170 0x3fc 0x0 0x0 0x0 0x79 0x174 0x400 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2e>; + phandle = <0x2e>; + }; + + lcdifdatgrp_16bits { + fsl,pins = <0x118 0x3a4 0x0 0x0 0x0 0x79 0x11c 0x3a8 0x0 0x0 0x0 0x79 0x120 0x3ac 0x0 0x0 0x0 0x79 0x124 0x3b0 0x0 0x0 0x0 0x79 0x128 0x3b4 0x0 0x0 0x0 0x79 0x12c 0x3b8 0x0 0x0 0x0 0x79 0x130 0x3bc 0x0 0x0 0x0 0x79 0x134 0x3c0 0x0 0x0 0x0 0x79 0x138 0x3c4 0x0 0x0 0x0 0x79 0x13c 0x3c8 0x0 0x0 0x0 0x79 0x140 0x3cc 0x0 0x0 0x0 0x79 0x144 0x3d0 0x0 0x0 0x0 0x79 0x148 0x3d4 0x0 0x0 0x0 0x79 0x14c 0x3d8 0x0 0x0 0x0 0x79 0x150 0x3dc 0x0 0x0 0x0 0x79 0x154 0x3e0 0x0 0x0 0x0 0x79>; + }; + + lcdifctrlgrp { + fsl,pins = <0x104 0x390 0x0 0x0 0x0 0x79 0x108 0x394 0x0 0x0 0x0 0x79 0x10c 0x398 0x5dc 0x0 0x0 0x79 0x110 0x39c 0x0 0x0 0x0 0x79>; + linux,phandle = <0x2f>; + phandle = <0x2f>; + }; + + pwm1grp { + fsl,pins = <0x7c 0x308 0x0 0x0 0x0 0x110b0>; + linux,phandle = <0x10>; + phandle = <0x10>; + }; + + lcdifresetgrp { + fsl,pins = <0x114 0x3a0 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x30>; + phandle = <0x30>; + }; + + adc1grp { + fsl,pins = <0x68 0x2f4 0x0 0x5 0x0 0x10b1 0x6c 0x2f8 0x0 0x5 0x0 0x10b1>; + linux,phandle = <0x27>; + phandle = <0x27>; + }; + }; + }; + + iomuxc-gpr@020e4000 { + compatible = "fsl,imx6ul-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; + reg = <0x20e4000 0x4000>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + + mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <0xd>; + status = "disabled"; + }; + + gpt@020e8000 { + compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; + reg = <0x20e8000 0x4000>; + interrupts = <0x0 0x6d 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + }; + + sdma@020ec000 { + compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; + reg = <0x20ec000 0x4000>; + interrupts = <0x0 0x2 0x4>; + clocks = <0x1 0xb8 0x1 0xb8>; + clock-names = "ipg", "ahb"; + #dma-cells = <0x3>; + iram = <0x5>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + pwm@020f0000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f0000 0x4000>; + interrupts = <0x0 0x72 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f4000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f4000 0x4000>; + interrupts = <0x0 0x73 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020f8000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20f8000 0x4000>; + interrupts = <0x0 0x74 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + + pwm@020fc000 { + compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; + reg = <0x20fc000 0x4000>; + interrupts = <0x0 0x75 0x4>; + clocks = <0x1 0x0 0x1 0x0>; + clock-names = "ipg", "per"; + #pwm-cells = <0x2>; + }; + }; + + aips-bus@02100000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2100000 0x100000>; + ranges; + + usb@02184000 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184000 0x200>; + interrupts = <0x0 0x2b 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x20>; + fsl,usbmisc = <0x21 0x0>; + fsl,anatop = <0x1b>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + }; + + usb@02184200 { + compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; + reg = <0x2184200 0x200>; + interrupts = <0x0 0x2a 0x4>; + clocks = <0x1 0xcd>; + fsl,usbphy = <0x22>; + fsl,usbmisc = <0x21 0x1>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "okay"; + dr_mode = "host"; + disable-over-current; + }; + + usbmisc@02184800 { + #index-cells = <0x1>; + compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; + reg = <0x2184800 0x200>; + linux,phandle = <0x21>; + phandle = <0x21>; + }; + + ethernet@02188000 { + compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x2188000 0x4000>; + interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>; + clocks = <0x1 0x90 0x1 0x91 0x1 0x30 0x1 0x2c 0x1 0x2c>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + stop-mode = <0xd 0x10 0x3>; + fsl,num-tx-queues = <0x1>; + fsl,num-rx-queues = <0x1>; + fsl,magic-packet; + fsl,wakeup_irq = <0x0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x23>; + phy-mode = "rmii"; + phy-handle = <0x24>; + phy-reset-gpios = <0x15 0x9 0x1>; + phy-reset-duration = <0x1a>; + }; + + usdhc@02190000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2190000 0x4000>; + interrupts = <0x0 0x16 0x4>; + clocks = <0x1 0xce 0x1 0xce 0x1 0xce>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x40 0x1 0xce>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x4>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x25>; + cd-gpios = <0xb 0x13 0x1>; + keep-power-in-suspend; + enable-sdio-wakeup; + }; + + usdhc@02194000 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; + reg = <0x2194000 0x4000>; + interrupts = <0x0 0x17 0x4>; + clocks = <0x1 0xcf 0x1 0xcf 0x1 0xcf>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <0x1 0x41 0x1 0xcf>; + assigned-clock-parents = <0x1 0x26>; + assigned-clock-rates = <0x0 0x7de2900>; + bus-width = <0x8>; + fsl,tuning-step = <0x2>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x26>; + non-removable; + }; + + adc@02198000 { + compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; + reg = <0x2198000 0x4000>; + interrupts = <0x0 0x64 0x4>; + clocks = <0x1 0x7b>; + num-channels = <0x5>; + clock-names = "adc"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x27>; + vref-supply = <0x12>; + }; + + i2c@021a0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a0000 0x4000>; + interrupts = <0x0 0x24 0x4>; + clocks = <0x1 0x9c>; + status = "okay"; + clock-frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x28>; + }; + + i2c@021a4000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a4000 0x4000>; + interrupts = <0x0 0x25 0x4>; + clocks = <0x1 0x9d>; + status = "okay"; + clock_frequency = <0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x29>; + + wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <0x1 0xb4>; + clock-names = "mclk"; + wlf,shared-lrclk; + linux,phandle = <0x3b>; + phandle = <0x3b>; + }; + + sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names = "sii902x"; + pinctrl-0 = <0x2a>; + resets = <0x2b>; + interrupt-parent = <0xb>; + interrupts = <0x12 0x2>; + mode_str = "1280x720M@60"; + bits-per-pixel = <0x10>; + reg = <0x39>; + status = "okay"; + }; + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <0xb>; + interrupts = <0x5 0x2>; + pinctrl-names = "default"; + pinctrl-0 = <0x2c 0x2d>; + reset-gpios = <0x15 0x2 0x1>; + irq-gpios = <0xb 0x5 0x2>; + irq-flags = <0x2>; + touchscreen-max-id = <0x5>; + touchscreen-size-x = <0x320>; + touchscreen-size-y = <0x1e0>; + touchscreen-max-w = <0x400>; + touchscreen-max-p = <0x400>; + goodix,type-a-report = <0x0>; + goodix,driver-send-cfg = <0x0>; + goodix,create-wr-node = <0x1>; + goodix,wakeup-with-reset = <0x0>; + goodix,resume-in-workqueue = <0x0>; + goodix,int-sync = <0x0>; + goodix,swap-x2y = <0x0>; + goodix,esd-protect = <0x0>; + goodix,pen-suppress-finger = <0x0>; + goodix,auto-update = <0x0>; + goodix,auto-update-cfg = <0x0>; + goodix,power-off-sleep = <0x0>; + goodix,cfg-group0 = [6b 00 04 58 02 05 0d 00 01 0f 28 0f 50 32 03 05 00 00 00 00 00 00 00 00 00 00 00 8a 2a 0c 45 47 0c 08 00 00 00 40 03 2c 00 01 00 00 00 03 64 32 00 00 00 28 64 94 d5 02 07 00 00 04 95 2c 00 8b 34 00 82 3f 00 7d 4c 00 7a 5b 00 7a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 18 16 14 12 10 0e 0c 0a 08 06 04 02 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 18 1c 1d 1e 1f 20 21 22 24 13 12 10 0f 0a 08 06 04 02 00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 79 01]; + goodix,cfg-group1 = [97 e0 01 10 01 05 0d 00 01 00 00 05 5a 46 53 11 00 00 11 11 14 14 14 22 0a 04 00 00 00 00 00 00 53 00 14 00 00 84 00 00 3c 00 00 64 1e 28 87 27 08 32 34 05 0d 20 33 60 11 02 24 00 00 64 80 80 14 02 00 00 54 89 68 85 6d 82 72 80 76 7d 7b 7b 00 00 00 00 00 00 00 f0 50 3c ff ff 07 00 00 00 02 14 14 03 04 00 21 64 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 20 50 3c 3c 00 00 00 00 00 0d 06 0c 05 0b 04 0a 03 ff ff ff ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3c 00 05 1e 00 02 2a 1e 19 14 02 00 03 0a 05 00 00 00 00 00 00 00 01 ff ff 86 22 03 00 00 33 00 0f 00 00 00 50 3c 50 00 00 00 00 2a 01]; + goodix,cfg-group2 = [00 20 03 e0 01 05 3c 00 01 08 28 0c 50 32 03 05 00 00 00 00 00 00 00 17 19 1e 14 8b 2b 0d 33 35 0c 08 00 00 00 9a 03 11 00 01 00 00 00 00 00 32 00 00 00 20 58 94 c5 02 00 00 00 04 b0 23 00 93 2b 00 7b 35 00 69 41 00 5b 4f 00 5b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0f 10 12 13 16 18 1c 1d 1e 1f 20 21 22 24 26 ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff 48 01]; + }; + }; + + i2c@021a8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21a8000 0x4000>; + interrupts = <0x0 0x26 0x4>; + clocks = <0x1 0x9e>; + status = "disabled"; + }; + + romcp@021ac000 { + compatible = "fsl,imx6ul-romcp", "syscon"; + reg = <0x21ac000 0x4000>; + }; + + mmdc@021b0000 { + compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; + reg = <0x21b0000 0x4000>; + }; + + weim@021b8000 { + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; + reg = <0x21b8000 0x4000>; + interrupts = <0x0 0xe 0x4>; + clocks = <0x1 0x0>; + }; + + ocotp-ctrl@021bc000 { + compatible = "fsl,imx6ull-ocotp", "syscon"; + reg = <0x21bc000 0x4000>; + clocks = <0x1 0xa5>; + linux,phandle = <0x1c>; + phandle = <0x1c>; + }; + + csu@021c0000 { + compatible = "fsl,imx6ul-csu"; + reg = <0x21c0000 0x4000>; + interrupts = <0x0 0x15 0x4>; + status = "disabled"; + }; + + csi@021c4000 { + compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi"; + reg = <0x21c4000 0x4000>; + interrupts = <0x0 0x7 0x4>; + clocks = <0x1 0x0 0x1 0x8a 0x1 0x0>; + clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + status = "disabled"; + }; + + lcdif@021c8000 { + compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; + reg = <0x21c8000 0x4000>; + interrupts = <0x0 0x5 0x4>; + clocks = <0x1 0xa2 0x1 0xa1 0x1 0x0>; + clock-names = "pix", "axi", "disp_axi"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x2e 0x2f 0x30>; + display = <0x31>; + reset-gpios = <0x32 0x4 0x1>; + + display { + bits-per-pixel = <0x18>; + bus-width = <0x18>; + linux,phandle = <0x31>; + phandle = <0x31>; + + display-timings { + native-mode = <0x33>; + + timing0_1024x768 { + clock-frequency = <0x2faf080>; + hactive = <0x400>; + vactive = <0x258>; + hfront-porch = <0xa0>; + hback-porch = <0x8c>; + hsync-len = <0x14>; + vback-porch = <0x14>; + vfront-porch = <0xc>; + vsync-len = <0x3>; + hsync-active = <0x0>; + vsync-active = <0x0>; + de-active = <0x1>; + pixelclk-active = <0x0>; + linux,phandle = <0x33>; + phandle = <0x33>; + }; + }; + }; + }; + + pxp@021cc000 { + compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma"; + reg = <0x21cc000 0x4000>; + interrupts = <0x0 0x8 0x4 0x0 0x12 0x4>; + clocks = <0x1 0x0 0x1 0xaf>; + clock-names = "pxp_ipg", "pxp_axi"; + status = "okay"; + }; + + qspi@021e0000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; + reg = <0x21e0000 0x4000 0x60000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0x0 0x6b 0x4>; + clocks = <0x1 0xb0 0x1 0xb0>; + clock-names = "qspi_en", "qspi"; + status = "disabled"; + }; + + serial@021e8000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21e8000 0x4000>; + interrupts = <0x0 0x1b 0x4>; + clocks = <0x1 0xbf 0x1 0xc0>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1b 0x4 0x0 0x7 0x1c 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021ec000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21ec000 0x4000>; + interrupts = <0x0 0x1c 0x4>; + clocks = <0x1 0xc1 0x1 0xc2>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1d 0x4 0x0 0x7 0x1e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x34 0x35>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <0x64 0x64>; + linux,rs485-enabled-at-boot-time; + }; + + serial@021f0000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f0000 0x4000>; + interrupts = <0x0 0x1d 0x4>; + clocks = <0x1 0xc3 0x1 0xc4>; + clock-names = "ipg", "per"; + dmas = <0x7 0x1f 0x4 0x0 0x7 0x20 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + serial@021f4000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f4000 0x4000>; + interrupts = <0x0 0x1e 0x4>; + clocks = <0x1 0xc5 0x1 0xc6>; + clock-names = "ipg", "per"; + dmas = <0x7 0x21 0x4 0x0 0x7 0x22 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c@021f8000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; + reg = <0x21f8000 0x4000>; + interrupts = <0x0 0x23 0x4>; + clocks = <0x1 0x9f>; + status = "disabled"; + }; + + serial@021fc000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21fc000 0x4000>; + interrupts = <0x0 0x11 0x4>; + clocks = <0x1 0xc7 0x1 0xc8>; + clock-names = "ipg", "per"; + dmas = <0x7 0x0 0x4 0x0 0x7 0x2f 0x4 0x0>; + dma-names = "rx", "tx"; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x36>; + }; + }; + + aips-bus@02200000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x2200000 0x100000>; + ranges; + + dcp@02280000 { + compatible = "fsl,imx6sl-dcp"; + reg = <0x2280000 0x4000>; + interrupts = <0x0 0x2e 0x4 0x0 0x2f 0x4 0x0 0x30 0x4>; + clocks = <0x1 0xe7>; + clock-names = "dcp"; + }; + + rngb@02284000 { + compatible = "fsl,imx6sl-rng", "fsl,imx-rng", "imx-rng"; + reg = <0x2284000 0x4000>; + interrupts = <0x0 0x6 0x4>; + clocks = <0x1 0x0>; + }; + + serial@02288000 { + compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x2288000 0x4000>; + interrupts = <0x0 0x28 0x4>; + clocks = <0x1 0xcb 0x1 0xcc>; + clock-names = "ipg", "per"; + dmas = <0x7 0x2d 0x4 0x0 0x7 0x2e 0x4 0x0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + epdc@0228c000 { + compatible = "fsl,imx7d-epdc"; + interrupts = <0x0 0x70 0x4>; + reg = <0x228c000 0x4000>; + clocks = <0x1 0xeb 0x1 0xec>; + clock-names = "epdc_axi", "epdc_pix"; + status = "disabled"; + }; + + iomuxc-snvs@02290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x2290000 0x10000>; + pinctrl-names = "default_snvs"; + pinctrl-0 = <0x37>; + + imx6ul-evk { + + hoggrp-2 { + fsl,pins = <0x2c 0x70 0x0 0x5 0x0 0x1b0b0 0x20 0x64 0x0 0x5 0x0 0x1b0b0 0xc 0x50 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x37>; + phandle = <0x37>; + }; + + tscresetgrp { + fsl,pins = <0x10 0x54 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x2c>; + phandle = <0x2c>; + }; + + spi4grp { + fsl,pins = <0x0 0x44 0x0 0x5 0x0 0x70a1 0x4 0x48 0x0 0x5 0x0 0x70a1 0x24 0x68 0x0 0x5 0x0 0x70a1 0x28 0x6c 0x0 0x5 0x0 0x80000000>; + linux,phandle = <0x3d>; + phandle = <0x3d>; + }; + + ledgrp { + fsl,pins = <0x14 0x58 0x0 0x5 0x0 0x110a0>; + linux,phandle = <0x39>; + phandle = <0x39>; + }; + + uart3_rs485 { + fsl,pins = <0x8 0x4c 0x0 0x5 0x0 0x1b0b0>; + linux,phandle = <0x35>; + phandle = <0x35>; + }; + }; + }; + + snvs-gpr@0x02294000 { + compatible = "fsl, imx6ull-snvs-gpr"; + reg = <0x2294000 0x10000>; + }; + }; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <0x38 0x0 0x3e8>; + brightness-levels = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x8 0xa>; + default-brightness-level = <0x8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + regulator@0 { + compatible = "regulator-fixed"; + reg = <0x0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + linux,phandle = <0x12>; + phandle = <0x12>; + }; + + regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <0x39fbc0>; + regulator-max-microvolt = <0x39fbc0>; + gpios = <0x15 0x5 0x0>; + enable-active-high; + regulator-boot-on; + }; + + regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + gpios = <0xb 0xa 0x1>; + regulator-boot-on; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <0x39>; + status = "disabled"; + + cpu { + label = "cpu"; + gpios = <0x15 0x3 0x1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <0x15 0x1 0x1>; + gpio-key,wakeup; + linux,code = <0x2>; + }; + + user2 { + label = "User2 Button"; + gpios = <0x9 0xe 0x1>; + gpio-key,wakeup; + linux,code = <0x3>; + }; + }; + + sound { + compatible = "fsl,imx6ul-evk-wm8960", "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <0x3a>; + audio-codec = <0x3b>; + asrc-controller = <0x3c>; + codec-master; + gpr = <0xd 0x4 0x100000 0x100000>; + hp-det = <0x3 0x0>; + audio-routing = "Headphone Jack", "HP_L", "Headphone Jack", "HP_R", "Ext Spk", "SPK_LP", "Ext Spk", "SPK_LN", "Ext Spk", "SPK_RP", "Ext Spk", "SPK_RN", "LINPUT2", "Mic Jack", "LINPUT3", "Mic Jack", "RINPUT1", "Main MIC", "RINPUT2", "Main MIC", "Mic Jack", "MICB", "Main MIC", "MICB", "CPU-Playback", "ASRC-Playback", "Playback", "CPU-Playback", "ASRC-Capture", "CPU-Capture", "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <0x3d>; + pinctrl-assert-gpios = <0x15 0x8 0x1>; + status = "okay"; + gpio-sck = <0x15 0xb 0x0>; + gpio-mosi = <0x15 0xa 0x0>; + cs-gpios = <0x15 0x7 0x0>; + num-chipselects = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <0x2>; + reg = <0x0>; + registers-number = <0x1>; + registers-default = [57]; + spi-max-frequency = <0x2710>; + linux,phandle = <0x3e>; + phandle = <0x3e>; + }; + }; + + sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <0x3e 0x1 0x1>; + reset-delay-us = <0x186a0>; + #reset-cells = <0x0>; + status = "okay"; + linux,phandle = <0x2b>; + phandle = <0x2b>; + }; +}; diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts new file mode 100644 index 0000000..4e58b1b --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/100ask_imx6ull-14x14.dts @@ -0,0 +1,937 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include +#include "imx6ull.dtsi" + +/ { + model = "Freescale i.MX6 ULL 14x14 EVK Board"; + compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; + + myled: myled_for_test { + pin = "gpio5_3"; + }; + + myled_ok: myled_for_test_ok { + compatible = "100ask,led"; + pin = "gpio5_3"; + }; + + + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 1000>; + brightness-levels = <0 1 2 3 4 5 6 8 10>; + default-brightness-level = <8>; + status = "okay"; + }; + + pxp_v4l2 { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_can_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_ltemodule: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "ltemodule-pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + reg_gpio_wifi: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wifi-pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + status = "disabled"; + + led0: cpu { + label = "cpu"; + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + user1 { + label = "User1 Button"; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + + user2 { + label = "User2 Button"; + gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = ; + }; + }; + sound { + compatible = "fsl,imx6ul-evk-wm8960", + "fsl,imx-audio-wm8960"; + model = "wm8960-audio"; + cpu-dai = <&sai2>; + audio-codec = <&codec>; + asrc-controller = <&asrc>; + codec-master; + gpr = <&gpr 4 0x100000 0x100000>; + hp-det = <3 0>; + /*hp-det-gpios = <&gpio5 4 0>; + mic-det-gpios = <&gpio5 4 0>;*/ + audio-routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Ext Spk", "SPK_LP", + "Ext Spk", "SPK_LN", + "Ext Spk", "SPK_RP", + "Ext Spk", "SPK_RN", + "LINPUT2", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Main MIC", + "RINPUT2", "Main MIC", + "Mic Jack", "MICB", + "Main MIC", "MICB", + "CPU-Playback", "ASRC-Playback", + "Playback", "CPU-Playback", + "ASRC-Capture", "CPU-Capture", + "CPU-Capture", "Capture"; + status = "okay"; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + status = "okay"; + gpio-sck = <&gpio5 11 0>; + gpio-mosi = <&gpio5 10 0>; + cs-gpios = <&gpio5 7 0>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + gpio_spi: gpio_spi@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <1>; + registers-default = /bits/ 8 <0x57>; + spi-max-frequency = <10000>; + }; + }; + + sii902x_reset: sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + #reset-cells = <0>; + status = "okay"; + }; + +}; + +&gpmi{ + status = "disabled"; +}; +&cpu0 { + arm-supply = <®_arm>; + soc-supply = <®_soc>; +}; + +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <0>; + }; + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + smsc,disable-energy-detect; + reg = <1>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; +&gpc { + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks IMX6UL_CLK_SAI2>; + clock-names = "mclk"; + wlf,shared-lrclk; + }; + sii902x: sii902x@39 { + compatible = "SiI,sii902x"; + pinctrl-names = "default"; + reset-names="sii902x"; + pinctrl-0 = <&pinctrl_sii902x>; + resets = <&sii902x_reset>; + interrupt-parent = <&gpio1>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + mode_str ="1280x720M@60"; + bits-per-pixel = <16>; + reg = <0x39>; + status = "okay"; + }; + + + gt9xx@5d { + compatible = "goodix,gt9xx"; + reg = <0x5d>; + status = "okay"; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>; + /*pinctrl-1 = <&pinctrl_tsc_irq>;*/ + /*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input"; + pinctrl-0 = <&ts_int_default>; + pinctrl-1 = <&ts_int_output_low>; + pinctrl-2 = <&ts_int_output_high>; + pinctrl-3 = <&ts_int_input>; + */ + reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>; + irq-flags = <2>; /*1:rising 2: falling*/ + + touchscreen-max-id = <5>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-max-w = <1024>; + touchscreen-max-p = <1024>; + /*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/ + + goodix,type-a-report = <0>; + goodix,driver-send-cfg = <0>; + goodix,create-wr-node = <1>; + goodix,wakeup-with-reset = <0>; + goodix,resume-in-workqueue = <0>; + goodix,int-sync = <0>; + goodix,swap-x2y = <0>; + goodix,esd-protect = <0>; + goodix,pen-suppress-finger = <0>; + goodix,auto-update = <0>; + goodix,auto-update-cfg = <0>; + goodix,power-off-sleep = <0>; + + /*7*/ + goodix,cfg-group0 = [ + 6b 00 04 58 02 05 0d 00 01 0f + 28 0f 50 32 03 05 00 00 00 00 + 00 00 00 00 00 00 00 8a 2a 0c + 45 47 0c 08 00 00 00 40 03 2c + 00 01 00 00 00 03 64 32 00 00 + 00 28 64 94 d5 02 07 00 00 04 + 95 2c 00 8b 34 00 82 3f 00 7d + 4c 00 7a 5b 00 7a 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 18 16 14 12 10 0e 0c 0a + 08 06 04 02 ff ff 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 16 18 1c 1d 1e 1f 20 21 + 22 24 13 12 10 0f 0a 08 06 04 + 02 00 ff ff ff ff ff ff 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 79 01 + ]; + + /*4.3*/ + goodix,cfg-group1 = [ + 97 E0 01 10 01 05 0D 00 01 00 + 00 05 5A 46 53 11 00 00 11 11 + 14 14 14 22 0A 04 00 00 00 00 + 00 00 53 00 14 00 00 84 00 00 + 3C 00 00 64 1E 28 87 27 08 32 + 34 05 0D 20 33 60 11 02 24 00 + 00 64 80 80 14 02 00 00 54 89 + 68 85 6D 82 72 80 76 7D 7B 7B + 00 00 00 00 00 00 00 F0 50 3C + FF FF 07 00 00 00 02 14 14 03 + 04 00 21 64 0A 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 32 20 50 3C 3C 00 00 00 00 00 + 0D 06 0C 05 0B 04 0A 03 FF FF + FF FF FF FF 00 01 02 03 04 05 + 06 07 08 09 0A 0B 0C 0D FF FF + FF FF FF FF FF FF FF FF FF FF + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 3C 00 05 1E 00 02 + 2A 1E 19 14 02 00 03 0A 05 00 + 00 00 00 00 00 00 01 FF FF 86 + 22 03 00 00 33 00 0F 00 00 00 + 50 3C 50 00 00 00 00 2A 01 + ]; + + /*5*/ + goodix,cfg-group2 = [ + 00 20 03 E0 01 05 3C 00 01 08 + 28 0C 50 32 03 05 00 00 00 00 + 00 00 00 17 19 1E 14 8B 2B 0D + 33 35 0C 08 00 00 00 9A 03 11 + 00 01 00 00 00 00 00 32 00 00 + 00 20 58 94 C5 02 00 00 00 04 + B0 23 00 93 2B 00 7B 35 00 69 + 41 00 5B 4F 00 5B 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 02 04 06 08 0A 0C 0E 10 + 12 14 16 18 1A FF 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 + 00 00 00 02 04 06 08 0A 0C 0F + 10 12 13 16 18 1C 1D 1E 1F 20 + 21 22 24 26 FF FF FF FF 00 00 + 00 FF FF FF FF FF FF FF FF FF + FF FF FF FF 48 01 + ]; + + }; + + +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>; + imx6ul-evk { + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 /* USB OTG1 ID */ + // MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x000010B0 + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110A0 + >; + }; + pinctrl_sii902x: hdmigrp { + fsl,pins = < + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59 + >; + }; + pinctrl_touchscreen_int: lcdif_tsc_int { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0 + >; + }; + pinctrl_enet1: enet1grp { + fsl,pins = < + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x000010B0 + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x000010B0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_ecspi3: ecspi3 { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x000010B0 + MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x000010B0 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x000010B0 + //MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x000010B0 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x000010B0 + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x000010B0 + >; + }; + + pinctrl_ecspi1: ecspi1 { + fsl,pins = < + MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x000010B0 + MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x000010B0 + MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x000010B0 + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x000010B0 + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x000010B0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + >; + }; + + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2_8bit: usdhc2grp_8bit { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + pinctrl_lcdif_reset: lcdifresetgrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0 + >; + }; + + pinctrl_adc1: adc1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x000010B1 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x000010B1 + >; + }; + + }; +}; + +&iomuxc_snvs { + pinctrl-names = "default_snvs"; + pinctrl-0 = <&pinctrl_hog_2>; + imx6ul-evk { + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 /* enet1 reset */ + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0 /* enet2 reset */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110A0 /*key 1*/ + >; + }; + + pinctrl_tsc_reset: tscresetgrp { /*!< Function assigned for the core: Cortex-A7[ca7] */ + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x000110A0 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 + MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 + >; + }; + + pinctrl_leds: ledgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0 + >; + }; + + pinctrl_485_ctl: uart3_rs485 { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 + >; + }; + + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl + &pinctrl_lcdif_reset>; + display = <&display0>; + status = "okay"; + reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 100ask */ + + display0: display { + bits-per-pixel = <24>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0_1024x768 { + clock-frequency = <50000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <160>; + hback-porch = <140>; + hsync-len = <20>; + vback-porch = <20>; + vfront-porch = <12>; + vsync-len = <3>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pxp { + status = "okay"; +}; +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + status = "okay"; + + + spidev: icm20608@0{ + compatible = "invensense,icm20608"; + interrupt-parent = <&gpio1>; + interrupts = <1 1>; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfffff>; + pre-charge-time = <0xffff>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3 + &pinctrl_485_ctl>; + //pinctrl-0 = <&pinctrl_uart3>; + //fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>; + //rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + //rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <100 100>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + status = "okay"; +}; + + +&usbotg1 { + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphy1 { + tx-d-cal = <0x5>; +}; + +&usbphy2 { + tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + enable-sdio-wakeup; + bus-width = <4>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_8bit>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + status = "okay"; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc1>; + num-channels = <5>; + vref-supply = <®_can_3v3>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + /* + spidev0: spi@0 { + compatible = "rohm,dh2228fv"; + reg = <0>; + spi-max-frequency = <5000000>; + }; + + spidev1: spi@1 { + compatible = "rohm,dh2228fv"; + reg = <1>; + spi-max-frequency = <5000000>; + }; + */ + +}; + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile new file mode 100644 index 0000000..ff7f97f --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/Makefile @@ -0,0 +1,12 @@ + +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +obj-m += led_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c new file mode 100644 index 0000000..1708a67 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/led_drv.c @@ -0,0 +1,198 @@ +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + + +#define LED_MAX_CNT 10 + +struct led_desc { + int pin; + int minor; +}; + +/* 1. 确定主设备号 */ +static int major = 0; +static struct class *led_class; + +static int g_ledcnt = 0; +static struct led_desc leds_desc[LED_MAX_CNT]; + + + +/* 3. 实现对应的open/read/write等函数，填入file_operations结构体 */ +static ssize_t led_drv_write (struct file *file, const char __user *buf, size_t size, loff_t *offset) +{ + int err; + char status; + struct inode *inode = file_inode(file); + int minor = iminor(inode); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + err = copy_from_user(&status, buf, 1); + + /* 根据次设备号和status控制LED */ + printk("set led pin 0x%x as %d\n", leds_desc[minor].pin, status); + + return 1; +} + +static int led_drv_open (struct inode *node, struct file *file) +{ + int minor = iminor(node); + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* 根据次设备号初始化LED */ + printk("init led pin 0x%x as output\n", leds_desc[minor].pin); + + return 0; +} + + +/* 2. 定义自己的file_operations结构体 */ +static struct file_operations led_drv = { + .owner = THIS_MODULE, + .open = led_drv_open, + .write = led_drv_write, +}; + +/* B.1 实现platform_driver的probe函数 */ +static int led_probe(struct platform_device *pdev) +{ + int minor; + int i = 0; + const char *tmp_str; + + struct resource *res; + + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + if (!pdev->dev.of_node) /* 普通的platform_device */ + { + res = platform_get_resource(pdev, IORESOURCE_IRQ, i++); + if (!res) + return -EINVAL; + minor = g_ledcnt; + leds_desc[minor].pin = res->start; + } + else + { + of_property_read_string(pdev->dev.of_node, "pin", &tmp_str); + printk("pin = %s\n", tmp_str); + minor = g_ledcnt; + leds_desc[minor].pin = tmp_str[6] - '0'; + } + + /* 记录引脚 */ + leds_desc[minor].minor = minor; + + /* 7.2 辅助信息 */ + /* 创建设备节点 */ + device_create(led_class, NULL, MKDEV(major, minor), NULL, "100ask_led%d", minor); /* /dev/100ask_led0,1,... */ + + platform_set_drvdata(pdev, &leds_desc[minor]); + + g_ledcnt++; + + return 0; +} + +/* B.2 实现platform_driver的remove函数 */ +static int led_remove(struct platform_device *pdev) +{ + struct led_desc *led = platform_get_drvdata(pdev); + + device_destroy(led_class, MKDEV(major, led->minor)); /* /dev/100ask_led0,1,... */ + + return 0; +} + +static const struct platform_device_id led_id_table[] = { + {"100ask_led", 1}, + {"100ask_led_3", 2}, + {"100ask_led_4", 3}, + { }, +}; + +static const struct of_device_id dts_device_ids[] = { + { .compatible = "100ask,led", }, + {/* sentinel */} +}; + + +/* A. 实现platform_driver */ +static struct platform_driver led_driver = { + .probe = led_probe, + .remove = led_remove, + .driver = { + .name = "100ask_led", + .of_match_table = dts_device_ids, + }, + .id_table = led_id_table, +}; + + + +/* 4. 把file_operations结构体告诉内核：注册驱动程序register_chrdev */ +/* 5. 谁来注册驱动程序啊？得有一个入口函数：安装驱动程序时，就会去调用这个入口函数 */ +static int __init led_init(void) +{ + int err; + + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + major = register_chrdev(0, "100ask_led", &led_drv); /* /dev/led */ + + + /* 7.1 辅助信息 */ + led_class = class_create(THIS_MODULE, "100ask_led_class"); + err = PTR_ERR(led_class); + if (IS_ERR(led_class)) { + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + unregister_chrdev(major, "led"); + return -1; + } + + /* C. 注册platform_driver */ + err = platform_driver_register(&led_driver); + + return err; +} + +/* 6. 有入口函数就应该有出口函数：卸载驱动程序时，就会去调用这个出口函数 */ +static void __exit led_exit(void) +{ + printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__); + + /* C. 反注册platform_driver */ + platform_driver_unregister(&led_driver); + + class_destroy(led_class); + unregister_chrdev(major, "100ask_led"); +} + + +/* 7. 其他完善：提供设备信息，自动创建设备节点 */ + +module_init(led_init); +module_exit(led_exit); + +MODULE_LICENSE("GPL"); + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c new file mode 100644 index 0000000..099eb11 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/07_设备树入门/source/07_platform_driver_for_dts/ledtest.c @@ -0,0 +1,50 @@ + +#include +#include +#include +#include +#include +#include + +/* + * ./ledtest /dev/100ask_led0 on + * ./ledtest /dev/100ask_led0 off + */ +int main(int argc, char **argv) +{ + int fd; + char status; + + /* 1. 判断参数 */ + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + /* 2. 打开文件 */ + fd = open(argv[1], O_RDWR); + if (fd == -1) + { + printf("can not open file %s\n", argv[1]); + return -1; + } + + /* 3. 写文件 */ + if (0 == strcmp(argv[2], "on")) + { + status = 1; + write(fd, &status, 1); + } + else + { + status = 0; + write(fd, &status, 1); + } + + close(fd); + + return 0; +} + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md new file mode 100644 index 0000000..d5a4e52 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.md @@ -0,0 +1,69 @@ +# SPI设备驱动开发1_OLED屏幕硬件操作 + + + +## 1. SPI总线设备驱动模型 + + + +![image-20220118192410328](pic/spi/01_spi_bus_dev_drv.png) + + + +## 2. 分析 + +![image-20220118204447939](pic/spi/02_device_tree_err.png) + + + +## 3. 调试DAC驱动 + +### 3.1 思路 + +使用逻辑分析仪：发现CS信号没有变化 + +查看内核调试信息：cat /sys/kernel/debug/gpio, 发现引脚为input： + +![image-20220122195532597](pic/spi/03_cs_gpio_input.png) + + + +在内核SPI控制器驱动中添加打印，发现GPIO 122确实被配置为output： + +```c +static int spi_imx_setup(struct spi_device *spi) +{ + int err; + + dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, + spi->mode, spi->bits_per_word, spi->max_speed_hz); + + if (gpio_is_valid(spi->cs_gpio)) + { + err = gpio_direction_output(spi->cs_gpio, + spi->mode & SPI_CS_HIGH ? 0 : 1); + + printk("%s %s %d, spi->cs_gpio = %d, gpio_direction_output, err = %d\n", __FILE__, __FUNCTION__, __LINE__, spi->cs_gpio, err); + } + + spi_imx_chipselect(spi, BITBANG_CS_INACTIVE); + + return 0; +} +``` + + + +怀疑： + +* 这个驱动的后续代码再次把GPIO配置成立input +* 其他驱动把GPIO也配置成了input：把spi-imx.ko最后手动加载，发现问题依旧，排除其他驱动的影响。 + + + +解决办法： + +![image-20220122202505579](pic/spi/04_fix_code.png) + + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif new file mode 100644 index 0000000..f534a48 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/28_SPI设备驱动开发1_OLED屏幕硬件操作.tif differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png new file mode 100644 index 0000000..b4c06ab Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/01_spi_bus_dev_drv.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png new file mode 100644 index 0000000..6155b72 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/02_device_tree_err.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png new file mode 100644 index 0000000..544941e Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/03_cs_gpio_input.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png new file mode 100644 index 0000000..ca92956 Binary files /dev/null and b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/doc_pic/pic/spi/04_fix_code.png differ diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c new file mode 100644 index 0000000..0ad17ba --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/01_oled_template/oled_drv.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c new file mode 100644 index 0000000..8970a09 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/02_oled_write/oled_drv.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct spi_device *oled_dev; + +static int major; +static struct class *oled_class; + +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + struct spi_message msg; + struct spi_transfer trans[3]; + + trans[0].tx_buf = buf0; + trans[0].len = len0; + + trans[1].rx_buf = buf1; + trans[1].len = len1; + + trans[2].tx_buf = buf2; + trans[2].rx_buf = buf3; + trans[2].len = len2; + + spi_message_init(&msg); + spi_message_add_tail(&trans[0], &msg); + spi_message_add_tail(&trans[1], &msg); + spi_message_add_tail(&trans[2], &msg); + + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile new file mode 100644 index 0000000..ebf4311 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules +# $(CROSS_COMPILE)gcc -o at24c02_test at24c02_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts new file mode 100644 index 0000000..a0f85fa --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled.dts @@ -0,0 +1,16 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + oled: oled { + compatible = "100ask,oled"; + reg = <0>; + spi-max-frequency = <1000000>; + dc-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; + }; + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c new file mode 100644 index 0000000..3e50b79 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/03_oled_write_coding/oled_drv.c @@ -0,0 +1,231 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//为0 表示命令，为1表示数据 +#define OLED_CMD 0 +#define OLED_DATA 1 + +struct spi_device *oled_dev; +static struct gpio_desc *oled_dc; +static int major; +static struct class *oled_class; + +/********************************************************************** + * 函数名称： oled_write_cmd + * 功能描述： oled向特定地址写入数据或者命令 + * 输入参数：@uc_data :要写入的数据 + @uc_cmd:为1则表示写入数据，为0表示写入命令 + * 输出参数：无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/04 V1.0 芯晓 创建 + ***********************************************************************/ +static void oled_write_cmd_data(unsigned char uc_data,unsigned char uc_cmd) +{ + if(uc_cmd==0) + { + //*GPIO4_DR_s &= ~(1<<20);//拉低，表示写入指令 + gpiod_set_value(oled_dc, 0); + } + else + { + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + } + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, &uc_data, 1); +} + + +/********************************************************************** + * 函数名称： oled_init + * 功能描述： oled_init的初始化，包括SPI控制器得初始化 + * 输入参数：无 + * 输出参数： 初始化的结果 + * 返 回 值： 成功则返回0，否则返回-1 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static int oled_hardware_init(void) +{ + unsigned char uc_dev_id = 0; + + oled_write_cmd_data(0xae,OLED_CMD);//关闭显示 + + oled_write_cmd_data(0x00,OLED_CMD);//设置 lower column address + oled_write_cmd_data(0x10,OLED_CMD);//设置 higher column address + + oled_write_cmd_data(0x40,OLED_CMD);//设置 display start line + + oled_write_cmd_data(0xB0,OLED_CMD);//设置page address + + oled_write_cmd_data(0x81,OLED_CMD);// contract control + oled_write_cmd_data(0x66,OLED_CMD);//128 + + oled_write_cmd_data(0xa1,OLED_CMD);//设置 segment remap + + oled_write_cmd_data(0xa6,OLED_CMD);//normal /reverse + + oled_write_cmd_data(0xa8,OLED_CMD);//multiple ratio + oled_write_cmd_data(0x3f,OLED_CMD);//duty = 1/64 + + oled_write_cmd_data(0xc8,OLED_CMD);//com scan direction + + oled_write_cmd_data(0xd3,OLED_CMD);//set displat offset + oled_write_cmd_data(0x00,OLED_CMD);// + + oled_write_cmd_data(0xd5,OLED_CMD);//set osc division + oled_write_cmd_data(0x80,OLED_CMD);// + + oled_write_cmd_data(0xd9,OLED_CMD);//ser pre-charge period + oled_write_cmd_data(0x1f,OLED_CMD);// + + oled_write_cmd_data(0xda,OLED_CMD);//set com pins + oled_write_cmd_data(0x12,OLED_CMD);// + + oled_write_cmd_data(0xdb,OLED_CMD);//set vcomh + oled_write_cmd_data(0x30,OLED_CMD);// + + oled_write_cmd_data(0x8d,OLED_CMD);//set charge pump disable + oled_write_cmd_data(0x14,OLED_CMD);// + + oled_write_cmd_data(0xaf,OLED_CMD);//set dispkay on + + return 0; +} + +//坐标设置 +/********************************************************************** + * 函数名称： OLED_DIsp_Set_Pos + * 功能描述：设置要显示的位置 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Set_Pos(int x, int y) +{ oled_write_cmd_data(0xb0+y,OLED_CMD); + oled_write_cmd_data((x&0x0f),OLED_CMD); + oled_write_cmd_data(((x&0xf0)>>4)|0x10,OLED_CMD); +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Clear + * 功能描述： 整个屏幕显示数据清0 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static void OLED_DIsp_Clear(void) +{ + unsigned char x, y; + for (y = 0; y < 8; y++) + { + OLED_DIsp_Set_Pos(0, y); + for (x = 0; x < 128; x++) + oled_write_cmd_data((y < 4)? 0 : 0xff, OLED_DATA); /* 清零 */ + } +} + + +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + /* spi oled init */ + oled_dc = gpiod_get(&spi->dev, "dc", GPIOD_OUT_HIGH); + + oled_hardware_init(); + + OLED_DIsp_Clear(); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile new file mode 100644 index 0000000..185f06f --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + $(CROSS_COMPILE)gcc -o oled_test oled_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order oled_test + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += oled_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h new file mode 100644 index 0000000..5698917 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/font.h @@ -0,0 +1,106 @@ +#ifndef _FONT_H_ +#define _FONT_H_ +const unsigned char oled_asc2_8x16[95][16]= +{ + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},// 0 + {0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x30,0x00,0x00,0x00},//!1 + {0x00,0x10,0x0C,0x06,0x10,0x0C,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//"2 + {0x40,0xC0,0x78,0x40,0xC0,0x78,0x40,0x00,0x04,0x3F,0x04,0x04,0x3F,0x04,0x04,0x00},//#3 + {0x00,0x70,0x88,0xFC,0x08,0x30,0x00,0x00,0x00,0x18,0x20,0xFF,0x21,0x1E,0x00,0x00},//$4 + {0xF0,0x08,0xF0,0x00,0xE0,0x18,0x00,0x00,0x00,0x21,0x1C,0x03,0x1E,0x21,0x1E,0x00},//%5 + {0x00,0xF0,0x08,0x88,0x70,0x00,0x00,0x00,0x1E,0x21,0x23,0x24,0x19,0x27,0x21,0x10},//&6 + {0x10,0x16,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//'7 + {0x00,0x00,0x00,0xE0,0x18,0x04,0x02,0x00,0x00,0x00,0x00,0x07,0x18,0x20,0x40,0x00},//(8 + {0x00,0x02,0x04,0x18,0xE0,0x00,0x00,0x00,0x00,0x40,0x20,0x18,0x07,0x00,0x00,0x00},//)9 + {0x40,0x40,0x80,0xF0,0x80,0x40,0x40,0x00,0x02,0x02,0x01,0x0F,0x01,0x02,0x02,0x00},//*10 + {0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x1F,0x01,0x01,0x01,0x00},//+11 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xB0,0x70,0x00,0x00,0x00,0x00,0x00},//,12 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01},//-13 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x00},//.14 + {0x00,0x00,0x00,0x00,0x80,0x60,0x18,0x04,0x00,0x60,0x18,0x06,0x01,0x00,0x00,0x00},///15 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x0F,0x10,0x20,0x20,0x10,0x0F,0x00},//016 + {0x00,0x10,0x10,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//117 + {0x00,0x70,0x08,0x08,0x08,0x88,0x70,0x00,0x00,0x30,0x28,0x24,0x22,0x21,0x30,0x00},//218 + {0x00,0x30,0x08,0x88,0x88,0x48,0x30,0x00,0x00,0x18,0x20,0x20,0x20,0x11,0x0E,0x00},//319 + {0x00,0x00,0xC0,0x20,0x10,0xF8,0x00,0x00,0x00,0x07,0x04,0x24,0x24,0x3F,0x24,0x00},//420 + {0x00,0xF8,0x08,0x88,0x88,0x08,0x08,0x00,0x00,0x19,0x21,0x20,0x20,0x11,0x0E,0x00},//521 + {0x00,0xE0,0x10,0x88,0x88,0x18,0x00,0x00,0x00,0x0F,0x11,0x20,0x20,0x11,0x0E,0x00},//622 + {0x00,0x38,0x08,0x08,0xC8,0x38,0x08,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00},//723 + {0x00,0x70,0x88,0x08,0x08,0x88,0x70,0x00,0x00,0x1C,0x22,0x21,0x21,0x22,0x1C,0x00},//824 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x00,0x31,0x22,0x22,0x11,0x0F,0x00},//925 + {0x00,0x00,0x00,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00},//:26 + {0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x00,0x00,0x00,0x00},//;27 + {0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x00},//<28 + {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x00},//=29 + {0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,0x20,0x10,0x08,0x04,0x02,0x01,0x00},//>30 + {0x00,0x70,0x48,0x08,0x08,0x08,0xF0,0x00,0x00,0x00,0x00,0x30,0x36,0x01,0x00,0x00},//?31 + {0xC0,0x30,0xC8,0x28,0xE8,0x10,0xE0,0x00,0x07,0x18,0x27,0x24,0x23,0x14,0x0B,0x00},//@32 + {0x00,0x00,0xC0,0x38,0xE0,0x00,0x00,0x00,0x20,0x3C,0x23,0x02,0x02,0x27,0x38,0x20},//A33 + {0x08,0xF8,0x88,0x88,0x88,0x70,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x11,0x0E,0x00},//B34 + {0xC0,0x30,0x08,0x08,0x08,0x08,0x38,0x00,0x07,0x18,0x20,0x20,0x20,0x10,0x08,0x00},//C35 + {0x08,0xF8,0x08,0x08,0x08,0x10,0xE0,0x00,0x20,0x3F,0x20,0x20,0x20,0x10,0x0F,0x00},//D36 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x20,0x23,0x20,0x18,0x00},//E37 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x00,0x03,0x00,0x00,0x00},//F38 + {0xC0,0x30,0x08,0x08,0x08,0x38,0x00,0x00,0x07,0x18,0x20,0x20,0x22,0x1E,0x02,0x00},//G39 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x20,0x3F,0x21,0x01,0x01,0x21,0x3F,0x20},//H40 + {0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//I41 + {0x00,0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00,0x00},//J42 + {0x08,0xF8,0x88,0xC0,0x28,0x18,0x08,0x00,0x20,0x3F,0x20,0x01,0x26,0x38,0x20,0x00},//K43 + {0x08,0xF8,0x08,0x00,0x00,0x00,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x20,0x30,0x00},//L44 + {0x08,0xF8,0xF8,0x00,0xF8,0xF8,0x08,0x00,0x20,0x3F,0x00,0x3F,0x00,0x3F,0x20,0x00},//M45 + {0x08,0xF8,0x30,0xC0,0x00,0x08,0xF8,0x08,0x20,0x3F,0x20,0x00,0x07,0x18,0x3F,0x00},//N46 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x10,0x20,0x20,0x20,0x10,0x0F,0x00},//O47 + {0x08,0xF8,0x08,0x08,0x08,0x08,0xF0,0x00,0x20,0x3F,0x21,0x01,0x01,0x01,0x00,0x00},//P48 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x18,0x24,0x24,0x38,0x50,0x4F,0x00},//Q49 + {0x08,0xF8,0x88,0x88,0x88,0x88,0x70,0x00,0x20,0x3F,0x20,0x00,0x03,0x0C,0x30,0x20},//R50 + {0x00,0x70,0x88,0x08,0x08,0x08,0x38,0x00,0x00,0x38,0x20,0x21,0x21,0x22,0x1C,0x00},//S51 + {0x18,0x08,0x08,0xF8,0x08,0x08,0x18,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//T52 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//U53 + {0x08,0x78,0x88,0x00,0x00,0xC8,0x38,0x08,0x00,0x00,0x07,0x38,0x0E,0x01,0x00,0x00},//V54 + {0xF8,0x08,0x00,0xF8,0x00,0x08,0xF8,0x00,0x03,0x3C,0x07,0x00,0x07,0x3C,0x03,0x00},//W55 + {0x08,0x18,0x68,0x80,0x80,0x68,0x18,0x08,0x20,0x30,0x2C,0x03,0x03,0x2C,0x30,0x20},//X56 + {0x08,0x38,0xC8,0x00,0xC8,0x38,0x08,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//Y57 + {0x10,0x08,0x08,0x08,0xC8,0x38,0x08,0x00,0x20,0x38,0x26,0x21,0x20,0x20,0x18,0x00},//Z58 + {0x00,0x00,0x00,0xFE,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x00},//[59 + {0x00,0x0C,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x06,0x38,0xC0,0x00},//\60 + {0x00,0x02,0x02,0x02,0xFE,0x00,0x00,0x00,0x00,0x40,0x40,0x40,0x7F,0x00,0x00,0x00},//]61 + {0x00,0x00,0x04,0x02,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//^62 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80},//_63 + {0x00,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//`64 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x19,0x24,0x22,0x22,0x22,0x3F,0x20},//a65 + {0x08,0xF8,0x00,0x80,0x80,0x00,0x00,0x00,0x00,0x3F,0x11,0x20,0x20,0x11,0x0E,0x00},//b66 + {0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x0E,0x11,0x20,0x20,0x20,0x11,0x00},//c67 + {0x00,0x00,0x00,0x80,0x80,0x88,0xF8,0x00,0x00,0x0E,0x11,0x20,0x20,0x10,0x3F,0x20},//d68 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x22,0x22,0x22,0x22,0x13,0x00},//e69 + {0x00,0x80,0x80,0xF0,0x88,0x88,0x88,0x18,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//f70 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x6B,0x94,0x94,0x94,0x93,0x60,0x00},//g71 + {0x08,0xF8,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//h72 + {0x00,0x80,0x98,0x98,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//i73 + {0x00,0x00,0x00,0x80,0x98,0x98,0x00,0x00,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00},//j74 + {0x08,0xF8,0x00,0x00,0x80,0x80,0x80,0x00,0x20,0x3F,0x24,0x02,0x2D,0x30,0x20,0x00},//k75 + {0x00,0x08,0x08,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//l76 + {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x20,0x3F,0x20,0x00,0x3F,0x20,0x00,0x3F},//m77 + {0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//n78 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//o79 + {0x80,0x80,0x00,0x80,0x80,0x00,0x00,0x00,0x80,0xFF,0xA1,0x20,0x20,0x11,0x0E,0x00},//p80 + {0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x0E,0x11,0x20,0x20,0xA0,0xFF,0x80},//q81 + {0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x20,0x20,0x3F,0x21,0x20,0x00,0x01,0x00},//r82 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x33,0x24,0x24,0x24,0x24,0x19,0x00},//s83 + {0x00,0x80,0x80,0xE0,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x1F,0x20,0x20,0x00,0x00},//t84 + {0x80,0x80,0x00,0x00,0x00,0x80,0x80,0x00,0x00,0x1F,0x20,0x20,0x20,0x10,0x3F,0x20},//u85 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x00,0x01,0x0E,0x30,0x08,0x06,0x01,0x00},//v86 + {0x80,0x80,0x00,0x80,0x00,0x80,0x80,0x80,0x0F,0x30,0x0C,0x03,0x0C,0x30,0x0F,0x00},//w87 + {0x00,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x31,0x2E,0x0E,0x31,0x20,0x00},//x88 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x80,0x81,0x8E,0x70,0x18,0x06,0x01,0x00},//y89 + {0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x21,0x30,0x2C,0x22,0x21,0x30,0x00},//z90 + {0x00,0x00,0x00,0x00,0x80,0x7C,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x3F,0x40,0x40},//{91 + {0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00},//|92 + {0x00,0x02,0x02,0x7C,0x80,0x00,0x00,0x00,0x00,0x40,0x40,0x3F,0x00,0x00,0x00,0x00},//}93 + {0x00,0x06,0x01,0x01,0x02,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//~94 +}; +const unsigned char hz_1616[][32]={ +{0x02,0x00,0x02,0x00,0xE2,0xFF,0x22,0x42,0x22,0x42,0x32,0x42,0x2A,0x42,0x26,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0xE2,0xFF,0x02,0x00,0x02,0x00,0x00,0x00},/*"百",0*/ +{0x00,0x00,0xF8,0xFF,0x01,0x00,0x02,0x00,0x00,0x00,0xE2,0x1F,0x22,0x08,0x22,0x08,0x22,0x08,0xE2,0x1F,0x02,0x00,0x02,0x40,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"问",1*/ +{0x00,0x00,0xFE,0xFF,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x0E,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x4E,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"网",2*/ +}; +#endif diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts new file mode 100644 index 0000000..a0f85fa --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled.dts @@ -0,0 +1,16 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + oled: oled { + compatible = "100ask,oled"; + reg = <0>; + spi-max-frequency = <1000000>; + dc-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; + }; + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c new file mode 100644 index 0000000..ca0d42a --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_drv.c @@ -0,0 +1,290 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OLED_SET_XY 99 +#define OLED_SET_XY_WRITE_DATA 100 +#define OLED_SET_XY_WRITE_DATAS 101 +#define OLED_SET_DATAS 102 /* 102为低8位, 高16位用来表示长度 */ + +//为0 表示命令，为1表示数据 +#define OLED_CMD 0 +#define OLED_DATA 1 + +struct spi_device *oled_dev; +static struct gpio_desc *oled_dc; +static int major; +static struct class *oled_class; +static char data_buf[1024]; + +/********************************************************************** + * 函数名称： oled_write_cmd + * 功能描述： oled向特定地址写入数据或者命令 + * 输入参数：@uc_data :要写入的数据 + @uc_cmd:为1则表示写入数据，为0表示写入命令 + * 输出参数：无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/04 V1.0 芯晓 创建 + ***********************************************************************/ +static void oled_write_cmd_data(unsigned char uc_data,unsigned char uc_cmd) +{ + if(uc_cmd==0) + { + //*GPIO4_DR_s &= ~(1<<20);//拉低，表示写入指令 + gpiod_set_value(oled_dc, 0); + } + else + { + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + } + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, &uc_data, 1); +} + +static void oled_write_datas(unsigned char *buf, int len) +{ + //*GPIO4_DR_s |= (1<<20);//拉高，表示写入数据 + gpiod_set_value(oled_dc, 1); + // spi_writeread(ESCPI1_BASE,uc_data);//写入 + spi_write(oled_dev, buf, len); +} + + + +/********************************************************************** + * 函数名称： oled_init + * 功能描述： oled_init的初始化，包括SPI控制器得初始化 + * 输入参数：无 + * 输出参数： 初始化的结果 + * 返 回 值： 成功则返回0，否则返回-1 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static int oled_hardware_init(void) +{ + oled_write_cmd_data(0xae,OLED_CMD);//关闭显示 + + oled_write_cmd_data(0x00,OLED_CMD);//设置 lower column address + oled_write_cmd_data(0x10,OLED_CMD);//设置 higher column address + + oled_write_cmd_data(0x40,OLED_CMD);//设置 display start line + + oled_write_cmd_data(0xB0,OLED_CMD);//设置page address + + oled_write_cmd_data(0x81,OLED_CMD);// contract control + oled_write_cmd_data(0x66,OLED_CMD);//128 + + oled_write_cmd_data(0xa1,OLED_CMD);//设置 segment remap + + oled_write_cmd_data(0xa6,OLED_CMD);//normal /reverse + + oled_write_cmd_data(0xa8,OLED_CMD);//multiple ratio + oled_write_cmd_data(0x3f,OLED_CMD);//duty = 1/64 + + oled_write_cmd_data(0xc8,OLED_CMD);//com scan direction + + oled_write_cmd_data(0xd3,OLED_CMD);//set displat offset + oled_write_cmd_data(0x00,OLED_CMD);// + + oled_write_cmd_data(0xd5,OLED_CMD);//set osc division + oled_write_cmd_data(0x80,OLED_CMD);// + + oled_write_cmd_data(0xd9,OLED_CMD);//ser pre-charge period + oled_write_cmd_data(0x1f,OLED_CMD);// + + oled_write_cmd_data(0xda,OLED_CMD);//set com pins + oled_write_cmd_data(0x12,OLED_CMD);// + + oled_write_cmd_data(0xdb,OLED_CMD);//set vcomh + oled_write_cmd_data(0x30,OLED_CMD);// + + oled_write_cmd_data(0x8d,OLED_CMD);//set charge pump disable + oled_write_cmd_data(0x14,OLED_CMD);// + + oled_write_cmd_data(0xaf,OLED_CMD);//set dispkay on + + return 0; +} + +//坐标设置 +/********************************************************************** + * 函数名称： OLED_DIsp_Set_Pos + * 功能描述：设置要显示的位置 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Set_Pos(int x, int y) +{ oled_write_cmd_data(0xb0+y,OLED_CMD); + oled_write_cmd_data((x&0x0f),OLED_CMD); + oled_write_cmd_data(((x&0xf0)>>4)|0x10,OLED_CMD); +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Clear + * 功能描述： 整个屏幕显示数据清0 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +static void OLED_DIsp_Clear(void) +{ + unsigned char x, y; + for (y = 0; y < 8; y++) + { + OLED_DIsp_Set_Pos(0, y); + for (x = 0; x < 128; x++) + oled_write_cmd_data(0, OLED_DATA); /* 清零 */ + } +} + + +/* cmd = OLED_SET_XY_WRITE_DATA, buf[0] = x, buf[1] = y, buf[2] = data + * cmd = OLED_SET_XY_WRITE_DATAS, buf[0] = x, buf[1] = y, buf[2] = len, buf[3...] = datas + */ +static long oled_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + const void __user *from = (const void __user *)arg; + char param_buf[3]; + int size; + int err; + + + switch (cmd & 0xff) + { + case OLED_SET_XY: + { + err = copy_from_user(param_buf, from, 2); + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + break; + } + case OLED_SET_XY_WRITE_DATA: + { + err = copy_from_user(param_buf, from, 3); + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + oled_write_cmd_data(param_buf[2], OLED_DATA); + break; + } + + case OLED_SET_XY_WRITE_DATAS: + { + err = copy_from_user(param_buf, from, 3); + size = param_buf[2]; + err = copy_from_user(data_buf, from+3, size); + + OLED_DIsp_Set_Pos(param_buf[0], param_buf[1]); + oled_write_datas(data_buf, size); + + break; + } + + case OLED_SET_DATAS: + { + size = cmd >> 8; + err = copy_from_user(data_buf, from, size); + oled_write_datas(data_buf, size); + break; + } + } + return 0; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations oled_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = oled_ioctl, +}; + +static int oled_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + oled_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "oled", &oled_fops); + + /* class_create */ + oled_class = class_create(THIS_MODULE, "oled_class"); + + /* device_create */ + device_create(oled_class, NULL, MKDEV(major, 0), NULL, "myoled"); + + /* spi oled init */ + oled_dc = gpiod_get(&spi->dev, "dc", GPIOD_OUT_HIGH); + + oled_hardware_init(); + + OLED_DIsp_Clear(); + + return 0; +} + +static int oled_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(oled_class, MKDEV(major, 0)); + class_destroy(oled_class); + unregister_chrdev(major, "oled"); + gpiod_put(oled_dc); + + return 0; +} + +//static const struct spi_device_id oled_spi_ids[] = { +// {"100ask,oled", }, +// {} +//}; + +static const struct of_device_id oled_of_match[] = { + {.compatible = "100ask,oled"}, + {} +}; + +static struct spi_driver oled_driver = { + .driver = { + .name = "oled", + .of_match_table = oled_of_match, + }, + .probe = oled_probe, + .remove = oled_remove, + //.id_table = oled_spi_ids, +}; + +int oled_init(void) +{ + return spi_register_driver(&oled_driver); +} + +static void oled_exit(void) +{ + spi_unregister_driver(&oled_driver); +} + +module_init(oled_init); +module_exit(oled_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c new file mode 100644 index 0000000..8d7388a --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/04_oled_write_ioctl/oled_test.c @@ -0,0 +1,186 @@ +#include +#include +#include +#include +#include +#include +#include "font.h" + +#define OLED_SET_XY 99 +#define OLED_SET_XY_WRITE_DATA 100 +#define OLED_SET_XY_WRITE_DATAS 101 +#define OLED_SET_DATAS 102 /* 102为低8位, 高16位用来表示长度 */ + +int fd; + +/********************************************************************** + * 函数名称： OLED_DIsp_Char + * 功能描述：在某个位置显示字符 1-9 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @c ：要显示的字符的ascii码 + * 输出参数： 无 + * 返 回 值： + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 +***********************************************************************/ +void OLED_DIsp_Char(int x, int y, unsigned char c) +{ + int i = 0; + /* 得到字模 */ + const unsigned char *dots = oled_asc2_8x16[c - ' ']; + char pos[2]; +#if 0 + /* 发给OLED */ + OLED_DIsp_Set_Pos(x, y); + /* 发出8字节数据 */ + for (i = 0; i < 8; i++) + oled_write_cmd_data(dots[i], OLED_DATA); +#endif + pos[0] = x; + pos[1] = y; + + ioctl(fd, OLED_SET_XY, pos); + ioctl(fd, OLED_SET_DATAS | (8<<8), dots); + +#if 0 + OLED_DIsp_Set_Pos(x, y+1); + /* 发出8字节数据 */ + for (i = 0; i < 8; i++) + oled_write_cmd_data(dots[i+8], OLED_DATA); +#endif + pos[0] = x; + pos[1] = y+1; + + ioctl(fd, OLED_SET_XY, pos); + ioctl(fd, OLED_SET_DATAS | (8<<8), &dots[8]); + +} + + + +/********************************************************************** + * 函数名称： OLED_DIsp_String + * 功能描述： 在指定位置显示字符串 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @str ：要显示的字符串 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 +***********************************************************************/ +void OLED_DIsp_String(int x, int y, char *str) +{ + unsigned char j=0; + while (str[j]) + { + OLED_DIsp_Char(x, y, str[j]);//显示单个字符 + x += 8; + if(x > 127) + { + x = 0; + y += 2; + }//移动显示位置 + j++; + } +} + +/********************************************************************** + * 函数名称： OLED_DIsp_CHinese + * 功能描述：在指定位置显示汉字 + * 输入参数：@ x ：要显示的column address + @y :要显示的page address + @chr ：要显示的汉字，三个汉字“百问网”中选择一个 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_CHinese(unsigned char x,unsigned char y,unsigned char no) +{ + unsigned char t, adder=0; + char pos[2]; + + pos[0] = x; + pos[1] = y; + + ioctl(fd, OLED_SET_XY, pos); + + for(t=0;t<16;t++) + {//显示上半截字符 + //oled_write_cmd_data(hz_1616[no][t*2],OLED_DATA); + ioctl(fd, OLED_SET_DATAS | (1<<8), &hz_1616[no][t*2]); + + adder+=1; + } + + pos[0] = x; + pos[1] = y+1; + + ioctl(fd, OLED_SET_XY, pos); + + for(t=0;t<16;t++) + {//显示下半截字符 + //oled_write_cmd_data(hz_1616[no][t*2+1],OLED_DATA); + ioctl(fd, OLED_SET_DATAS | (1<<8), &hz_1616[no][t*2+1]); + + adder+=1; + } +} + +/********************************************************************** + * 函数名称： OLED_DIsp_Test + * 功能描述： 整个屏幕显示测试 + * 输入参数：无 + * 输出参数： 无 + * 返 回 值： 无 + * 修改日期 版本号 修改人 修改内容 + * ----------------------------------------------- + * 2020/03/15 V1.0 芯晓 创建 + ***********************************************************************/ +void OLED_DIsp_Test(void) +{ + int i; + + OLED_DIsp_String(0, 0, "wiki.100ask.net"); + OLED_DIsp_String(0, 2, "book.100ask.net"); + OLED_DIsp_String(0, 4, "bbs.100ask.net"); + + for(i = 0; i < 3; i++) + { //显示汉字 百问网 + OLED_DIsp_CHinese(32+i*16, 6, i); + } +} + + +/* + * oled_test /dev/myoled + */ + +int main(int argc, char **argv) +{ + int buf[2]; + + if (argc != 2) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + fd = open(argv[1], O_RDWR); + if (fd < 0) + { + printf(" can not open %s\n", argv[1]); + return -1; + } + + OLED_DIsp_Test(); + + return 0; +} + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile new file mode 100644 index 0000000..bde0d9b --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/Makefile @@ -0,0 +1,28 @@ + +# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR +# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量: +# 2.1 ARCH, 比如: export ARCH=arm64 +# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu- +# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin +# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同, +# 请参考各开发板的高级用户使用手册 + +#KERN_DIR = /home/book/100ask_stm32mp157_pro-sdk/Linux-5.4 +KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88 + +all: + make -C $(KERN_DIR) M=`pwd` modules + $(CROSS_COMPILE)gcc -o dac_test dac_test.c +clean: + make -C $(KERN_DIR) M=`pwd` modules clean + rm -rf modules.order dac_test + +# 参考内核源码drivers/char/ipmi/Makefile +# 要想把a.c, b.c编译成ab.ko, 可以这样指定: +# ab-y := a.o b.o +# obj-m += ab.o + + + +obj-m += dac_drv.o + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts new file mode 100644 index 0000000..039c2bf --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac.dts @@ -0,0 +1,15 @@ +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + + dac: dac { + compatible = "100ask,dac"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c new file mode 100644 index 0000000..256117f --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_drv.c @@ -0,0 +1,116 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +struct spi_device *dac_dev; +static int major; +static struct class *dac_class; + +static ssize_t dac_write(struct file *file, const char __user *buf, size_t size, loff_t * offset) +{ + unsigned short val = 0; + unsigned char ker_buf[4]; + int err; + + if (size != 2) + return -EINVAL; + + copy_from_user(&val, buf, 2); + + //val = 0x554; + val <<= 2; + val = val & 0x0fff; /* DAC数据格式: 高4位、低2位为0 */ + + ker_buf[0] = val >> 8; + ker_buf[1] = val; + + err = spi_write(dac_dev, ker_buf, 2); + + //spi_write(dac_dev, &val, 2); + + //printk("dac_write err = %d, val = 0x%x, %d, ker_buf[0] = 0x%x, ker_buf[1] = 0x%x\n", err, val, val, ker_buf[0], ker_buf[1]); + + return 2; +} + +/* 定义自己的file_operations结构体 */ +static struct file_operations dac_fops = { + .owner = THIS_MODULE, + .write = dac_write, +}; + +static int dac_probe(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + dac_dev = spi; + + /* register_chrdev */ + major = register_chrdev(0, "dac", &dac_fops); + + /* class_create */ + dac_class = class_create(THIS_MODULE, "dac_class"); + + /* device_create */ + device_create(dac_class, NULL, MKDEV(major, 0), NULL, "mydac"); + + return 0; +} + +static int dac_remove(struct spi_device *spi) +{ + printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + + device_destroy(dac_class, MKDEV(major, 0)); + class_destroy(dac_class); + unregister_chrdev(major, "dac"); + + return 0; +} + +//static const struct spi_device_id dac_spi_ids[] = { +// {"100ask,dac", }, +// {} +//}; + +static const struct of_device_id dac_of_match[] = { + {.compatible = "100ask,dac"}, + {} +}; + +static struct spi_driver dac_driver = { + .driver = { + .name = "dac", + .of_match_table = dac_of_match, + }, + .probe = dac_probe, + .remove = dac_remove, + //.id_table = dac_spi_ids, +}; + +int dac_init(void) +{ + return spi_register_driver(&dac_driver); +} + +static void dac_exit(void) +{ + spi_unregister_driver(&dac_driver); +} + +module_init(dac_init); +module_exit(dac_exit); + +MODULE_LICENSE("GPL v2"); + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c new file mode 100644 index 0000000..f74e56f --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/dac_test.c @@ -0,0 +1,43 @@ +#include +#include +#include +#include +#include +#include +#include + +/* + * dac_test /dev/mydac + */ + +int main(int argc, char **argv) +{ + int fd; + int buf[2]; + unsigned short dac_val = 0; + + if (argc != 3) + { + printf("Usage: %s \n", argv[0]); + return -1; + } + + fd = open(argv[1], O_RDWR); + if (fd < 0) + { + printf(" can not open %s\n", argv[1]); + return -1; + } + + dac_val = strtoul(argv[2], NULL, 0); + + //while (1) + { + write(fd, &dac_val, 2); + // dac_val += 50; + } + + return 0; +} + + diff --git a/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h new file mode 100644 index 0000000..5698917 --- /dev/null +++ b/STM32MP157/source/A7/11_SPI/01_参考的源码/28_SPI设备驱动开发1_OLED屏幕硬件操作/source/05_dac/font.h @@ -0,0 +1,106 @@ +#ifndef _FONT_H_ +#define _FONT_H_ +const unsigned char oled_asc2_8x16[95][16]= +{ + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},// 0 + {0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x30,0x00,0x00,0x00},//!1 + {0x00,0x10,0x0C,0x06,0x10,0x0C,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//"2 + {0x40,0xC0,0x78,0x40,0xC0,0x78,0x40,0x00,0x04,0x3F,0x04,0x04,0x3F,0x04,0x04,0x00},//#3 + {0x00,0x70,0x88,0xFC,0x08,0x30,0x00,0x00,0x00,0x18,0x20,0xFF,0x21,0x1E,0x00,0x00},//$4 + {0xF0,0x08,0xF0,0x00,0xE0,0x18,0x00,0x00,0x00,0x21,0x1C,0x03,0x1E,0x21,0x1E,0x00},//%5 + {0x00,0xF0,0x08,0x88,0x70,0x00,0x00,0x00,0x1E,0x21,0x23,0x24,0x19,0x27,0x21,0x10},//&6 + {0x10,0x16,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//'7 + {0x00,0x00,0x00,0xE0,0x18,0x04,0x02,0x00,0x00,0x00,0x00,0x07,0x18,0x20,0x40,0x00},//(8 + {0x00,0x02,0x04,0x18,0xE0,0x00,0x00,0x00,0x00,0x40,0x20,0x18,0x07,0x00,0x00,0x00},//)9 + {0x40,0x40,0x80,0xF0,0x80,0x40,0x40,0x00,0x02,0x02,0x01,0x0F,0x01,0x02,0x02,0x00},//*10 + {0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x1F,0x01,0x01,0x01,0x00},//+11 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xB0,0x70,0x00,0x00,0x00,0x00,0x00},//,12 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01},//-13 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x00},//.14 + {0x00,0x00,0x00,0x00,0x80,0x60,0x18,0x04,0x00,0x60,0x18,0x06,0x01,0x00,0x00,0x00},///15 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x0F,0x10,0x20,0x20,0x10,0x0F,0x00},//016 + {0x00,0x10,0x10,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//117 + {0x00,0x70,0x08,0x08,0x08,0x88,0x70,0x00,0x00,0x30,0x28,0x24,0x22,0x21,0x30,0x00},//218 + {0x00,0x30,0x08,0x88,0x88,0x48,0x30,0x00,0x00,0x18,0x20,0x20,0x20,0x11,0x0E,0x00},//319 + {0x00,0x00,0xC0,0x20,0x10,0xF8,0x00,0x00,0x00,0x07,0x04,0x24,0x24,0x3F,0x24,0x00},//420 + {0x00,0xF8,0x08,0x88,0x88,0x08,0x08,0x00,0x00,0x19,0x21,0x20,0x20,0x11,0x0E,0x00},//521 + {0x00,0xE0,0x10,0x88,0x88,0x18,0x00,0x00,0x00,0x0F,0x11,0x20,0x20,0x11,0x0E,0x00},//622 + {0x00,0x38,0x08,0x08,0xC8,0x38,0x08,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00},//723 + {0x00,0x70,0x88,0x08,0x08,0x88,0x70,0x00,0x00,0x1C,0x22,0x21,0x21,0x22,0x1C,0x00},//824 + {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x00,0x31,0x22,0x22,0x11,0x0F,0x00},//925 + {0x00,0x00,0x00,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00},//:26 + {0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x00,0x00,0x00,0x00},//;27 + {0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x00},//<28 + {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x00},//=29 + {0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,0x20,0x10,0x08,0x04,0x02,0x01,0x00},//>30 + {0x00,0x70,0x48,0x08,0x08,0x08,0xF0,0x00,0x00,0x00,0x00,0x30,0x36,0x01,0x00,0x00},//?31 + {0xC0,0x30,0xC8,0x28,0xE8,0x10,0xE0,0x00,0x07,0x18,0x27,0x24,0x23,0x14,0x0B,0x00},//@32 + {0x00,0x00,0xC0,0x38,0xE0,0x00,0x00,0x00,0x20,0x3C,0x23,0x02,0x02,0x27,0x38,0x20},//A33 + {0x08,0xF8,0x88,0x88,0x88,0x70,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x11,0x0E,0x00},//B34 + {0xC0,0x30,0x08,0x08,0x08,0x08,0x38,0x00,0x07,0x18,0x20,0x20,0x20,0x10,0x08,0x00},//C35 + {0x08,0xF8,0x08,0x08,0x08,0x10,0xE0,0x00,0x20,0x3F,0x20,0x20,0x20,0x10,0x0F,0x00},//D36 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x20,0x23,0x20,0x18,0x00},//E37 + {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x00,0x03,0x00,0x00,0x00},//F38 + {0xC0,0x30,0x08,0x08,0x08,0x38,0x00,0x00,0x07,0x18,0x20,0x20,0x22,0x1E,0x02,0x00},//G39 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x20,0x3F,0x21,0x01,0x01,0x21,0x3F,0x20},//H40 + {0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//I41 + {0x00,0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00,0x00},//J42 + {0x08,0xF8,0x88,0xC0,0x28,0x18,0x08,0x00,0x20,0x3F,0x20,0x01,0x26,0x38,0x20,0x00},//K43 + {0x08,0xF8,0x08,0x00,0x00,0x00,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x20,0x30,0x00},//L44 + {0x08,0xF8,0xF8,0x00,0xF8,0xF8,0x08,0x00,0x20,0x3F,0x00,0x3F,0x00,0x3F,0x20,0x00},//M45 + {0x08,0xF8,0x30,0xC0,0x00,0x08,0xF8,0x08,0x20,0x3F,0x20,0x00,0x07,0x18,0x3F,0x00},//N46 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x10,0x20,0x20,0x20,0x10,0x0F,0x00},//O47 + {0x08,0xF8,0x08,0x08,0x08,0x08,0xF0,0x00,0x20,0x3F,0x21,0x01,0x01,0x01,0x00,0x00},//P48 + {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x18,0x24,0x24,0x38,0x50,0x4F,0x00},//Q49 + {0x08,0xF8,0x88,0x88,0x88,0x88,0x70,0x00,0x20,0x3F,0x20,0x00,0x03,0x0C,0x30,0x20},//R50 + {0x00,0x70,0x88,0x08,0x08,0x08,0x38,0x00,0x00,0x38,0x20,0x21,0x21,0x22,0x1C,0x00},//S51 + {0x18,0x08,0x08,0xF8,0x08,0x08,0x18,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//T52 + {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//U53 + {0x08,0x78,0x88,0x00,0x00,0xC8,0x38,0x08,0x00,0x00,0x07,0x38,0x0E,0x01,0x00,0x00},//V54 + {0xF8,0x08,0x00,0xF8,0x00,0x08,0xF8,0x00,0x03,0x3C,0x07,0x00,0x07,0x3C,0x03,0x00},//W55 + {0x08,0x18,0x68,0x80,0x80,0x68,0x18,0x08,0x20,0x30,0x2C,0x03,0x03,0x2C,0x30,0x20},//X56 + {0x08,0x38,0xC8,0x00,0xC8,0x38,0x08,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00},//Y57 + {0x10,0x08,0x08,0x08,0xC8,0x38,0x08,0x00,0x20,0x38,0x26,0x21,0x20,0x20,0x18,0x00},//Z58 + {0x00,0x00,0x00,0xFE,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x00},//[59 + {0x00,0x0C,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x06,0x38,0xC0,0x00},//\60 + {0x00,0x02,0x02,0x02,0xFE,0x00,0x00,0x00,0x00,0x40,0x40,0x40,0x7F,0x00,0x00,0x00},//]61 + {0x00,0x00,0x04,0x02,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//^62 + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80},//_63 + {0x00,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//`64 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x19,0x24,0x22,0x22,0x22,0x3F,0x20},//a65 + {0x08,0xF8,0x00,0x80,0x80,0x00,0x00,0x00,0x00,0x3F,0x11,0x20,0x20,0x11,0x0E,0x00},//b66 + {0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x0E,0x11,0x20,0x20,0x20,0x11,0x00},//c67 + {0x00,0x00,0x00,0x80,0x80,0x88,0xF8,0x00,0x00,0x0E,0x11,0x20,0x20,0x10,0x3F,0x20},//d68 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x22,0x22,0x22,0x22,0x13,0x00},//e69 + {0x00,0x80,0x80,0xF0,0x88,0x88,0x88,0x18,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//f70 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x6B,0x94,0x94,0x94,0x93,0x60,0x00},//g71 + {0x08,0xF8,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//h72 + {0x00,0x80,0x98,0x98,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//i73 + {0x00,0x00,0x00,0x80,0x98,0x98,0x00,0x00,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00},//j74 + {0x08,0xF8,0x00,0x00,0x80,0x80,0x80,0x00,0x20,0x3F,0x24,0x02,0x2D,0x30,0x20,0x00},//k75 + {0x00,0x08,0x08,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00},//l76 + {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x20,0x3F,0x20,0x00,0x3F,0x20,0x00,0x3F},//m77 + {0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20},//n78 + {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00},//o79 + {0x80,0x80,0x00,0x80,0x80,0x00,0x00,0x00,0x80,0xFF,0xA1,0x20,0x20,0x11,0x0E,0x00},//p80 + {0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x0E,0x11,0x20,0x20,0xA0,0xFF,0x80},//q81 + {0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x20,0x20,0x3F,0x21,0x20,0x00,0x01,0x00},//r82 + {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x33,0x24,0x24,0x24,0x24,0x19,0x00},//s83 + {0x00,0x80,0x80,0xE0,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x1F,0x20,0x20,0x00,0x00},//t84 + {0x80,0x80,0x00,0x00,0x00,0x80,0x80,0x00,0x00,0x1F,0x20,0x20,0x20,0x10,0x3F,0x20},//u85 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x00,0x01,0x0E,0x30,0x08,0x06,0x01,0x00},//v86 + {0x80,0x80,0x00,0x80,0x00,0x80,0x80,0x80,0x0F,0x30,0x0C,0x03,0x0C,0x30,0x0F,0x00},//w87 + {0x00,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x31,0x2E,0x0E,0x31,0x20,0x00},//x88 + {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x80,0x81,0x8E,0x70,0x18,0x06,0x01,0x00},//y89 + {0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x21,0x30,0x2C,0x22,0x21,0x30,0x00},//z90 + {0x00,0x00,0x00,0x00,0x80,0x7C,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x3F,0x40,0x40},//{91 + {0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00},//|92 + {0x00,0x02,0x02,0x7C,0x80,0x00,0x00,0x00,0x00,0x40,0x40,0x3F,0x00,0x00,0x00,0x00},//}93 + {0x00,0x06,0x01,0x01,0x02,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},//~94 +}; +const unsigned char hz_1616[][32]={ +{0x02,0x00,0x02,0x00,0xE2,0xFF,0x22,0x42,0x22,0x42,0x32,0x42,0x2A,0x42,0x26,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0x22,0x42,0xE2,0xFF,0x02,0x00,0x02,0x00,0x00,0x00},/*"百",0*/ +{0x00,0x00,0xF8,0xFF,0x01,0x00,0x02,0x00,0x00,0x00,0xE2,0x1F,0x22,0x08,0x22,0x08,0x22,0x08,0xE2,0x1F,0x02,0x00,0x02,0x40,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"问",1*/ +{0x00,0x00,0xFE,0xFF,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x0E,0x02,0x10,0x22,0x08,0x42,0x06,0x82,0x01,0x72,0x4E,0x02,0x80,0xFE,0x7F,0x00,0x00,0x00,0x00},/*"网",2*/ +}; +#endif