From c91c43cd1e64d830b12731d39a5301f5bdf4e75f Mon Sep 17 00:00:00 2001
From: Harshitha Sai Neelati <hsaineel@qti.qualcomm.com>
Date: Thu, 22 Sep 2022 11:49:28 +0530
Subject: [PATCH] ARM: dts: msm: Fix qdss reg programming for diwali

Fix the qdss register programming for diwali GPU.

Change-Id: I9d887fda5925fc5866371ed7f9888425ba74884e
---
 qcom/diwali-gpu.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/diwali-gpu.dtsi b/qcom/diwali-gpu.dtsi
index af8deb26..7da4412d 100644
--- a/qcom/diwali-gpu.dtsi
+++ b/qcom/diwali-gpu.dtsi
@@ -7,7 +7,7 @@
 		status = "ok";
 
 		reg = <0x3d00000 0x40000>, <0x3d61000 0x800>,
-			<0x3de0000 0x10000>, <0x06900000 0x80000>;
+			<0x3de0000 0x10000>, <0x10900000 0x80000>;
 
 		reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "rscc",
 			"qdss_gfx";