mirror of
https://github.com/oplus-giulia-dev/android_kernel_oneplus_sm8650-devicetrees
synced 2025-11-04 06:44:04 +08:00
Add 'qcom/video/' from commit '1e57f1f770b750479a3d8bd00e488dab19b025be'
git-subtree-dir: qcom/video git-subtree-mainline:302ce09779git-subtree-split:1e57f1f770
This commit is contained in:
Arian
26
qcom/video/Kbuild
Normal file
26
qcom/video/Kbuild
Normal file
@@ -0,0 +1,26 @@
|
||||
|
||||
ifeq ($(CONFIG_ARCH_WAIPIO), y)
|
||||
dtbo-y += waipio-vidc.dtbo
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_KALAMA), y)
|
||||
dtbo-y += kalama-vidc.dtbo
|
||||
dtbo-y += kalama-vidc-v2.dtbo
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
|
||||
dtbo-y += pineapple-vidc.dtbo
|
||||
dtbo-y += pineapple-vidc-v2.dtbo
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_CLIFFS), y)
|
||||
dtbo-y += cliffs-vidc.dtbo
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_VOLCANO), y)
|
||||
dtbo-y += volcano-vidc.dtbo
|
||||
endif
|
||||
|
||||
always-y := $(dtb-y) $(dtbo-y)
|
||||
subdir-y := $(dts-dirs)
|
||||
clean-files := *.dtb *.dtbo
|
||||
9
qcom/video/Makefile
Normal file
9
qcom/video/Makefile
Normal file
@@ -0,0 +1,9 @@
|
||||
KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
|
||||
|
||||
all: dtbs
|
||||
|
||||
clean:
|
||||
$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
|
||||
|
||||
%:
|
||||
$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
|
||||
15
qcom/video/cliffs-vidc.dts
Normal file
15
qcom/video/cliffs-vidc.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-cliffs.h>
|
||||
#include <dt-bindings/interconnect/qcom,cliffs.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||
#include "cliffs-vidc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. cliffs";
|
||||
compatible = "qcom,cliffs";
|
||||
qcom,msm-id = <614 0x10000>, <632 0x10000>, <642 0x10000>, <643 0x10000>, <700 0x10000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
109
qcom/video/cliffs-vidc.dtsi
Normal file
109
qcom/video/cliffs-vidc.dtsi
Normal file
@@ -0,0 +1,109 @@
|
||||
&soc {
|
||||
msm_vidc: qcom,vidc@aa00000 {
|
||||
compatible = "qcom,cliffs-vidc";
|
||||
status = "okay";
|
||||
|
||||
/* IOMMU Config */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x0aa00000 0xF0000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* Supply */
|
||||
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clocks =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||
clock-names =
|
||||
"gcc_video_axi0_clk",
|
||||
"video_cc_mvs0c_clk",
|
||||
"video_cc_mvs0_clk",
|
||||
"video_cc_mvs0_clk_src";
|
||||
|
||||
/* Bus Interconnects */
|
||||
interconnects =
|
||||
<&gem_noc MASTER_APPSS_PROC &cnoc_cfg SLAVE_VENUS_CFG>,
|
||||
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||
<&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>;
|
||||
interconnect-names =
|
||||
"venus-cnoc",
|
||||
"venus-ddr",
|
||||
"venus-llcc";
|
||||
|
||||
/* FW load region */
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
/* Clock Resets */
|
||||
resets =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_XO_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_ARES>;
|
||||
reset-names =
|
||||
"video_axi_reset",
|
||||
"video_xo_reset",
|
||||
"video_mvs0c_reset",
|
||||
"video_mvs0_reset";
|
||||
|
||||
/* MMUs */
|
||||
non_secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-ns-pxl";
|
||||
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
/* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */
|
||||
qcom,iova-max-align-shift = <8>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
non_secure_cb {
|
||||
compatible = "qcom,vidc,cb-ns";
|
||||
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
secure_non_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_bitstream_cb {
|
||||
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-pxl";
|
||||
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
};
|
||||
};
|
||||
15
qcom/video/kalama-vidc-v2.dts
Normal file
15
qcom/video/kalama-vidc-v2.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||
#include "kalama-vidc-v2.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kalama";
|
||||
compatible = "qcom,kalama";
|
||||
qcom,msm-id = <519 0x20000>, <536 0x20000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
8
qcom/video/kalama-vidc-v2.dtsi
Normal file
8
qcom/video/kalama-vidc-v2.dtsi
Normal file
@@ -0,0 +1,8 @@
|
||||
|
||||
#include "kalama-vidc.dtsi"
|
||||
|
||||
/* KalamaV2-specific changes */
|
||||
&msm_vidc {
|
||||
compatible = "qcom,sm8550-vidc-v2";
|
||||
};
|
||||
|
||||
15
qcom/video/kalama-vidc.dts
Normal file
15
qcom/video/kalama-vidc.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||
#include "kalama-vidc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kalama";
|
||||
compatible = "qcom,kalama";
|
||||
qcom,msm-id = <519 0x10000>, <536 0x10000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
89
qcom/video/kalama-vidc.dtsi
Normal file
89
qcom/video/kalama-vidc.dtsi
Normal file
@@ -0,0 +1,89 @@
|
||||
&soc {
|
||||
msm_vidc: qcom,vidc@aa00000 {
|
||||
compatible = "qcom,sm8550-vidc";
|
||||
status = "okay";
|
||||
|
||||
/* IOMMU Config */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x0aa00000 0xF0000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* Supply */
|
||||
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||
clock-names =
|
||||
"gcc_video_axi0",
|
||||
"core_clk",
|
||||
"vcodec_clk",
|
||||
"video_cc_mvs0_clk_src";
|
||||
|
||||
/* Bus Interconnects */
|
||||
interconnects =
|
||||
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||
<&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>;
|
||||
interconnect-names =
|
||||
"venus-cnoc",
|
||||
"venus-ddr",
|
||||
"venus-llcc";
|
||||
|
||||
/* FW load region */
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
/* Clock Resets */
|
||||
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
|
||||
reset-names = "video_axi_reset";
|
||||
|
||||
/* MMUs */
|
||||
non_secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-ns-pxl";
|
||||
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
non_secure_cb {
|
||||
compatible = "qcom,vidc,cb-ns";
|
||||
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
secure_non_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_bitstream_cb {
|
||||
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-pxl";
|
||||
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
qcom/video/pineapple-vidc-v2.dts
Normal file
16
qcom/video/pineapple-vidc-v2.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||
#include "pineapple-vidc-v2.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. pineapple";
|
||||
compatible = "qcom,pineapple";
|
||||
qcom,msm-id = <557 0x20000>, <577 0x20000>, <682 0x20000>, <696 0x20000>,
|
||||
<645 0x20000>, <646 0x20000>, <702 0x20000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
8
qcom/video/pineapple-vidc-v2.dtsi
Normal file
8
qcom/video/pineapple-vidc-v2.dtsi
Normal file
@@ -0,0 +1,8 @@
|
||||
|
||||
#include "pineapple-vidc.dtsi"
|
||||
|
||||
/* Pineapple V2-specific changes */
|
||||
&msm_vidc {
|
||||
compatible = "qcom,sm8650-vidc-v2";
|
||||
};
|
||||
|
||||
16
qcom/video/pineapple-vidc.dts
Normal file
16
qcom/video/pineapple-vidc.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||
#include "pineapple-vidc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Pineapple";
|
||||
compatible = "qcom,pineapple";
|
||||
qcom,msm-id = <557 0x10000>, <577 0x10000>, <682 0x10000>, <696 0x10000>,
|
||||
<645 0x10000>, <646 0x10000>, <702 0x10000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
109
qcom/video/pineapple-vidc.dtsi
Executable file
109
qcom/video/pineapple-vidc.dtsi
Executable file
@@ -0,0 +1,109 @@
|
||||
&soc {
|
||||
msm_vidc: qcom,vidc@aa00000 {
|
||||
compatible = "qcom,sm8650-vidc";
|
||||
status = "okay";
|
||||
|
||||
/* IOMMU Config */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x0aa00000 0xF0000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* Supply */
|
||||
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clocks =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||
clock-names =
|
||||
"gcc_video_axi0_clk",
|
||||
"video_cc_mvs0c_clk",
|
||||
"video_cc_mvs0_clk",
|
||||
"video_cc_mvs0_clk_src";
|
||||
|
||||
/* Bus Interconnects */
|
||||
interconnects =
|
||||
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||
<&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>;
|
||||
interconnect-names =
|
||||
"venus-cnoc",
|
||||
"venus-ddr",
|
||||
"venus-llcc";
|
||||
|
||||
/* FW load region */
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
/* Clock Resets */
|
||||
resets =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_XO_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_ARES>;
|
||||
reset-names =
|
||||
"video_axi_reset",
|
||||
"video_xo_reset",
|
||||
"video_mvs0c_reset",
|
||||
"video_mvs0_reset";
|
||||
|
||||
/* MMUs */
|
||||
non_secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-ns-pxl";
|
||||
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
/* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */
|
||||
qcom,iova-max-align-shift = <8>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
non_secure_cb {
|
||||
compatible = "qcom,vidc,cb-ns";
|
||||
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
secure_non_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_bitstream_cb {
|
||||
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-pxl";
|
||||
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
qcom/video/volcano-vidc.dts
Normal file
16
qcom/video/volcano-vidc.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-volcano.h>
|
||||
#include <dt-bindings/interconnect/qcom,volcano.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-volcano.h>
|
||||
#include "volcano-vidc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. volcano";
|
||||
compatible = "qcom,volcano";
|
||||
qcom,msm-id = <636 0x10000>, <640 0x10000>, <641 0x10000>, <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
|
||||
103
qcom/video/volcano-vidc.dtsi
Normal file
103
qcom/video/volcano-vidc.dtsi
Normal file
@@ -0,0 +1,103 @@
|
||||
&soc {
|
||||
msm_vidc: qcom,vidc@aa00000 {
|
||||
compatible = "qcom,volcano-vidc";
|
||||
status = "okay";
|
||||
|
||||
/* IOMMU Config */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x0aa00000 0xF0000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* Supply */
|
||||
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clocks =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||
clock-names =
|
||||
"gcc_video_axi0_clk",
|
||||
"video_cc_mvs0c_clk",
|
||||
"video_cc_mvs0_clk",
|
||||
"video_cc_mvs0_clk_src";
|
||||
|
||||
/* Bus Interconnects */
|
||||
interconnects =
|
||||
<&gem_noc MASTER_APPSS_PROC &cnoc_cfg SLAVE_VENUS_CFG>,
|
||||
<&mmss_noc MASTER_VIDEO &mc_virt SLAVE_EBI1>;
|
||||
interconnect-names =
|
||||
"venus-cnoc",
|
||||
"venus-ddr";
|
||||
|
||||
/* FW load region */
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
/* Clock Resets */
|
||||
resets =
|
||||
<&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names =
|
||||
"video_axi_reset",
|
||||
"video_mvs0c_reset";
|
||||
|
||||
/* MMUs */
|
||||
non_secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-ns-pxl";
|
||||
iommus = <&apps_smmu 0x1967 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
/* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */
|
||||
qcom,iova-max-align-shift = <8>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
non_secure_cb {
|
||||
compatible = "qcom,vidc,cb-ns";
|
||||
iommus = <&apps_smmu 0x1960 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
secure_non_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||
iommus = <&apps_smmu 0x1964 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_bitstream_cb {
|
||||
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||
iommus = <&apps_smmu 0x1961 0x0004>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-pxl";
|
||||
iommus = <&apps_smmu 0x1963 0x0000>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
qcom,iova-best-fit;
|
||||
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
qcom/video/waipio-vidc.dts
Normal file
16
qcom/video/waipio-vidc.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-waipio.h>
|
||||
#include <dt-bindings/interconnect/qcom,waipio.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-waipio.h>
|
||||
#include "waipio-vidc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. waipio v1 SoC";
|
||||
compatible = "qcom,waipio";
|
||||
qcom,msm-id = <457 0x10000>, <482 0x10000>,
|
||||
<457 0x20000>, <482 0x20000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
98
qcom/video/waipio-vidc.dtsi
Normal file
98
qcom/video/waipio-vidc.dtsi
Normal file
@@ -0,0 +1,98 @@
|
||||
&soc {
|
||||
msm_vidc: qcom,vidc@aa00000 {
|
||||
compatible = "qcom,sm8450-vidc";
|
||||
status = "okay";
|
||||
|
||||
/* IOMMU Config */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x0aa00000 0xF0000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* Supply */
|
||||
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS0_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||
clock-names =
|
||||
"gcc_video_axi0",
|
||||
"core_clk",
|
||||
"vcodec_clk",
|
||||
"video_cc_mvs0_clk_src";
|
||||
|
||||
/* Bus Interconnects */
|
||||
interconnects =
|
||||
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 &gem_noc SLAVE_LLCC>;
|
||||
interconnect-names =
|
||||
"venus-cnoc",
|
||||
"venus-ddr",
|
||||
"venus-llcc";
|
||||
|
||||
/* FW load region */
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
/* Clock Resets */
|
||||
resets =
|
||||
<&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names =
|
||||
"video_axi_reset",
|
||||
"video_core_reset";
|
||||
|
||||
/* MMUs */
|
||||
non_secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-ns-pxl";
|
||||
iommus = <&apps_smmu 0x2187 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||
qcom,iommu-pagetable = "LLC";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
non_secure_cb {
|
||||
compatible = "qcom,vidc,cb-ns";
|
||||
iommus = <&apps_smmu 0x2180 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||
qcom,iommu-pagetable = "LLC";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
secure_non_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||
iommus = <&apps_smmu 0x2184 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||
qcom,iommu-pagetable = "LLC";
|
||||
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_bitstream_cb {
|
||||
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||
iommus = <&apps_smmu 0x2181 0x0404>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-pagetable = "LLC";
|
||||
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
|
||||
secure_pixel_cb {
|
||||
compatible = "qcom,vidc,cb-sec-pxl";
|
||||
iommus = <&apps_smmu 0x2183 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-pagetable = "LLC";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
qcom,secure-context-bank;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user