mirror of
https://github.com/oplus-giulia-dev/android_kernel_oneplus_sm8650-devicetrees
synced 2025-11-04 06:44:04 +08:00
Add 'qcom/eva/' from commit '95f0caab44029b729676a6fbcd0e0b3acd3db051'
git-subtree-dir: qcom/eva git-subtree-mainline:131cd7c7d5git-subtree-split:95f0caab44
This commit is contained in:
Arian
35
qcom/eva/Kbuild
Normal file
35
qcom/eva/Kbuild
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@@ -0,0 +1,35 @@
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ifneq ($(CONFIG_ARCH_QTI_VM), y)
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ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
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dtbo-y += pineapple-eva.dtbo
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dtbo-y += pineapple-eva-v2.dtbo
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endif
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ifeq ($(CONFIG_ARCH_CLIFFS), y)
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dtbo-y += cliffs-eva.dtbo
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endif
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ifeq ($(CONFIG_ARCH_KALAMA), y)
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dtbo-y += kalama-eva.dtbo
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endif
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ifeq ($(CONFIG_ARCH_WAIPIO), y)
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dtbo-y += waipio-eva.dtbo
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endif
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ifeq ($(CONFIG_ARCH_CAPE), y)
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dtbo-y += cape-eva.dtbo
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endif
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else
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ifeq ($(CONFIG_ARCH_KALAMA), y)
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dtbo-y += trustedvm-kalama-eva-mtp.dtbo \
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trustedvm-kalama-eva-qrd.dtbo
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endif
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endif
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always-y := $(dtb-y) $(dtbo-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb *.dtbo
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9
qcom/eva/Makefile
Normal file
9
qcom/eva/Makefile
Normal file
@@ -0,0 +1,9 @@
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KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
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all: dtbs
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clean:
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$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
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%:
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$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
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156
qcom/eva/bindings/msm-eva.txt
Normal file
156
qcom/eva/bindings/msm-eva.txt
Normal file
@@ -0,0 +1,156 @@
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* Qualcomm Technologies, Inc. MSM CVP
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[Root level node]
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cvp
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=====
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Required properties:
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- compatible : one of:
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- "qcom,msm-cvp"
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- "qcom,pineapple-cvp" : Invokes driver specific data for pineapple
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- "qcom,kalama-cvp" : Invokes driver specific data for kalama
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- "qcom,waipio-cvp" : Invokes driver specific data for waipio
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- "qcom,lahaina-cvp" : Invokes driver specific data for Lahaina.
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- "qcom,kona-cvp" : Invokes driver specific data for kona.
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Optional properties:
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- reg : offset and length of the CSR register set for the device.
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- interrupts : should contain the cvp interrupt.
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- qcom,reg-presets : list of offset-value pairs for registers to be written.
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The offsets are from the base offset specified in 'reg'. This is mainly
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used for QoS, VBIF, etc. presets for video.
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- qcom,qdss-presets : list of physical address and memory allocation size pairs.
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when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be
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written to QDSS memory.
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- *-supply: A phandle pointing to the appropriate regulator. Number of
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regulators vary across targets.
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- clock-names: an array of clocks that the driver is supposed to be
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manipulating. The clocks names here correspond to the clock names used in
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clk_get(<name>).
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- qcom,clock-configs = an array of bitmaps of clocks' configurations. The index
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of the bitmap corresponds to the clock at the same index in qcom,clock-names.
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The bitmaps describes the actions that the device needs to take regarding the
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clock (i.e. scale it based on load).
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The bitmap is defined as:
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scalable = 0x1 (if the driver should vary the clock's frequency based on load)
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- qcom,allowed-clock-rates = an array of supported clock rates by the chipset.
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- qcom,use-non-secure-pil = A bool indicating which type of pil to use to load
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the fw.
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- qcom,fw-bias = The address at which cvp fw is loaded (manually).
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[Second level nodes]
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Context Banks
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=============
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Required properties:
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- compatible : one of:
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- "qcom,msm-cvp,context-bank"
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- iommus : A phandle parsed by smmu driver. Number of entries will vary
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across targets.
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Optional properties:
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- label - string describing iommu domain usage.
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- buffer-types : bitmap of buffer types that can be mapped into the current
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IOMMU domain.
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- Buffer types are defined as the following:
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input = 0x1
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output = 0x2
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output2 = 0x4
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extradata input = 0x8
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extradata output = 0x10
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extradata output2 = 0x20
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internal scratch = 0x40
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internal scratch1 = 0x80
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internal scratch2 = 0x100
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internal persist = 0x200
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internal persist1 = 0x400
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internal cmd queue = 0x800
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- virtual-addr-pool : offset and length of virtual address pool.
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- qcom,fw-context-bank : bool indicating firmware context bank.
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- qcom,secure-context-bank : bool indicating secure context bank.
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Buses
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=====
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Required properties:
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- compatible : one of:
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- "qcom,msm-cvp,bus"
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- label : an arbitrary name
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- qcom,bus-master : an integer descriptor of the bus master. Refer to arch/arm/\
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boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable masters
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- qcom,bus-slave : an integer descriptor of the bus slave. Refer to arch/arm/\
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boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable slaves
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Optional properties:
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- qcom,bus-governor : governor to use when scaling bus, generally any commonly
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found devfreq governor might be used. In addition to those governors, the
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custom Venus governors, "msm-vidc-ddr" or "msm-vidc-llcc" are also
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acceptable values.
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In the absence of this property the "performance" governor is used.
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- qcom,bus-rage-kbps : an array of two items (<min max>) that indicate the
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minimum and maximum acceptable votes for the bus.
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In the absence of this property <0 INT_MAX> is used.
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- qcom,ubwc-10bit : UBWC 10 bit content has different bus requirements,
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this tag will be used to pick the appropriate bus as per the session profile
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as shown below in example.
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Memory Heaps
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============
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Required properties:
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- compatible : one of:
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- "qcom,msm-vidc,mem-cdsp"
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- memory-region : phandle to the memory heap/region.
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Example:
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msm_cvp: qcom,cvp@ab00000 {
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compatible = "qcom,msm-cvp", "qcom,Lahaina-cvp";
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status = "ok";
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reg = <0xab00000 0x100000>;
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interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
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/* FIXME: LLCC Info */
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/* cache-slice-names = "vidsc0", "vidsc1"; */
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/* cache-slices = <&llcc 2>, <&llcc 3>; */
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/* Supply */
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cvp-supply = <&mvs1_gdsc>;
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/* Clocks */
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clock-names = "gcc_video_axi0",
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"gcc_video_axi1", "cvp_clk";
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clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
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<&clock_gcc GCC_VIDEO_AXI1_CLK>,
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<&clock_videocc VIDEO_CC_MVS1_CLK>;
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qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
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"cvp_clk";
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qcom,clock-configs = <0x0 0x0 0x1>;
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qcom,allowed-clock-rates = <403000000 520000000
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549000000 666000000 800000000>;
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/* Buses */
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bus_cnoc {
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compatible = "qcom,msm-cvp,bus";
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label = "cnoc";
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qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
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qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
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qcom,bus-governor = "performance";
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qcom,bus-range-kbps = <1000 1000>;
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};
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/* MMUs */
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non_secure_cb {
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compatible = "qcom,msm-cvp,context-bank";
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label = "cvp_hlos";
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iommus =
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<&apps_smmu 0x2120 0x400>;
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qcom,iommu-dma = "disabled";
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buffer-types = <0xfff>;
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virtual-addr-pool = <0x4b000000 0xe0000000>;
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};
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/* Memory Heaps */
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qcom,msm-cvp,mem_cdsp {
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compatible = "qcom,msm-cvp,mem-cdsp";
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memory-region = <&cdsp_mem>;
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};
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};
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17
qcom/eva/cliffs-eva.dts
Normal file
17
qcom/eva/cliffs-eva.dts
Normal file
@@ -0,0 +1,17 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/soc/qcom,ipcc.h>
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#include <dt-bindings/interconnect/qcom,cliffs.h>
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#include <dt-bindings/clock/qcom,videocc-pineapple.h>
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#include <dt-bindings/clock/qcom,gcc-cliffs.h>
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#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
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#include "cliffs-eva.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. cliffs";
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compatible = "qcom,cliffs";
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qcom,msm-id = <614 0x10000>, <632 0x10000>, <642 0x10000>, <643 0x10000>;
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qcom,board-id = <0 0>;
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};
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133
qcom/eva/cliffs-eva.dtsi
Normal file
133
qcom/eva/cliffs-eva.dtsi
Normal file
@@ -0,0 +1,133 @@
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&soc {
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msm_cvp: qcom,cvp@ab00000 {
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compatible = "qcom,msm-cvp", "qcom,cliffs-cvp";
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status = "ok";
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reg = <0xab00000 0x100000>;
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interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
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/* Supply */
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cvp-supply = <&video_cc_mvs1c_gdsc>;
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cvp-core-supply = <&video_cc_mvs1_gdsc>;
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/* Clocks */
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clock-names = "gcc_video_axi1", "sleep_clk", "cvp_clk", "core_clk",
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"video_cc_mvs1_clk_src";
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clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_SLEEP_CLK VIDEO_CC_MVS1C_CLK
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VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
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clocks = <&gcc GCC_VIDEO_AXI1_CLK>,
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<&videocc VIDEO_CC_SLEEP_CLK>,
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<&videocc VIDEO_CC_MVS1C_CLK>,
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<&videocc VIDEO_CC_MVS1_CLK>,
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<&videocc VIDEO_CC_MVS1_CLK_SRC>;
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qcom,proxy-clock-names = "gcc_video_axi1", "sleep_clk",
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"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
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qcom,clock-configs = <0x0 0x0 0x0 0x0 0x1>;
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qcom,allowed-clock-rates = <280000000 350000000 450000000 500000000 550000000>;
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resets = <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
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<&videocc VIDEO_CC_XO_CLK_ARES>,
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<&videocc VIDEO_CC_MVS1C_CLK_ARES>;
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reset-names = "cvp_axi_reset", "cvp_xo_reset","cvp_core_reset";
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reset-power-status = <0x0 0x1 0x0>;
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qcom,reg-presets = <0xB0088 0x0>;
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qcom,ipcc-reg = <0x400000 0x100000>;
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qcom,gcc-reg = <0x110000 0x40000>;
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pas-id = <26>;
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memory-region = <&cvp_mem>;
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/* UC region mapping */
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ipclite_mappings = <0xFE500000 0x100000 0x82600000>;
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/* DEVICE mapping */
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aon_timer_mappings = <0xFFA00000 0x1000 0xc220000>;
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/* DEVICE mapping */
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hwmutex_mappings = <0xFFB00000 0x2000 0x1f4a000>;
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/* DEVICE mapping */
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aon_mappings = <0xFF80F000 0x1000 0x0ABE0000>;
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||||
/* CVP Firmware ELF image name */
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cvp,firmware-name = "evass-lt";
|
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/* Buses */
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cvp_cnoc {
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compatible = "qcom,msm-cvp,bus";
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||||
label = "cvp-cnoc";
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||||
qcom,bus-master = <MASTER_APPSS_PROC>;
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qcom,bus-slave = <SLAVE_VENUS_CFG>;
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||||
qcom,bus-governor = "performance";
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||||
qcom,bus-range-kbps = <1000 1000>;
|
||||
};
|
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||||
cvp_bus_ddr {
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||||
compatible = "qcom,msm-cvp,bus";
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||||
label = "cvp-ddr";
|
||||
qcom,bus-master = <MASTER_VIDEO_PROC>;
|
||||
qcom,bus-slave = <SLAVE_EBI1>;
|
||||
qcom,bus-governor = "performance";
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||||
qcom,bus-range-kbps = <1000 6533000>;
|
||||
};
|
||||
|
||||
/* MMUs */
|
||||
/* Camera cb is used to get secure camera buffer IPA */
|
||||
cvp_camera_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_camera";
|
||||
buffer-types = <0xfff>;
|
||||
qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_EVA_CB>;
|
||||
};
|
||||
|
||||
non_secure_cb_group: cvp_non_secure_cb_group {
|
||||
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
};
|
||||
|
||||
cvp_non_secure_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_hlos";
|
||||
iommus =
|
||||
<&apps_smmu 0x1920 0x0000>;
|
||||
buffer-types = <0xfff>;
|
||||
dma-coherent;
|
||||
qcom,iommu-group = <&non_secure_cb_group>;
|
||||
};
|
||||
|
||||
|
||||
cvp_secure_nonpixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_nonpixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1924 0x0000>;
|
||||
buffer-types = <0x741>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
|
||||
qcom,iommu-vmid = <0xB>;
|
||||
};
|
||||
|
||||
cvp_secure_pixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_pixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1923 0x0000>;
|
||||
buffer-types = <0x106>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
|
||||
qcom,iommu-vmid = <0xA>;
|
||||
};
|
||||
|
||||
cvp_dsp_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_dsp";
|
||||
iommus =
|
||||
<&apps_smmu 0x1920 0x0000>;
|
||||
buffer-types = <0xfff>;
|
||||
qcom,iommu-group = <&non_secure_cb_group>;
|
||||
};
|
||||
|
||||
/* Memory Heaps */
|
||||
qcom,msm-cvp,mem_cdsp {
|
||||
compatible = "qcom,msm-cvp,mem-cdsp";
|
||||
memory-region = <&cdsp_eva_mem>;
|
||||
};
|
||||
};
|
||||
};
|
||||
110
qcom/eva/eva/waipio-eva.dtsi
Normal file
110
qcom/eva/eva/waipio-eva.dtsi
Normal file
@@ -0,0 +1,110 @@
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,waipio.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-waipio.h>
|
||||
|
||||
&soc {
|
||||
msm_cvp: qcom,cvp@ab00000 {
|
||||
compatible = "qcom,msm-cvp", "qcom,waipio-cvp";
|
||||
status = "ok";
|
||||
reg = <0xab00000 0x100000>;
|
||||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* LLCC Cache */
|
||||
cache-slice-names = "cvp";
|
||||
|
||||
/* Supply */
|
||||
cvp-supply = <&video_cc_mvs1c_gdsc>;
|
||||
cvp-core-supply = <&video_cc_mvs1_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clock-names = "gcc_video_axi1", "cvp_clk", "core_clk",
|
||||
"video_cc_mvs1_clk_src";
|
||||
clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_MVS1C_CLK
|
||||
VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
|
||||
clocks = <&clock_gcc GCC_VIDEO_AXI1_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1C_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1_CLK_SRC>;
|
||||
qcom,proxy-clock-names = "gcc_video_axi1",
|
||||
"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
|
||||
|
||||
qcom,clock-configs = <0x0 0x0 0x0 0x1>;
|
||||
qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
|
||||
|
||||
resets = <&clock_gcc GCC_VIDEO_AXI1_CLK_ARES>,
|
||||
<&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>;
|
||||
reset-names = "cvp_axi_reset", "cvp_core_reset";
|
||||
reset-power-status = <0x2 0x2>;
|
||||
|
||||
qcom,reg-presets = <0xB0088 0x0>;
|
||||
qcom,ipcc-reg = <0x400000 0x100000>;
|
||||
qcom,gcc-reg = <0x110000 0x40000>;
|
||||
|
||||
pas-id = <26>;
|
||||
memory-region = <&cvp_mem>;
|
||||
|
||||
/* CVP Firmware ELF image name */
|
||||
cvp,firmware-name = "evass";
|
||||
|
||||
/* Buses */
|
||||
cvp_cnoc {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-cnoc";
|
||||
qcom,bus-master = <MASTER_APPSS_PROC>;
|
||||
qcom,bus-slave = <SLAVE_VENUS_CFG>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 1000>;
|
||||
};
|
||||
|
||||
cvp_bus_ddr {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-ddr";
|
||||
qcom,bus-master = <MASTER_VIDEO_PROC>;
|
||||
qcom,bus-slave = <SLAVE_EBI1>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 6533000>;
|
||||
};
|
||||
|
||||
/* MMUs */
|
||||
cvp_non_secure_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_hlos";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a0 0x400>;
|
||||
buffer-types = <0xfff>;
|
||||
dma-coherent;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
|
||||
};
|
||||
|
||||
|
||||
cvp_secure_nonpixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_nonpixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a4 0x400>;
|
||||
buffer-types = <0x741>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
|
||||
qcom,iommu-vmid = <0xB>;
|
||||
};
|
||||
|
||||
cvp_secure_pixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_pixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a3 0x400>;
|
||||
buffer-types = <0x106>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
|
||||
qcom,iommu-vmid = <0xA>;
|
||||
};
|
||||
|
||||
/* Memory Heaps */
|
||||
qcom,msm-cvp,mem_cdsp {
|
||||
compatible = "qcom,msm-cvp,mem-cdsp";
|
||||
memory-region = <&cdsp_eva_mem>;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
qcom/eva/kalama-eva.dts
Normal file
16
qcom/eva/kalama-eva.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include "kalama-eva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. kalama v1 SoC";
|
||||
compatible = "qcom,kalama";
|
||||
qcom,msm-id = <519 0x10000>, <536 0x10000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
105
qcom/eva/kalama-eva.dtsi
Normal file
105
qcom/eva/kalama-eva.dtsi
Normal file
@@ -0,0 +1,105 @@
|
||||
&soc {
|
||||
msm_cvp: qcom,cvp@ab00000 {
|
||||
compatible = "qcom,msm-cvp", "qcom,kalama-cvp";
|
||||
status = "ok";
|
||||
reg = <0xab00000 0x100000>;
|
||||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* LLCC Cache */
|
||||
cache-slice-names = "cvp";
|
||||
|
||||
/* Supply */
|
||||
cvp-supply = <&video_cc_mvs1c_gdsc>;
|
||||
cvp-core-supply = <&video_cc_mvs1_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clock-names = "gcc_video_axi1", "cvp_clk", "core_clk",
|
||||
"video_cc_mvs1_clk_src";
|
||||
clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_MVS1C_CLK
|
||||
VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
|
||||
clocks = <&gcc GCC_VIDEO_AXI1_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1_CLK_SRC>;
|
||||
qcom,proxy-clock-names = "gcc_video_axi1",
|
||||
"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
|
||||
|
||||
qcom,clock-configs = <0x0 0x0 0x0 0x1>;
|
||||
qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
|
||||
|
||||
resets = <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS1C_CLK_ARES>;
|
||||
reset-names = "cvp_axi_reset", "cvp_core_reset";
|
||||
reset-power-status = <0x2 0x2>;
|
||||
|
||||
qcom,reg-presets = <0xB0088 0x0>;
|
||||
qcom,ipcc-reg = <0x400000 0x100000>;
|
||||
qcom,gcc-reg = <0x110000 0x40000>;
|
||||
|
||||
pas-id = <26>;
|
||||
memory-region = <&cvp_mem>;
|
||||
|
||||
/* CVP Firmware ELF image name */
|
||||
cvp,firmware-name = "evass";
|
||||
|
||||
/* Buses */
|
||||
cvp_cnoc {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-cnoc";
|
||||
qcom,bus-master = <MASTER_APPSS_PROC>;
|
||||
qcom,bus-slave = <SLAVE_VENUS_CFG>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 1000>;
|
||||
};
|
||||
|
||||
cvp_bus_ddr {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-ddr";
|
||||
qcom,bus-master = <MASTER_VIDEO_PROC>;
|
||||
qcom,bus-slave = <SLAVE_EBI1>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 6533000>;
|
||||
};
|
||||
|
||||
/* MMUs */
|
||||
cvp_non_secure_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_hlos";
|
||||
iommus =
|
||||
<&apps_smmu 0x1920 0x0000>;
|
||||
buffer-types = <0xfff>;
|
||||
dma-coherent;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
|
||||
};
|
||||
|
||||
|
||||
cvp_secure_nonpixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_nonpixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1924 0x0000>;
|
||||
buffer-types = <0x741>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
|
||||
qcom,iommu-vmid = <0xB>;
|
||||
};
|
||||
|
||||
cvp_secure_pixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_pixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1923 0x0000>;
|
||||
buffer-types = <0x106>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
|
||||
qcom,iommu-vmid = <0xA>;
|
||||
};
|
||||
|
||||
/* Memory Heaps */
|
||||
qcom,msm-cvp,mem_cdsp {
|
||||
compatible = "qcom,msm-cvp,mem-cdsp";
|
||||
memory-region = <&cdsp_eva_mem>;
|
||||
};
|
||||
};
|
||||
};
|
||||
17
qcom/eva/pineapple-eva-v2.dts
Normal file
17
qcom/eva/pineapple-eva-v2.dts
Normal file
@@ -0,0 +1,17 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||
#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
|
||||
#include "pineapple-eva-v2.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. pineapple v2 SoC";
|
||||
compatible = "qcom,pineapple";
|
||||
qcom,msm-id = <557 0x20000>, <577 0x20000>, <696 0x20000>;
|
||||
qcom,board-id = <0 0>, <15 0>, <8 0>, <11 0>, <1 0>;
|
||||
};
|
||||
6
qcom/eva/pineapple-eva-v2.dtsi
Normal file
6
qcom/eva/pineapple-eva-v2.dtsi
Normal file
@@ -0,0 +1,6 @@
|
||||
#include "pineapple-eva.dtsi"
|
||||
|
||||
&msm_cvp {
|
||||
qcom,allowed-clock-rates = <370000000 450000000 500000000 550000000>;
|
||||
};
|
||||
|
||||
17
qcom/eva/pineapple-eva.dts
Normal file
17
qcom/eva/pineapple-eva.dts
Normal file
@@ -0,0 +1,17 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||
#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
|
||||
#include "pineapple-eva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. pineapple v1 SoC";
|
||||
compatible = "qcom,pineapple";
|
||||
qcom,msm-id = <557 0x10000>, <577 0x10000>, <696 0x20000>;
|
||||
qcom,board-id = <0 0>, <15 0>, <8 0>, <11 0>, <1 0>;
|
||||
};
|
||||
137
qcom/eva/pineapple-eva.dtsi
Normal file
137
qcom/eva/pineapple-eva.dtsi
Normal file
@@ -0,0 +1,137 @@
|
||||
&soc {
|
||||
msm_cvp: qcom,cvp@ab00000 {
|
||||
compatible = "qcom,msm-cvp", "qcom,pineapple-cvp";
|
||||
status = "ok";
|
||||
reg = <0xab00000 0x100000>;
|
||||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* LLCC Cache */
|
||||
cache-slice-names = "cvp";
|
||||
|
||||
/* Supply */
|
||||
cvp-supply = <&video_cc_mvs1c_gdsc>;
|
||||
cvp-core-supply = <&video_cc_mvs1_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clock-names = "gcc_video_axi1", "sleep_clk", "cvp_clk", "core_clk",
|
||||
"video_cc_mvs1_clk_src";
|
||||
clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_SLEEP_CLK VIDEO_CC_MVS1C_CLK
|
||||
VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
|
||||
clocks = <&gcc GCC_VIDEO_AXI1_CLK>,
|
||||
<&videocc VIDEO_CC_SLEEP_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1_CLK>,
|
||||
<&videocc VIDEO_CC_MVS1_CLK_SRC>;
|
||||
qcom,proxy-clock-names = "gcc_video_axi1", "sleep_clk",
|
||||
"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
|
||||
|
||||
qcom,clock-configs = <0x0 0x0 0x0 0x0 0x1>;
|
||||
qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
|
||||
|
||||
resets = <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_XO_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS1C_CLK_ARES>;
|
||||
reset-names = "cvp_axi_reset", "cvp_xo_reset","cvp_core_reset";
|
||||
reset-power-status = <0x0 0x1 0x0>;
|
||||
|
||||
qcom,reg-presets = <0xB0088 0x0>;
|
||||
qcom,ipcc-reg = <0x400000 0x100000>;
|
||||
qcom,gcc-reg = <0x110000 0x40000>;
|
||||
|
||||
pas-id = <26>;
|
||||
memory-region = <&cvp_mem>;
|
||||
|
||||
/* UC region mapping */
|
||||
ipclite_mappings = <0xFE500000 0x100000 0x82600000>;
|
||||
/* DEVICE mapping */
|
||||
aon_timer_mappings = <0xFFA00000 0x1000 0xc220000>;
|
||||
/* DEVICE mapping */
|
||||
hwmutex_mappings = <0xFFB00000 0x2000 0x1f4a000>;
|
||||
/* DEVICE mapping */
|
||||
aon_mappings = <0xFF80F000 0x1000 0x0ABE0000>;
|
||||
|
||||
/* CVP Firmware ELF image name */
|
||||
cvp,firmware-name = "evass";
|
||||
|
||||
/* Buses */
|
||||
cvp_cnoc {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-cnoc";
|
||||
qcom,bus-master = <MASTER_APPSS_PROC>;
|
||||
qcom,bus-slave = <SLAVE_VENUS_CFG>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 1000>;
|
||||
};
|
||||
|
||||
cvp_bus_ddr {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-ddr";
|
||||
qcom,bus-master = <MASTER_VIDEO_PROC>;
|
||||
qcom,bus-slave = <SLAVE_EBI1>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 6533000>;
|
||||
};
|
||||
|
||||
/* MMUs */
|
||||
/* Camera cb is used to get secure camera buffer IPA */
|
||||
cvp_camera_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_camera";
|
||||
buffer-types = <0xfff>;
|
||||
qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_EVA_CB>;
|
||||
};
|
||||
|
||||
non_secure_cb_group: cvp_non_secure_cb_group {
|
||||
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
};
|
||||
|
||||
cvp_non_secure_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_hlos";
|
||||
iommus =
|
||||
<&apps_smmu 0x1920 0x0000>;
|
||||
buffer-types = <0xfff>;
|
||||
dma-coherent;
|
||||
qcom,iommu-group = <&non_secure_cb_group>;
|
||||
};
|
||||
|
||||
|
||||
cvp_secure_nonpixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_nonpixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1924 0x0000>;
|
||||
buffer-types = <0x741>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
|
||||
qcom,iommu-vmid = <0xB>;
|
||||
};
|
||||
|
||||
cvp_secure_pixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_pixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x1923 0x0000>;
|
||||
buffer-types = <0x106>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
|
||||
qcom,iommu-vmid = <0xA>;
|
||||
};
|
||||
|
||||
cvp_dsp_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_dsp";
|
||||
iommus =
|
||||
<&apps_smmu 0x1920 0x0000>;
|
||||
buffer-types = <0xfff>;
|
||||
qcom,iommu-group = <&non_secure_cb_group>;
|
||||
};
|
||||
|
||||
/* Memory Heaps */
|
||||
qcom,msm-cvp,mem_cdsp {
|
||||
compatible = "qcom,msm-cvp,mem-cdsp";
|
||||
memory-region = <&cdsp_eva_mem>;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
qcom/eva/trustedvm-kalama-eva-mtp.dts
Normal file
16
qcom/eva/trustedvm-kalama-eva-mtp.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include "trustedvm-kalama-eva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kalama MTP";
|
||||
compatible = "qcom,kalama-mtp", "qcom,kalama", "qcom,mtp";
|
||||
qcom,msm-id = <519 0x10000>, <536 0x10000>;
|
||||
qcom,board-id = <0x10008 0>;
|
||||
};
|
||||
16
qcom/eva/trustedvm-kalama-eva-qrd.dts
Normal file
16
qcom/eva/trustedvm-kalama-eva-qrd.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include "trustedvm-kalama-eva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kalama QRD";
|
||||
compatible = "qcom,kalama-qrd", "qcom,kalama", "qcom,qrd";
|
||||
qcom,msm-id = <519 0x10000>, <536 0x10000>;
|
||||
qcom,board-id = <0x1000B 0>;
|
||||
};
|
||||
6
qcom/eva/trustedvm-kalama-eva.dtsi
Normal file
6
qcom/eva/trustedvm-kalama-eva.dtsi
Normal file
@@ -0,0 +1,6 @@
|
||||
&soc {
|
||||
msm_cvp: qcom,cvp@ab00000 {
|
||||
compatible = "qcom,msm-cvp", "qcom,kalama-cvp-tvm";
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
17
qcom/eva/waipio-eva.dts
Normal file
17
qcom/eva/waipio-eva.dts
Normal file
@@ -0,0 +1,17 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/interconnect/qcom,waipio.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-waipio.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-waipio.h>
|
||||
#include "waipio-eva.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. waipio v1 SoC";
|
||||
compatible = "qcom,waipio";
|
||||
qcom,msm-id = <457 0x10000>, <482 0x10000>,
|
||||
<457 0x20000>, <482 0x20000>;
|
||||
qcom,board-id = <0 0>;
|
||||
};
|
||||
105
qcom/eva/waipio-eva.dtsi
Normal file
105
qcom/eva/waipio-eva.dtsi
Normal file
@@ -0,0 +1,105 @@
|
||||
&soc {
|
||||
msm_cvp: qcom,cvp@ab00000 {
|
||||
compatible = "qcom,msm-cvp", "qcom,waipio-cvp";
|
||||
status = "ok";
|
||||
reg = <0xab00000 0x100000>;
|
||||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* LLCC Cache */
|
||||
cache-slice-names = "cvp";
|
||||
|
||||
/* Supply */
|
||||
cvp-supply = <&video_cc_mvs1c_gdsc>;
|
||||
cvp-core-supply = <&video_cc_mvs1_gdsc>;
|
||||
|
||||
/* Clocks */
|
||||
clock-names = "gcc_video_axi1", "cvp_clk", "core_clk",
|
||||
"video_cc_mvs1_clk_src";
|
||||
clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_MVS1C_CLK
|
||||
VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
|
||||
clocks = <&clock_gcc GCC_VIDEO_AXI1_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1C_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1_CLK>,
|
||||
<&clock_videocc VIDEO_CC_MVS1_CLK_SRC>;
|
||||
qcom,proxy-clock-names = "gcc_video_axi1",
|
||||
"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
|
||||
|
||||
qcom,clock-configs = <0x0 0x0 0x0 0x1>;
|
||||
qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
|
||||
|
||||
resets = <&clock_gcc GCC_VIDEO_AXI1_CLK_ARES>,
|
||||
<&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>;
|
||||
reset-names = "cvp_axi_reset", "cvp_core_reset";
|
||||
reset-power-status = <0x2 0x2>;
|
||||
|
||||
qcom,reg-presets = <0xB0088 0x0>;
|
||||
qcom,ipcc-reg = <0x400000 0x100000>;
|
||||
qcom,gcc-reg = <0x110000 0x40000>;
|
||||
|
||||
pas-id = <26>;
|
||||
memory-region = <&cvp_mem>;
|
||||
|
||||
/* CVP Firmware ELF image name */
|
||||
cvp,firmware-name = "evass";
|
||||
|
||||
/* Buses */
|
||||
cvp_cnoc {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-cnoc";
|
||||
qcom,bus-master = <MASTER_APPSS_PROC>;
|
||||
qcom,bus-slave = <SLAVE_VENUS_CFG>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 1000>;
|
||||
};
|
||||
|
||||
cvp_bus_ddr {
|
||||
compatible = "qcom,msm-cvp,bus";
|
||||
label = "cvp-ddr";
|
||||
qcom,bus-master = <MASTER_VIDEO_PROC>;
|
||||
qcom,bus-slave = <SLAVE_EBI1>;
|
||||
qcom,bus-governor = "performance";
|
||||
qcom,bus-range-kbps = <1000 6533000>;
|
||||
};
|
||||
|
||||
/* MMUs */
|
||||
cvp_non_secure_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_hlos";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a0 0x400>;
|
||||
buffer-types = <0xfff>;
|
||||
dma-coherent;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
|
||||
};
|
||||
|
||||
|
||||
cvp_secure_nonpixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_nonpixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a4 0x400>;
|
||||
buffer-types = <0x741>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
|
||||
qcom,iommu-vmid = <0xB>;
|
||||
};
|
||||
|
||||
cvp_secure_pixel_cb {
|
||||
compatible = "qcom,msm-cvp,context-bank";
|
||||
label = "cvp_sec_pixel";
|
||||
iommus =
|
||||
<&apps_smmu 0x21a3 0x400>;
|
||||
buffer-types = <0x106>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
|
||||
qcom,iommu-vmid = <0xA>;
|
||||
};
|
||||
|
||||
/* Memory Heaps */
|
||||
qcom,msm-cvp,mem_cdsp {
|
||||
compatible = "qcom,msm-cvp,mem-cdsp";
|
||||
memory-region = <&cdsp_eva_mem>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user