xiaomi-unicorn2/android_kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Define labels for audio related nodes

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Labels are required for audio nodes inorder to enable
or disable them for a specific platform.

Change-Id: I6a37b7cc9f39e96f1fbb5900b2d75033952e4de7
This commit is contained in:
Puneeth Prabhu
2023-03-20 10:14:44 +05:30
parent 9b7900ecdd
commit c7d1c8c83d
2 changed files with 29 additions and 29 deletions
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2
qcom/waipio-dma-heaps.dtsi
View File

@@ -69,7 +69,7 @@
memory-region = <&demura_heap_memory>;
};
qcom,audio_ml {
audio_ml_cma: qcom,audio_ml {
qcom,dma-heap-name = "qcom,audio-ml";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&audio_cma_mem>;

56
qcom/waipio-pinctrl.dtsi
View File

@@ -1617,7 +1617,7 @@
};
};
pri_aux_pcm_clk {
pri_aux_pcm_clk: pri_aux_pcm_clk {
pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
mux {
pins = "gpio126";
@@ -1647,7 +1647,7 @@
};
};
pri_aux_pcm_sync {
pri_aux_pcm_sync: pri_aux_pcm_sync {
pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
mux {
pins = "gpio129";
@@ -1677,7 +1677,7 @@
};
};
pri_aux_pcm_din {
pri_aux_pcm_din: pri_aux_pcm_din {
pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
mux {
pins = "gpio127";
@@ -1706,7 +1706,7 @@
};
};
pri_aux_pcm_dout {
pri_aux_pcm_dout: pri_aux_pcm_dout {
pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
mux {
pins = "gpio128";
@@ -1735,7 +1735,7 @@
};
};
tert_aux_pcm {
tert_aux_pcm: tert_aux_pcm {
tert_aux_pcm_clk_sleep: tert_aux_pcm_clk_sleep {
mux {
pins = "gpio121";
@@ -1793,7 +1793,7 @@
};
};
tert_aux_pcm_din {
tert_aux_pcm_din: tert_aux_pcm_din {
tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
mux {
pins = "gpio122";
@@ -1822,7 +1822,7 @@
};
};
tert_aux_pcm_dout {
tert_aux_pcm_dout: tert_aux_pcm_dout {
tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
mux {
pins = "gpio124";
@@ -1851,7 +1851,7 @@
};
};
pri_tdm_clk {
pri_tdm_clk: pri_tdm_clk {
pri_tdm_clk_sleep: pri_tdm_clk_sleep {
mux {
pins = "gpio126";
@@ -1881,7 +1881,7 @@
};
};
pri_tdm_sync {
pri_tdm_sync: pri_tdm_sync {
pri_tdm_sync_sleep: pri_tdm_sync_sleep {
mux {
pins = "gpio129";
@@ -1911,7 +1911,7 @@
};
};
pri_tdm_din {
pri_tdm_din: pri_tdm_din {
pri_tdm_din_sleep: pri_tdm_din_sleep {
mux {
pins = "gpio127";
@@ -1940,7 +1940,7 @@
};
};
pri_tdm_dout {
pri_tdm_dout: pri_tdm_dout {
pri_tdm_dout_sleep: pri_tdm_dout_sleep {
mux {
pins = "gpio128";
@@ -1969,7 +1969,7 @@
};
};
tert_tdm {
tert_tdm: tert_tdm {
tert_tdm_clk_sleep: tert_tdm_clk_sleep {
mux {
pins = "gpio121";
@@ -2027,7 +2027,7 @@
};
};
tert_tdm_din {
tert_tdm_din: tert_tdm_din {
tert_tdm_din_sleep: tert_tdm_din_sleep {
mux {
pins = "gpio122";
@@ -2056,7 +2056,7 @@
};
};
tert_tdm_dout {
tert_tdm_dout: tert_tdm_dout {
tert_tdm_dout_sleep: tert_tdm_dout_sleep {
mux {
pins = "gpio124";
@@ -2085,7 +2085,7 @@
};
};
pri_mi2s_mclk {
pri_mi2s_mclk: pri_mi2s_mclk {
pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
mux {
pins = "gpio125";
@@ -2115,7 +2115,7 @@
};
};
pri_mi2s_sck {
pri_mi2s_sck: pri_mi2s_sck {
pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
mux {
pins = "gpio126";
@@ -2145,7 +2145,7 @@
};
};
pri_mi2s_ws {
pri_mi2s_ws: pri_mi2s_ws {
pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
mux {
pins = "gpio129";
@@ -2175,7 +2175,7 @@
};
};
pri_mi2s_sd0 {
pri_mi2s_sd0: pri_mi2s_sd0 {
pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
mux {
pins = "gpio127";
@@ -2205,7 +2205,7 @@
};
};
pri_mi2s_sd1 {
pri_mi2s_sd1: pri_mi2s_sd1 {
pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
mux {
pins = "gpio128";
@@ -2235,7 +2235,7 @@
};
};
sec_mi2s_mclk {
sec_mi2s_mclk: sec_mi2s_mclk {
sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
mux {
pins = "gpio124";
@@ -2265,7 +2265,7 @@
};
};
tert_mi2s_sck {
tert_mi2s_sck: tert_mi2s_sck {
tert_mi2s_sck_sleep: tert_mi2s_sck_sleep {
mux {
pins = "gpio121";
@@ -2294,7 +2294,7 @@
};
};
tert_mi2s_ws {
tert_mi2s_ws: tert_mi2s_ws {
tert_mi2s_ws_sleep: tert_mi2s_ws_sleep {
mux {
pins = "gpio123";
@@ -2323,7 +2323,7 @@
};
};
tert_mi2s_sd0 {
tert_mi2s_sd0: tert_mi2s_sd0 {
tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
mux {
pins = "gpio122";
@@ -2352,7 +2352,7 @@
};
};
tert_mi2s_sd1 {
tert_mi2s_sd1: tert_mi2s_sd1 {
tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
mux {
pins = "gpio124";
@@ -2410,7 +2410,7 @@
};
/* WSA speaker reset pins */
spkr_1_sd_n {
spkr_1_sd_n: spkr_1_sd_n {
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
mux {
pins = "gpio1";
@@ -2440,7 +2440,7 @@
};
};
spkr_2_sd_n {
spkr_2_sd_n: spkr_2_sd_n {
spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
mux {
pins = "gpio89";
@@ -2470,7 +2470,7 @@
};
};
spkr2_1_sd_n {
spkr2_1_sd_n: spkr2_1_sd_n {
spkr2_1_sd_n_sleep: spkr2_1_sd_n_sleep {
mux {
pins = "gpio71";
@@ -2500,7 +2500,7 @@
};
};
spkr2_2_sd_n {
spkr2_2_sd_n: spkr2_2_sd_n {
spkr2_2_sd_n_sleep: spkr2_2_sd_n_sleep {
mux {
pins = "gpio3";