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ARM: dts: msm: Update base DT for Ravelin

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Update base DT for Ravelin to differentiate
between adrastea and moselle wlan attachements.

Change-Id: I99231afbec671aff50f823358b416831675e77ed
This commit is contained in:
Sandeep Singh
2022-11-30 15:51:27 +05:30
parent 0a2f028c67
commit fe199cb490
9 changed files with 68 additions and 53 deletions
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61
qcom/ravelin-adrastea.dtsi Normal file
View File

@@ -0,0 +1,61 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
&reserved_memory {
wlan_msa_mem: wlan_msa_mem_region@82a00000 {
no-map;
reg = <0x0 0x82a00000 0x0 0x300000>;
};
};
&soc {
wpss_pas: remoteproc-wpss@8a00000 {
firmware-name = "adrastea/wpss.mdt";
};
icnss: qcom,icnss@22800000 {
compatible = "qcom,icnss";
reg = <0x22800000 0x800000>;
reg-names = "membase";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x4c0 0x1>;
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,
<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,
<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,
<GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,
<GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,
<GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,
<GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,
<GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-geometry = <0xa0000000 0x10000000>;
qcom,fw-prefix;
qcom,wlan;
bdf-download-support;
wpss-support-enable;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&L11B>;
vdd-1.8-xo-supply = <&L23B>;
vdd-1.3-rfa-supply = <&L14B>;
vdd-3.3-ch0-supply = <&L7E>;
qcom,vdd-cx-mx-config = <0 0>;
qcom,vdd-3.3-ch0-config = <3000000 3312000>;
qcom,smem-states = <&smp2p_wlan_1_out 0>;
qcom,smem-state-names = "wlan-smp2p-out";
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
};
};

1
qcom/ravelin-atp.dtsi
View File

@@ -1,6 +1,7 @@
#include "ravelin-pmic-overlay.dtsi"
#include "ravelin-pm7250b.dtsi"
#include "ravelin-thermal-overlay.dtsi"
#include "ravelin-adrastea.dtsi"
&soc {
};

1
qcom/ravelin-idp-overlay.dts
View File

@@ -2,6 +2,7 @@
/plugin/;
#include "ravelin-idp.dtsi"
#include "ravelin-adrastea.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin IDP";

1
qcom/ravelin-idp-wcn3950-amoled-rcm.dtsi
View File

@@ -1,3 +1,4 @@
#include "ravelin-adrastea.dtsi"
#include "ravelin-idp.dtsi"
&soc {

2
qcom/ravelin-idp-wcn3988-4gb.dtsi
View File

@@ -1,2 +1,2 @@
#include "ravelin-idp.dtsi"
#include "ravelin-adrastea.dtsi"

1
qcom/ravelin-idp.dts
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@@ -1,6 +1,7 @@
/dts-v1/;
#include "ravelin.dtsi"
#include "ravelin-adrastea.dtsi"
#include "ravelin-idp.dtsi"
/ {

1
qcom/ravelin-qrd.dtsi
View File

@@ -1,6 +1,7 @@
#include "ravelin-pmic-overlay.dtsi"
#include "ravelin-pmi632.dtsi"
#include "ravelin-thermal-overlay.dtsi"
#include "ravelin-adrastea.dtsi"
&soc {
};

52
qcom/ravelin.dtsi
View File

@@ -425,11 +425,6 @@
size = <0x0 0x5c00000>;
alignment = <0x0 0x400000>;
};
wlan_msa_mem: wlan_msa_mem_region@82a00000 {
no-map;
reg = <0x0 0x82a00000 0x0 0x300000>;
};
};
&firmware {
@@ -2258,7 +2253,6 @@
status = "ok";
memory-region = <&wpss_moselle_mem>;
firmware-name = "adrastea/wpss.mdt";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
@@ -2542,52 +2536,6 @@
};
};
icnss: qcom,icnss@22800000 {
compatible = "qcom,icnss";
reg = <0x22800000 0x800000>;
reg-names = "membase";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x4c0 0x1>;
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,
<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,
<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,
<GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,
<GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,
<GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,
<GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,
<GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-geometry = <0xa0000000 0x10000000>;
qcom,fw-prefix;
qcom,wlan;
bdf-download-support;
wpss-support-enable;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&L11B>;
vdd-1.8-xo-supply = <&L23B>;
vdd-1.3-rfa-supply = <&L14B>;
vdd-3.3-ch0-supply = <&L7E>;
qcom,vdd-cx-mx-config = <0 0>;
qcom,vdd-3.3-ch0-config = <3000000 3312000>;
qcom,smem-states = <&smp2p_wlan_1_out 0>;
qcom,smem-state-names = "wlan-smp2p-out";
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
};
thermal_zones: thermal-zones {
};

1
qcom/ravelinp-idp.dts
View File

@@ -1,6 +1,7 @@
/dts-v1/;
#include "ravelinp.dtsi"
#include "ravelin-adrastea.dtsi"
#include "ravelinp-idp.dtsi"
/ {